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October 2003

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Subject:
From:
Chris Robertson <[log in to unmask]>
Reply To:
Chris Robertson <[log in to unmask]>
Date:
Fri, 24 Oct 2003 10:01:21 -0500
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There as been many an occasion debris or foreign matter in a via causing problems.
I personally mask over all vias, and have never had a problem, but have a question.
Yes, debris in a via and being under a pad, in encapsulated in solder or plating etc.
is a reasonable question to ask. Could there be a problem, but my question is;
Isn't this a cleanliness issue?
Is it just a fact that regardless of the manufacturer that debris or such is a fact and not
just a manufacturer issue.
Is it that, yes it may be just a manufacturer issue, but there is no accountability
before assembly and we can't just count on the board to be clean.
Or is it the time between manufacturing and assembly that we have to worry about
debris?
I've never had an issue with debris in a via, and I don't know if I have good manufacturers
or that my traces/circuits have never been that critical.


Chris Robertson
[log in to unmask]
  ----- Original Message -----
  From: Paul Baine
  To: [log in to unmask]
  Sent: Friday, October 24, 2003 9:30 AM
  Subject: [TN] Cleaning of via holes under components


  Hello,

  One of our Design Engineers is designing a surface mount PCB
  assembly and would prefer not to have the via holes solder mask
  tented.  However, he is concerned that, if he does not call up
  solder mask tenting on his bare PCB drawing, foreign matter could
  find its way into a via hole and, if a component (e.g. an IC) was
  mounted over the via hole, the foreign matter might not be removed
  during the cleaning process.

  Has anyone had experience with this situation?  I would appreciate
  any help you could give me.

  Thanks very much in advance.

  Paul Baine
  Q.A. Manager
  C-Tech Ltd.
  Cornwall, Ontario, Canada

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