TECHNET Archives

December 1997

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Condense Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Mime-Version:
1.0
Sender:
Subject:
From:
"Ziarek, Paul J" <[log in to unmask]>
Date:
Wed, 17 Dec 1997 10:26:08 -0600
Content-Type:
text/plain; charset=US-ASCII
X-To:
Reply-To:
"TechNet Mail Forum." <[log in to unmask]>, "Ziarek, Paul J" <[log in to unmask]>
Parts/Attachments:
text/plain (16 lines)
     Does the thermal excursion that the PWB sees at wave solder contribute
     significantly to the reliability of partially filled PTVs?  Where can
     I find data on the reliability of partially filled PTVs in multilayer
     boards?

     Paul Ziarek
     Johnson Controls
     ([log in to unmask]


______________________________ Reply Separator ____________________________
_____
Subject: Re: [TN] filling vias!
Author:  [log in to unmask] at JOHNSON_CONTROLS


ATOM RSS1 RSS2