I've been watching this discussion in earnest for the past ...let's just say
it's been a long time. My eyes have glazed over several times so I'm not
sure if my input has been brought up before.
It is the function of both the PCB designer and the PCB fabricator to do
everything possible to insure that the design in question is as efficient
and reliable as possible in both fabrication and assembly.
For the designer this means that every effort should be made to understand
the complexities of fabricating a PCB. This information should be
incorporated into designs in such a way as to help eliminate failure modes
(be they in cost, yield, or on-time delivery).
The fabricator needs to perform several tasks prior to fabricating any
product.
First, the product needs to be quoted. This process entails collecting and
reviewing a list of parameters which most affect the yield and on-time
delivery (and hence price). Theoretically speaking, the pricing process
should occur after a Manufacturability Review has been performed. In
practice, board prices are agreed upon by sellers and buyers with nothing
more than a fabrication drawing -- sometimes no even that! The some of the
parameters typically used in determining board pricing are number of layers,
board size, laminate type, surface finish, gold plating requirements, and
special stuff like buried/blind vias, buried capacitance, and
controlled/differential impedance. Note that the presence or lack of
presence of non-functional pads is not in the above list. Though presence
of non-functional pads will change the production cost of the product (for
reasions outlined below) their presence is not know at this point and hence
does not typically affect the retail selling price for the board.
Second, a Manufacturability Review needs to be performed on the design.
This should include a DRC (design rule check), a mechanical review of rout
characteristics and materials, and a list of suggestions that would improve
the yields and make the product more cost effective. When necessary, it is
the responsibility of the fabricator to educate the designer on fabrication
issues that might otherwise go unnoticed. When an incoming part number is
received by Automata, a Manufacturability Review is preformed, and the
request is almost alway made to eliminate the non-functional pads. Most of
the time it is allowed (which makes us happy). Sometimes it is not.
The presence of nonfunctional pads on high layer count PCB's has been argued
to increase the z-axis dimensional stability of the hole walls (reduction in
foil cracking). Leaving the unused pads on the board is simply a non-value
added band-aid for excessive z-axis expansion of the laminate system. The
solution is not to leave these pads on the design but to remove the
non-functional pads and use a higher Tg laminate which has a lower z-axis
expansion.
The absence of non-functional pads
1. decreases the cycle-time in the AOI (automatic optical inspection)
operation
This is the case because there is less copper on the etched panel.
Scanning time is not affected. What is affected is the quantity of 'false
calls' found by the AOI equipment. 'False calls' are locations where the
AOI machine detects an error but which are usually the result of oxidation
of the surface copper on the core changing the reflectivity of the copper.
A greater degree of these 'false calls' means a greater amount of time
verifying their validity, and therefore the cycle-time for the AOI
operation.
2. increases overall hole quality for the vias.
Higher layer count products tend to utilyze smaller via drill sizes. The
resulting high apsect ratio, combined with a large quantity of copper which
must be drilled through causes the via holes to be somewhat funnel-shaped.
The reason for this is as follows. Optimally, the chip (debris) is carried
out of the hole along the flute of the bit and does not impact the hole
wall. Practically, this does not happen since the chip, before it has a
chance to escape the hole, leaves the flute and impacts the hole wall. The
impacting of copper chips on the hole wall causes the hole to be somewhat
funnel-shaped. The process is streamlined to minimize the funnel-shape by
useing a bit which has a negative taper (the bit is larger at the end that
hits the hole first) and the infeed of the drill is alterred to try to pull
the chip out of the hole along the flute. However, a good CAM-level method
for reducing the funnel-shape is to rmove the source of the abrasive action,
namely the non-functional pads.
Steve Silbert
Product Engineering Manager
Automata, Inc.
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