Also - less features = less rule checking, risk of potential layout
issues (isolations, etc), less image acquisition validations in data,
plots, imaging and etch. Over all the less data features the less to
verify along the fabrication path = a small cost savings in fabrication.
Jeffrey Bush
Sr. Principle Product Assurance Engineer
Space Systems & Electronics - Performance Excellence
BAE SYSTEMS INCORPORATED
ELECTRONIC SOLUTIONS AND INTEGRATION
144 Daniel Webster Highway
M/S MER24-116A
Merrimack, NH 03054-4898 USA
Tele +1 603.885.8137
Mobile +1 603.318.8056
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Pete Houwen
Sent: Tuesday, April 07, 2009 9:42 AM
To: [log in to unmask]
Subject: Re: [TN] when do vias require a thermal relief
When wave soldering, much of the metal heating is done by the solder
itself.
So as solder travels up the pin and hole, a large heatsink (non-relieved
plane)
can stop the solder flow.
When reflow soldering, the board itself is heated. So even external
planes and
SMT pads do not need thermal relief.
That's for holes/pads connected to pins/leads. Those are NOT "vias".
Vias don't get a pin in them, don't need solder, there is no thermal
consideration required. Best to directly connect to the plane, for
electrical
and fabrication concerns. For the same reason your fabricator wants to
remove non-functional pads, they would rather not have themal vias. If
you
have a via carrying enough current to need solder fill all the way
through, the
thermal spokes are going to need to be large enough that they will not
provide
much thermal relief anyway.
So the short answer is vias never need, and probably should not have,
thermal
relief. (but never say never)
Pete
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