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Date: | Thu, 03 Aug 95 12:56:07 |
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Andy,
We have the same problem on the solder bridges at SOICs. We are
going toward select soldering since even there is no bridge, there is
a big chance of getting excessive solder/ no stress relief on the last
two pins.
I have the following questions if you don't mind:
(1). What is your average defect rate?
(2). What kind of OA flux is the best based on your experience?
(3). Do you think low viscosity solder will help?
Cherng Wu
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Pragmatech Inc.
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Subject: re: Solder Bridges on SMT SOIC's
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Date: Mon, 31 Jul 1995 08:33:21 GMT
From: ANDY RICHARDSON <[log in to unmask]>
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Subject: re: Solder Bridges on SMT SOIC's
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Message-Id: <[log in to unmask]>Ref e-mail from Eric Bernal
at Pragmatech, Sunnyvale, Ca
Eric,
We at GenRad us the solder thief technique whereby and extra set of SOIC solder
pads are added to the last set of pads to see the solder wave. If all your IC's
are flowed in the same direction (i.e. the wave should pass along the length of
the IC) it then becomes a case of pads sizes and flux selection.
We use the IPC standard pad sizes for most devices including SOIC's which seem
to work.
Good luck!
Andy Richardson
GenRad UK
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