X-mailer: |
Pegasus Mail/Windows (v1.22) |
Sender: |
|
Old-Return-Path: |
|
Date: |
Tue, 2 Jan 1996 13:27:19 +0000 |
Precedence: |
list |
Resent-From: |
|
Resent-Sender: |
|
X-Status: |
|
Reply-to: |
|
Priority: |
normal |
TO: |
|
Return-Path: |
|
Status: |
RO |
From [log in to unmask] Tue Jan 2 16: |
21:08 1996 |
X-Loop: |
|
Resent-Message-ID: |
<"GZpX-1.0.nQ6.BKIwm"@ipc> |
Subject: |
|
From: |
|
X-Mailing-List: |
|
Received: |
by ipc.org (Smail3.1.28.1 #2)
id m0tX5ps-0000NNC; Tue, 2 Jan 96 06:29 CST |
Organization: |
PEI-NMRC |
Message-Id: |
|
Parts/Attachments: |
|
|
Re: Cracking Capacitors
I am very interested in cracking in ceramic capacitors - particularly
in switched mode power supplies (SMPS) - there is a need for large
area capacitors which are now appearing in leaded formats - the
leaded format would appear to be about 3 times the cost of leadless
versions - hence the question - what is the maximum size of leadless
ceramic capacitor which can be used with various circuit board
materials which will not result in stress cracking during the
lifetime of the product. This can be up to 10 years. This aspect of
the problem is not concerned with cracking due to assembly processes
- the concern is to do with long term stress cracking due to TCE
mismatch between the ceramic capacitor and the substrtae material -
this could be ceramic, FR4 or aluminium-core such as Berquist. I have
failed to find any information on this aspect of the problem.
Any assistance would be apriacted. Cian O Mathuna.
________________________________________________________________________________________________
Dr. Sean Cian O Mathuna
Applications Director/Centre Manager
Power Electronics Ireland,
National Microelectronics Research Centre,
University College, Cork,
Ireland.
Tel: International + 353 21 904016
Fax: Internatioanl + 353 21 270271
E-mail: [log in to unmask]
|
|
|