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November 1997

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Subject:
Re: Plating integrity in small vias
From:
peter dahlen <[log in to unmask]>
Reply To:
TechNet Mail Forum.
Date:
Mon, 24 Nov 1997 15:54:33 +0000
Content-Type:
text/plain
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text/plain (55 lines) 
Have the smallest PTH on the board also in the test coupon.

Have test coupon in different areas of the panel, if this is possible.

Make an electrical test on the bare boards (but will only detect open circuit).


Best Regards
Peter Dahlén
Saab Ericsson Space



At 16:11 1997-11-24 -0800, you wrote:
>Hello,Technetters!
>Skipping the horror story,I have a question to printed circuit
>manufacturers:
>How do you ensure the integrity of the plating in small vias?
>We require the manufacturer's cross sections as a proof of test
>for our circuits.Very seldom,they contain small vias.
>But,anyway,the failures found recently in our line are in random places
>on the boards.
>Are there other tests on bare boards which can detect reliability
>problems ?
>
>Thank you
>Gaby
>
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