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Subject:	Re: FAB: DSN: V-groove and SMT
From:	Steve Collins <[log in to unmask]>
Reply To:	[log in to unmask]
Date:	Fri, 15 Nov 1996 07:43:28 -0800
Content-Type:	text/plain
Parts/Attachments:	text/plain (69 lines)

D. Rooke wrote:
> 
> Dear Technetters:

           Edited!! 

> design rules currently applied

Internal design guidlines along with IPC-D-275

> SMD component(s) to avoid in scored arrays

We stay away from using 1210 Caps & 1812 Caps there to fragile.

> Minimum distance from scored edge to SMD pad

We typically try to stay .1 to .15 way from edge of V-Groove (Scored
edge). Although in a past life we got as close to .05 to edge and had
board tested for reliability of chips breaking and had no problem.

> single/double sided SMD issues 

We are only using V-Grooving today with SMD's on Bottom (Circuit) Side.

> component orientation with respect to scored edge

Good question, quess I never looked into this one. Do not believe we
have had problems with orientation or at least Mfg never let us know
about it if we did and I'm in the factory.

> Minimum/maximum array area size

Past life used a very poor design of 9x11.25 today in my new life I have
set up an 8.1 x 11.1 standard panel size.

> Minimum/maximum pwb array thickness

.062

> Maximum scored web thickness

For FR-4 we use .013/.019 material remaining web. GIL's MC-3 we use
.03/.040 material remaining web. Get with your board supplier and he can
help here with getting you samples of different web thicknesses for your
designs.

> preferred methods for depanelization

Preferred method is with a fixture but sometimes tough to get the proper
one designed. We currently break both with fixtures and by hand (simpler
arrays).

> Thanks in advance to all of those who reply....

Steve Collins
PCB Design Supervisor
Texscan Corp.
[log in to unmask]

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