There is a problem just using distance. If a small piece of solder left on
an interior curcuit, we would be scrapping a good board.
Also, since the exposed copper statement has always been in these
percentages, it makes both paragraphs the "same criteria" (i.e. easier to
understand and remember).
Mike Hill
-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]]On Behalf Of
w.glenn.colescott
Sent: Tuesday, April 19, 2005 1:18 PM
To: [log in to unmask]
Subject: Re: [IPC-600-6012] Proposed IPC-6012B Change for SnPb in SMOBC
John,
I like the idea of defining the distance under the mask better than
listing a percentage. I agree it is easier to understand, measure, and
enforce.
Other than that, I would support the change.
Thanks, W. Glenn Colescott
Component Line Leader - PCBs & Substrates
Component Engineering Liaison Manager - North America
Delphi Electronics & Safety Division
One Corporate Center - Mail Station R117 P.O. Box 9005 Kokomo, IN 46904-9005
Phone; (765)-451-1258 FAX; (765)-451-9647 Email;
[log in to unmask]
-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]]On Behalf Of Nick Koop
Sent: Tuesday, April 19, 2005 11:35 AM
To: [log in to unmask]
Subject: Re: [IPC-600-6012] Proposed IPC-6012B Change for SnPb in SMOBC
John,
For some perspective, paragraph 3.3.2.12 in IPC 6013 "Solder
Wicking/Penetration" (see pg 9) was intended to cover issues of
flexible coverlay and solder that extends underneath the coverlay on
occasion. We did not distinguish between coverfilm, soldermask, PIC or
the like. The limits are more generous and easier to measure than
percentages. Class 3 allows 0.3 mm (0.012"), Class 2 allows 0.5 mm
(0.020"), Class 3 allows as agreed between user and supplier.
This may be something the 6012 team may want to consider.
Regards,
Nick Koop
Minco Products, Inc
>>> [log in to unmask] 04/19/05 11:05AM >>>
Colleagues,
The IPC D-33a Rigid Board Performance Task Group is beginning the
development of an Amendment 1 to IPC-6012 Revision B. Relative to this
is a request to modify and append text in section 3.5.4.7, Final Finish
Coverage (Areas not to be soldered).
Background on change request:
A printed board was found to have small amounts of Tin Lead under the
solder mask with reflow/SMOBC finish. The part has been fabricated
using the selective solder strip process. The customer rejected the
parts for small amounts of tin lead found on bare copper and under the
solder mask, claiming with Tin Lead, the part no longer was Solder Mask
over Bare Copper. There is currently no IPC specification that
prohibits such Tin Lead on the bare copper. However, at some point it
becomes a workmanship issue per IPC 6012B paragraph 3.3.9.
Rationale for change request:
This new accept/reject criteria provides a check and balance for the tin
lead strip process (i.e., the process is not capable of absolute ZERO
tin lead as there is always trace amounts on some circuits) and at the
same time we don't want to be throwing away printed boards that are
functionally fine.
Proposed Change within 3.5.4.7 of IPC-6012B:
3.5.4.7 Final Finish Coverage
Final finish shall meet the solderability requirements of J-STD-003.
3.5.4.7.1 Exposed Copper (Areas not to be soldered) Exposed copper on
areas not to be soldered is permitted on 1% of the conductor surfaces
for Class 3 and 5% of the conductor surfaces for Class 1 and Class 2.
Coverage does not apply to vertical conductor edges.
3.5.4.7.2 Tin-Lead under SMOBC
Tin or Tin Lead under SMOBC on areas not to be soldered is permitted on
1% of the conductor surfaces for Class 3 and 5% of the conductor
surfaces for Class 1 and 2.
If you approve the proposed change without comment, please send your
approval, by May 3rd, to [log in to unmask] If there is a need to comment
on and discuss this within the task group, please respond through this
e-mail forum.
Thanks,
John Perry
Technical Project Manager
IPC
3000 Lakeside Drive # 309S
Bannockburn, IL 60015
[log in to unmask] 1-847-597-2818 (Phone)
1-847-615-7105 (Fax)
1-847-615-7100 (Main)
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