I agree with Mike.  That is the way to do it instead of trying to come up
with a number.



                      "Michael E. Hill"
                      <quality@COLONIALCI        To:       [log in to unmask]
                      RCUITS.COM>                cc:
                      Sent by:                   Subject:  Re: [IPC-600-6012] Proposed IPC-6012B Change for
                      IPC-600-6012                SnPb in SMOBC
                      <[log in to unmask]
                      rg>


                      04/22/2005 11:09 AM
                      Please respond to
                      "(Combined Forum of
                      D-33a and 7-31a
                      Subcommittees)"






1. I would agree that a statement that "overlap is acceptable" and not a
dimension is best.  The functional issues of solder bridging or solder mask
adhesions are covered by other parts of 6012.

2. However in addition, 6012 needs to address circuits not near the overlap
with some tin lead. This is where the percentage proposal started, since
percentages are already in this paragraph that way...

Using the some wording as #1 above, it could be done with a statement
"residual tin lead on circuits is acceptable". The downside to this
wording:
There is no limit to the amount of unstripped tin lead.

Mike

-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]]On Behalf Of Menuez,
Pete
Sent: Friday, April 22, 2005 10:04 AM
To: [log in to unmask]
Subject: Re: [IPC-600-6012] Proposed IPC-6012B Change for SnPb in SMOBC


All

Before we contemplate a change lets step back and understand the problem.

From John Perry's background statement it seems to me that the customer
didn't understand the selective solder process; and that with this process
there must be an overlap of soldermask and tin/lead to avoid a bare copper
demarcation line.

In practice when the job is tooled the solder will intentionally be
extended
.005 to .010" under the soldermask.  In this case the starting point is at
the maximum suggested in this thread.  This would allow for no registration
issues at all.  I would also be hard pressed to come up with a realalistic
maximum number. .015? .020?  You may also get some flow of the solder after
reflow.

Rather than assigning a number (which in my opinion would have to be
arbitrary) I would suggest a statement in 6012 that explains the selective
solderstrip process and the overlap requiured. Simutaneously there could be
a change to 2221 with design guidelines for selective solder.  I don't have
the magic words but I would suggest something like:

3.5.4.7.2 Tin-Lead under SMOBC (Selective Solderstrip)
Designs where solder is selectively removed from the board to allow
soldermask to adhere to bare copper will have areas of tin/lead encroaching
under the soldermask.

(Period. No numbers - it tells the customer that this is not a workmanship
issue it is a design issue.)

We could also add a fit form function statement:
In no case should the solder be allowed to flow under the soldermask
allowing the solder to flow from one pad to another.

We may also allow the soldermask to lift from the this reflowed area as we
did when soldermask on tin lead was the rule rather than the exception.



Just my 2 cents worth,

Pete Menuez

-----Original Message-----
From: John Perry [mailto:[log in to unmask]]
Sent: Tuesday, April 19, 2005 12:05 PM
To: [log in to unmask]
Subject: [IPC-600-6012] Proposed IPC-6012B Change for SnPb in SMOBC




Colleagues,

The IPC D-33a Rigid Board Performance Task Group is beginning the
development of an Amendment 1 to IPC-6012 Revision B.  Relative to this is
a
request to modify and append text in section 3.5.4.7, Final Finish Coverage
(Areas not to be soldered).

Background on change request:

A printed board was found to have small amounts of Tin Lead under the
solder
mask with reflow/SMOBC finish.  The part has been fabricated using the
selective solder strip process.  The customer rejected the parts for small
amounts of tin lead found on bare copper and under the solder mask,
claiming
with Tin Lead, the part no longer was Solder Mask over Bare Copper.  There
is currently no IPC specification that prohibits such Tin Lead on the bare
copper.  However, at some point it becomes a workmanship issue per IPC
6012B
paragraph 3.3.9.

Rationale for change request:

This new accept/reject criteria provides a check and balance for the tin
lead strip process (i.e., the process is not capable of absolute ZERO tin
lead as there is always trace amounts on some circuits) and at the same
time
we don't want to be throwing away printed boards that are functionally
fine.

Proposed Change within 3.5.4.7 of IPC-6012B:

3.5.4.7 Final Finish Coverage
Final finish shall meet the solderability requirements of J-STD-003.

3.5.4.7.1 Exposed Copper (Areas not to be soldered) Exposed copper on areas
not to be soldered is permitted on 1% of the conductor surfaces for Class 3
and 5% of the conductor surfaces for Class 1 and Class 2.  Coverage does
not
apply to vertical conductor edges.

3.5.4.7.2 Tin-Lead under SMOBC
Tin or Tin Lead under SMOBC on areas not to be soldered is permitted on 1%
of the conductor surfaces for Class 3 and 5% of the conductor surfaces for
Class 1 and 2.

If you approve the proposed change without comment, please send your
approval, by May 3rd, to [log in to unmask]  If there is a need to comment on
and discuss this within the task group, please respond through this e-mail
forum.

Thanks,

John Perry
Technical Project Manager
IPC
3000 Lakeside Drive # 309S
Bannockburn, IL 60015
[log in to unmask]
1-847-597-2818 (Phone)
1-847-615-7105 (Fax)
1-847-615-7100 (Main)