Thanks for the link Jack !
I'm going to show the article to some of my clients
who are hell bent on making diff-pairs the most and difficult and complicated things ever to route ...
+/- 10 mils can be a real pita sometimes.

Andy
CMRSummit Technologies

-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Jack Olson
Sent: July-25-14 1:06 PM
To: [log in to unmask]
Subject: Re: [DC] The real signal flow in differential pairs - referring to Lee Ritchey's statement

I just stumbled into this thread while I was looking for a different email.
funny that I never saw it before, so I apologize for the delayed response!

Anyway, I don't think Figure 2 in Lee's article (PCBDesign007 Aug2013
page11)
was intended to show electrons like marbles rolling through a plumbing pipe.

http://www.magazines007.com/emag/pub/PCBD-Aug2013/

The energy field will be building up between the signal path and the return path as the wave propagates down the line. As a board designer, I should be able to trace that path (even if I have to use my finger), keeping in mind that I should also create an unbroken copper path along-side it for the return. Otherwise the field will distort and spray out to who-knows-where looking for another conductor to glom onto.

In Rick Hartley's presentation "Grounding to Control Noise and EMI", one of his slides asks, "Where is the Energy in a circuit? In the Voltage? In the Current?
Neither... Energy is mostly in the Fields!!!"

and in the next slide he asks,
"Where are the Fields in a circuit? In the Traces? In the Planes?
Neither... in the Space between the Traces and the Planes... in the Dielectric!"

Kind of a mind-blower the more you think about it.
If I ever write a book about designing circuit boards, I think I would call it "The Field Guide to Guiding Fields"

onward thru the fog,
Jack


On Thu, Feb 27, 2014 at 12:29 PM, Rainer Thüringer < [log in to unmask]> wrote:

> *Is it true, that**parallelism is really not required for the two
>> differential traces on PCB routed over a common ground plane?*
>>
>> Lee Ritchey's article "Differential Signal Design" in the PCB Design 
>> Magazine from August 2013 has been discussed controversially. 
>> Especially his statement "/The property that these two signals have 
>> in common is that they are equal and opposite and they are tightly timed to each other.
>> _Beyond these two characteristics there are no other properties that 
>> matter when a design uses differential pairs_"/has raised the 
>> question, if parallelism is really not required for the two 
>> differential traces routed over a common ground plane.
>>
>> In my master class on Electronic Design we examined this question by 
>> modeling a differential pair of traces over ground with a 3D-Field 
>> solver from CST. If Lee's statement is true, the signal flow in each 
>> of the two lines should behave independently like two single ended 
>> traces. This behavior has been described very vividly by Howard 
>> Johnson and Martin Graham in the "Advanced Black Magic" book (chapter 
>> 2.3 Transmission line) concerning the return current, building up 
>> simultaneously with the signal current in the ground plane underneath 
>> as the rising edge propagates through a transmission line.
>>
>> For differential traces over ground there are two options for the 
>> return current flow: (1) the return current of each trace flows 
>> underneath each trace or (2) the return current will switch over to 
>> the inversed trace returning to the driver. In case (1) an orthogonal 
>> slot in the ground plane underneath the trace would disturb each of 
>> the 2 signals in case (2) a parallel slot between the 2 parallel traces would do so.
>>
>> Making a long story short, even a wide ground slot of 1mm running 
>> parallel between two differential traces with 1mm spacinghas no 
>> effect on the return current of each trace. Both return currents are 
>> running separately underneath each signal trace, being distorted if a 
>> transversal
>> (orthogonal) slot is inserted in ground.The reason therefore is 
>> simple: the return current always takes the path of least impedance 
>> which is the path of the smallest loop i.e. underneath each trace. 
>> Lee's statement is correct. Nevertheless, for cancelling out ground 
>> noise generated by other circuits the two differential traces should 
>> be routed over the same ground area -- but not necessarily _very_ tight together.
>>
>> Having this model in mind, it is also obvious that the current does 
>> not go down the signal conductor , reach the end and then begin to 
>> make its way back. Unfortunately Lee's figure 2 (current flow is 
>> electron flow) in his article could be misunderstood in that way. If 
>> the two lines are substantially different in length or of different 
>> impedance both traces must be terminated separately to ground as Lee 
>> did explain for the 2.4GB/s case (with a small cap).
>>
>> But independent of the switching problem for the receiver, different 
>> trace lengths or impedances (trace width) will generate reflections i.e.
>> EMC problems if terminated by one resistor only rather than two 
>> separately to ground. Using the correct return current model this 
>> becomes obvious even without any receiver. Will say, using the 
>> vividly return current model from Howard Johnson helps understanding 
>> the signal propagation in between signal trace and reference plane, 
>> so that design rules i.e. for placing correct return vias can be derived by yourself.
>>
>> Therefore I am using vividly models in my classes at university. On 
>> Monday afternoon at APEX you could "*Becoming an EMC Competent Board 
>> Designer --- Understanding What Happens rather than Learning Rules 
>> (PD 26)". **I am following Einstein's recommendation: Make things as 
>> simple as possible -- but not simpler!***
>>
>> Rainer Thüringer, CID Master Instructor; Member of the IPC-DC 
>> Steering Committee
>>
>> Professor for Electronic Design, THM - University of Applied 
>> Sciences, Giessen (Germany)
>>
>>
>
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