DESIGNERCOUNCIL Archives

August 2001

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Subject:
From:
Mario Irigoyen <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Tue, 28 Aug 2001 15:51:27 -0500
Content-Type:
text/plain
Parts/Attachments:
text/plain (99 lines)
Hi,

An invitation for this event was sent out last week. Please note the date
has changed. Also, for those who do not know, Arlington Hgts, is in
Illinois, near O'Hare airport west-northwest of Chicago.

Best regards,

Mario Irigoyen


Subject: PLEASE NOTE: DATE CHANGE FOR THE DDI SEMINAR!!!


Unfortunately, we had to change the date of our seminar.

PLEASE SEE THE ATTACHED INVITE BELOW FOR THE DDI TECHNICAL SEMINAR WHICH
WILL BE
HELD ON THURSDAY, NOVEMBER 1ST at the Sheraton, Arlington Park. Feel free to
forward this invite along to anyone in your company or outside of your
company
that would like to attend. Please RSVP to the following email address by
OCTOBER
18TH:

[log in to unmask]

We look forward to seeing you there!!!


COMPLIMENTARY SEMINAR IN THE LATEST HIGH SPEED AND HIGH DENSITY
DESIGN SOLUTIONS DEMONSTRATING THE LATEST KNOW-HOW AND JAPANESE
BEST PRACTICES PROVIDED BY DDI, ZUKEN AND PANASONIC.

Do your designs have BGA's ?

Is an increasing I/O count and a decreasing
pitch driving up the layer count on your PCB
and compromising the electrical performance
requirements of the PCB ?

Learn how the most recent applications of HDI
(microvia) technology to high speed, high density,
large form factor products has reduced PCB cost by
up 50% or more (through size reduction and/or
layer count reduction) and significantly improved
electrical performance characteristics !!

Example 1 :  High Speed Optical Network at
10Gb/sec, Avionics.
Layer count reduced from 18 to 10.
Size/weight reduced by 35%.
Design time reduced by 25%.
PCB cost reduced by 55%.

Example 2 :  High speed network product. Two 18 layer
daughter cards and one 24 layer motherboard, combined
into one 16 layer mother board. PCB cost reduced by
almost 60%. Combined assy and PCB savings exceed the
cost of the original PCBs.

In both cases shorter connections to power
and ground and shorter signal lengths reduce
inductance and resistance. Over 50% fewer
drilled holes significantly improved ground
plane continuity.   Outer layer power and ground
provides free decoupling capacitance.

Could you benefit from such a solution ?

Learn about the most recent PCB concepts and
solutions and their design implementation
before your competition does.

Don't miss this non-commercial technical
design seminar provided by some of the
leading industry experts in PCB design
solutions.

Please forward this message and the attached
flier to others within your company or outside
who might find this seminar useful.

Please RSVP by OCTOBER 18, 2001 to

Fran Gallo
[log in to unmask]
Tel (847) 255-6920

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