Hi All,

Damage limitation time has come again.

On a design that I am working on a 1mm hatched planes were used instead
of solid planes. This occurred on a 8 layer board with 1 Gnd,  2 power
and 5 routing layers/planes.  Most signals on the board are < 2Mhz with
a few 16 and 47 MHz short clock traces.

Could someone please explain the differences in operation and what my
exposures might be after this error. This error occurred on a batch of
proto boards that are two expensive to junk. But I am being asked can we
pull the trigger on the proto build or will we be building junk ?

Regards;

DerekDerek J. Wynne
Design Engineer.
Toucan Technology Ltd.
I.D.A. Business Park
Dangan
Galway City
Ireland.
 
Telephone: +35391519913
Fax:          +35391519901
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