DESIGNERCOUNCIL Archives

September 2007

DesignerCouncil@IPC.ORG
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DesignerCouncil <[log in to unmask]>
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Designers Council Forum <[log in to unmask]>
Date:
Thu, 27 Sep 2007 06:38:55 -0700
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"(Designers Council Forum)" <[log in to unmask]>, Babcock John <[log in to unmask]>
Subject:
Re: Conversation topic: Getting your designs done right!
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Babcock John <[log in to unmask]>
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text/plain (20 lines) 
One of my biggest pet peeves is also having the schematic not completed
before the pcb layout begins.  I installed a process where we have a
schematic review prior to layout on a completed schematic.  Before that,
everyone was wondering why the layout took so long.  Well let's see the
netlist changes 10 times so that equals 10 times of routing, rip-up, and
re-routing.

John Babcock, C.I.D.
PCB Designer III
www.spraycool.com

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