I think most of you missed the intent of the question.
I don't think he was asking if the soldermask should
actually be applied to the board 1:1 zero tolerance.
That idea is absurd.
I'm pretty sure he meant supply the DATA to the
vendor 1:1, and allow the vendor to modify it to
suit his process.
You say your vendor prefers +4, mine is only +3.
If we both gave 1:1 data to both vendors and allowed
them to add +3 or +4 as they see fit, everyone would
benefit. Don't tie your data to a particular vendor
unless you have a good reason to.
Same for paste screens. Designing a good screen is
an art in itself. If you add some unspecified amount
by default, they may not know how you fudged it up
before they start making their tweaks.
That's why I would bet many screen manufacturers
discard your screen data, get the true pad size data
from the copper layers, and start from that.
good luck,
Jack
|---------+----------------------------->
| | Matthew Lamkin |
| | <matthew.lamkin@PR|
| | OTEC.CO.UK> |
| | Sent by: |
| | DesignerCouncil |
| | <DesignerCouncil@i|
| | pc.org> |
| | |
| | |
| | 11/05/2003 09:00 |
| | AM |
| | Please respond to |
| | "(Designers |
| | Council Forum)"; |
| | Please respond to |
| | Matthew Lamkin |
| | |
|---------+----------------------------->
>------------------------------------------------------------------------------------------------------------------------------|
| |
| |
| |
| |
|To: [log in to unmask] |
|cc: |
| |
| |
| |
| Subject: Re: [DC] soldermask methods poll |
>------------------------------------------------------------------------------------------------------------------------------|
Caterpillar: Confidential Green Retain Until: 12/05/2003
Retention Category: G90 -
General
Matters/Administration
I always supply my board manufacturer with what I want to see on the board
for ALL layers.
Be it copper, solder mask, solder paste pads, legend etc.
It works far better in the long run to do it this way.
Solder mask is set 8 thou above pad size and data is provided as such for
top & bottom layers.
If you do not supply your board manufacturer a soldermask layer, then its
your own fault if they create one & miss off something that you want
included in it.
Ditto for the oversizeing, if they have a soldermask at 1:1 then the
alignment of it to the copper layer has to be 100% accurate & it never can
be. The 8 thou oversize is so that they have a slight bit of
misalignment/error allowance. Failure to have this will undoubtedly
increase
the board cost or plotting costs as they will make the adjustments
themselves.
Tell your assemblers to get back on with building the boards & let you deal
with the specifications.
Matthew Lamkin.
-----Original Message-----
From: Jeff Seeger [mailto:[log in to unmask]]
Sent: Wednesday, November 05, 2003 2:46 PM
To: [log in to unmask]
Subject: [DC] soldermask methods poll
,
Hi all,
Posting this for a friend who is not a subscriber:
I am in the middle of a discussion/debate with assemblers on one
side and designers on the other.
The question is:
As a Designer, what would you prefer to send to the fabricator
for the soldermask features?
either
A) 1:1? (Soldermask clearance same as the holesize, padsize,
surfacemount, or clearanced feature size)
or
B) Clearance set at some value over the pad/feature/SMT size?
(Like 3 mils per side)
Thanks for any and all responses,
David Hoover
--
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
jseeger "at" appliedcad "dot" com 978 649 9800
President, Greater Boston Chapter, IPC Designer's Council
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