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March 2005

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Subject:
From:
Scott Riley <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Tue, 15 Mar 2005 08:46:48 -0500
Content-Type:
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I'm looking for a little information on the best way to represent BGA
components with a high pin count (EX: 484 I/O) in a schematic. I need to be
able to document a schematic for a board that will have two BGA devices (484
I/O and 165 I/O). Once the customer reviews/approves the schematic I would
extract a netlist and use it to create rats on the layout and for
programmatic comparison.
 
My assumption is that I will need to create symbols that have all the pins
around the perimeter of a square or rectangle, but was hoping someone could
share their  experience on schematics for similar components and if there is
a better/different approach.  
 

Scott D. Riley
Technical Design Service
607-658-9322 - Office
607-785-1696 - FAX
 <http://www.techdesignservice.com/> www.techdesignservice.com

 

 

 

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