I'm looking for a little information on the best way to represent BGA components with a high pin count (EX: 484 I/O) in a schematic. I need to be able to document a schematic for a board that will have two BGA devices (484 I/O and 165 I/O). Once the customer reviews/approves the schematic I would extract a netlist and use it to create rats on the layout and for programmatic comparison. My assumption is that I will need to create symbols that have all the pins around the perimeter of a square or rectangle, but was hoping someone could share their experience on schematics for similar components and if there is a better/different approach. Scott D. Riley Technical Design Service 607-658-9322 - Office 607-785-1696 - FAX <http://www.techdesignservice.com/> www.techdesignservice.com --------------------------------------------------------------------------------- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. To temporarily stop/(restart) delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL/(MAIL) Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ---------------------------------------------------------------------------------