Happy Holiday T-Netters: I'm learning a lot from the expertise at this site - many thanks. A quick question: Is anyone aware of a spec which sets limits on the contamination (e.g., Cu) on the plated surface of SMT devices? I'm aware of the limits set for solder bath contaminants in J-STD-002 and MIL-STD-202 and it seems likely that it might 'carry over' to the actual devices plated.... Is anyone looking at the Sn/Pb contaminants on their SMT devices with reference to another spec? Thanks Mike Simms Trace Laboratories - Central