Joe, The advise from Mike (Fluke) is right on line. I would add one note. I have seen this in the past when there is an exposed pad/via close to the gold tab. The soldermask clearance/opening was exposing the trace that lead to the gold tab. This trace was always etching "open". To make matters worse, this was happening in a final finish after E.T., so the opens were getting to the customer (ouch!). The solution was to either get the customer to move the via, or change the soldermask artwork to decrease the galvanic reaction. By the way, this was on a SIM card board where there are a lot of tabs and a lot of vias. I hope this is helpful. Scott Griggs Senior Applications Engineer RBP Chemical Corp. MPLS, MN (612) 825-6113 ############################################################## TechNet Mail List provided as a free service by IPC using LISTSERV 1.8c ############################################################## To subscribe/unsubscribe, send a message to [log in to unmask] with following text in the body: To subscribe: SUBSCRIBE TECHNET <your full name> To unsubscribe: SIGNOFF TECHNET ############################################################## Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information. If you need assistance - contact Gayatri Sardeshpande at [log in to unmask] or 847-509-9700 ext.5365 ##############################################################