Hey TechNeter's Does anybody have an equation that could help a person determine the current handling capability of through hole vias? Our practice has normally been to use multiple vias to connect components with high current paths to plane layers. However, that isn't good enough for one of our engineers who wants more than an approximation, and wishes to find out whether we are putting more vias on the board than we need to. Thanks, Scott Holthausen ################################################################ TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c ################################################################ To subscribe/unsubscribe, send a message to [log in to unmask] with following text in the body: To subscribe: SUBSCRIBE TechNet <your full name> To unsubscribe: SIGNOFF TechNet ################################################################ Please visit IPC's web site (http://www.ipc.org) "On-Line Services" section for additional information. For technical support contact Hugo Scaramuzza at [log in to unmask] or 847-509-9700 ext.312 ################################################################