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=========================================================================
Date: Fri, 12 Jun 1998 16:35:22 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mike Buetow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mike Buetow <[log in to unmask]>
Subject: Re: Land Pattern Formulas
Mime-Version: 1.0
Content-Type: text/plain
James is correct; the formulas are in there.
If memory serves, the formulas are on pp. 11-15 or thereabouts in IPC-SM-782A,
published August 1993, and IPC-SM-782A with the amendment published in 1996.
(However, if you have only the amendment, which was available as a standalone
document, that might explain why the formulas are missing.)
Mike Buetow
IPC Staff
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=========================================================================
Date: Fri, 12 Jun 1998 14:11:51 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Phil Culpovich <[log in to unmask]>
Organization: http://www.oxfordvue.com
Subject: Apologies
MIME-Version: 1.0
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To all TechNetters:
It was not my intent to offend anyone, my apologies to those that took
it that way so please stop sending the hate mail!!! All I was trying to
point out was that as soon as one respondant throws in a "business card"
so does everyone else, including myself, Barbara. My intent was exactly
what Jack Crawford points out are the rules of "Nettiquette" below, post
your responses to the person that asked for the original information in
the first place.
"As paraphrased from the policy (readable on our web site), the obvious
blatant
advertisements aren't acceptable. When someone asks for a source where
the
normal
reply would be a companies name, address or other contact info, the
guide
suggests
replying to the original poster privately, not posting to the net."
Phil
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Date: Fri, 12 Jun 1998 12:13:31 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Thomas C Han <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Thomas C Han <[log in to unmask]>
Subject: Re: BGA periphery clearance
Ernst,
>From a manufacturing stand point, space around the BGAs are needed to
facilitate rework. Without the space, components around the BGAs will be
damaged during rework. Your manufacturer will charge heftier price to
manufacture those boards without the space and in worse case you may have
to scrap the boards that require BGA rework.
_____________________________________________________________________
You don't need to buy Internet access to use free Internet e-mail.
Get completely free e-mail from Juno at http://www.juno.com
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=========================================================================
Date: Fri, 12 Jun 1998 21:27:29 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jeff Seeger <[log in to unmask]>
Organization: Applied CAD Knowledge Inc
Subject: Greater Boston DC Chapter Meeting, Thursday 18-June
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
.
Chapter Benefits
- AND -
Geometric Dimensioning and Tolerancing for Printed Boards
The Greater Boston Chapter of the IPC Designer's Council will
hold its next meeting on Thursday, June 18th at 6pm. This is
the last meeting of the '97/'98 season, with the next meeting
to come in perhaps September.
Gary Ferrari, Executive Director of the National Designer's
Council, will speak on activities and initiatives at the IPC
and on the coming changes in the member benefits package.
John Sabo, Senior Designer with Allen Bradley, will speak on
Geometric Dimensioning and Tolerancing - What it is, Why we
need it, How to do it, and Where to get more information.
This methodology is needed to accurately describe any machined
or fabricated part, if you tolerance a location as +/-.003,
you are allowing a "square" tolerance area that will actually
allow the item to be located +.003/+.003, or .0042 away from
your specified location.
Agenda:
6:00 pm, Arrivals and Pizza (optional, $5 contribution)
6:45 Gary Ferrari, Executive Director IPCDC
7:15 John Sabo - Geometric Dimensioning and Tolerancing
Directions:
Lockheed/Loral in Lexington MA. This facility is located off
route 128 at the route 2A/Lexington exit. Proceed West 200yds
from route 128, turn Left into an industrial park. The meeting
is in the first building on the left (after the guard shack).
The Council has had an active and informative meeting season,
with topics running from Analog Electronics to Zycon's Buried
Capacitor Technology. We hope to continue to bring you, the
designer, genuine content and enrichment in the coming year.
But we need your help! The Steering Committee currently needs
more voices, please get involved! Steering Committee meetings
are held on the 2nd Tuesday of each month, at the Victoria's
Station Restaurant in Burlington (across from the Burlington
Mall on Middlesex Turnpike), at 6pm. Hope to see you there!
--
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
jseeger "at" appliedcad "dot" com 978 649 9800
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=========================================================================
Date: Fri, 12 Jun 1998 21:48:31 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Joseph E. J. Duclos Jr." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Joseph E. J. Duclos Jr." <[log in to unmask]>
Subject: Re: Junk email?
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of JoAnn Amerson
Sent: Friday, June 12, 1998 12:44 PM
To: [log in to unmask]
Subject: Re: [TN] Junk email?
On 12 Jun 98, pod1 wrote:
> Please pardon my intrusion. Simply, I'm networking on the network
concerning
> our favorite subject. I am an infamous consultant to the PCB/PCBA industry
> not trying to sell you anything with this message.
>
Did anyone else get this email? He claims to be an "infamous consultant"
<snicker>. Like I'm going to take advice from him! Geez! Or is this a new
wave in marketing? TRUTH IN ADVERTIZING!
Definitely brightened up my dreary day. :-)
JoAnn L. Amerson
Design Librarian
Red Lion Controls, Inc.
E-mail: [log in to unmask]
Voice: (717) 767-6961 ext 6308
Sure did Joann, Joe Duclos - Tooling Engineer - ECC Corp here, also sent an
attachment .JPG file - "Proof of Design" they call themselves from MI. They
sent it to my home E-mail (which is the one I have signed up to this forum
"[log in to unmask]"
Any other spammee's?????
JOE SENDZ..........
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=========================================================================
Date: Sat, 13 Jun 1998 10:49:30 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Kuan Kuan Ng <[log in to unmask]>
Subject: GaAs ICs
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Hi Technet members,
I have been desperately looking for some High Speed GaAs ICs in die form to
build a test vehicle for verifying the bond parameters, substrate
suitability,etc using COB technology. Together on the same substrate will
also be some Si dies.
Can anyone pse help? Pse contact me offline at [log in to unmask]
Rgds - Kuan
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=========================================================================
Date: Sat, 13 Jun 1998 12:24:10 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Outgassing problem in pcb's soldering
Mime-Version: 1.0
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Dear Sir /Mme:
My name is Toni Casas and I'm working as a quality engineer in an entreprise
which performs electronic circuits and devices for industrial aplications.
I have heard about your organization and I'm sending you this e-mail in
order to ask some things about soldering processes. I explain a little about
our productive process.
First of all we perform SMD assembly. Then we mount conventional components
by hand and then the pcb's are soldered in a new technology soldering line.
We have problems, especially in large pcb's, by the humidity of the pcb amb
the problem known by the name of outgassing. You know, we enter the pcb into
the soldering line and when the tin reaches any pad of the pcb, then it
explodes by the presence of humidity. Our pcb's supplier says that is the
outgassing problem, but we know nothing about that: Nothing about
outgassing, and nothing about how to use pcb's properly to get a good solder.
If you have any information about that, I please ask you to send it at the
address
[log in to unmask]
which is my personal address.
Toni Casas Pujadas
Quality Enginner
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=========================================================================
Date: Sat, 13 Jun 1998 08:53:09 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Outgassing problem in pcb's soldering
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
if u think humidity might be a cause - try drying the boards in an oven for 20
minutes at 250F . Then try cutting out a section and perform a solder float
test - floating coupon in a solder pot. If you get blowholes - outgassing -
would start sectioning boards and looking at copper walls in general - it
might just be ur boards.
Regards
Richard Fudalewski
Atotech Canada
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=========================================================================
Date: Sat, 13 Jun 1998 09:40:43 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Outgassing problem in pcb's soldering
X-To: [log in to unmask]
Mime-Version: 1.0
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Content-transfer-encoding: 7bit
Toni
It is difficult to believe that your problem is caused by
moisture in the bare boards, since you have performed
surface mount soldering operations and that raises
the temperature of the board above 100C during the
soldering.
If you clean your boards after surface mount soldering
operations, you could be leaving moisture in the plated
through holes and this is what is causing the outgassing
explosions of solder. I would look at this first.
The other source of outgassing would be bare boards with
voids in the plated through holes (component and via) which
allow outgassing of the laminate during soldering temperatures.
Check and see if your boards were bought to a specification
such as IPC-RB-276 or IPC-6012. This would require your
board supplier to do thermal stress/microsections to assure
the quality of the boards prior to shipment. Contact them
and ask to see the microsections or do your own through holes
which exhibit outgassing.
Susan Mansilla
Technical Director
Robisan Lab
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=========================================================================
Date: Sat, 13 Jun 1998 11:14:10 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Harold <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Harold <[log in to unmask]>
Subject: SMT Tape splicers
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0004_01BD96BC.63E45B90"
This is a multi-part message in MIME format.
------=_NextPart_000_0004_01BD96BC.63E45B90
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
We're looking for a supplier of SMT Tape splicers and supplies. Can =
anyone give us the name of a company who makes such devices for hand =
splicing? =20
Harold Newman =20
[log in to unmask]
------=_NextPart_000_0004_01BD96BC.63E45B90
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD W3 HTML//EN">
<HTML>
<HEAD>
<META content=3Dtext/html;charset=3Diso-8859-1 =
http-equiv=3DContent-Type>
<META content=3D'"MSHTML 4.72.2106.6"' name=3DGENERATOR>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT color=3D#000000 size=3D2>We're looking for a supplier of SMT =
Tape=20
splicers and supplies. Can anyone give us the name of a company who =
makes such=20
devices for hand splicing? </FONT></DIV>
<DIV><FONT color=3D#000000=20
size=3D2> &nbs=
p; =20
Harold Newman </FONT></DIV>
<DIV><FONT color=3D#000000=20
size=3D2> &nbs=
p; =20
[log in to unmask]</FONT></DIV></BODY></HTML>
------=_NextPart_000_0004_01BD96BC.63E45B90--
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=========================================================================
Date: Sat, 13 Jun 1998 17:46:00 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
SMITH RUSSELL MSM PO US <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: SMITH RUSSELL MSM PO US <[log in to unmask]>
Subject: Re: Tape residue elimination
X-To: Duane Briggs <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain
You might try peelable solder mask products, there are several around I
recall one called wonder mask that was a latex based product and there
is a Lackwerk peters product that works quite well.
with regard to tape there are several 3m tapes with high temp adhesive
on them , I believe you will have better luck with the polyimide based
film tapes.
----------
From: Duane Briggs
To: [log in to unmask]
Subject: [TN] Tape residue elimination
Date: Monday, June 01, 1998 8:29PM
Gold fingers have to be covered during flow soldering. Is there any
tape
that does NOT leave ANY residue? If not, what is the best, cheapest way
of
removing the residue? Pallets are not an option for us unfortunately.
Duane
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=========================================================================
Date: Sat, 13 Jun 1998 23:24:01 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bev Christian <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bev Christian <[log in to unmask]>
Subject: Re: Outgassing problem in pcb's soldering
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Toni,
I would like to add to the good comments from Richard and Susan.
The third thing you can do is check to see that your preheat is high enough
to drive off all the solvent of your flux before it hits the wave. If it
doesn't, what you may be seeing is the relatively explosive evaporation of
the remaining solvent when it hits the molten metal wave.
Also, typical alcohol based fluxes have about 0.15% water content, but if
your plant is not air-conditioned or the humidity just over whelms the
system your flux can start to take up water from the atmosphere as water and
isopropyl alcohol are "cousins" (like dissolves like). % water levels can
go quite high and I have seen problems starting at 1.5% and real nasty
problems at 2%. Obviously this really only applies to wave, foam and drum
spray fluxing. More modern spray fluxes do not have this problem as the
container is closed and the flux is not recaptured once it is dispensed.
good luck,
Bev Christian
Manager, Materials Engineering Lab
Nortel
> ----------
> From: [log in to unmask][SMTP:[log in to unmask]]
> Sent: Saturday, June 13, 1998 6:24 AM
> To: [log in to unmask]
> Subject: [TN] Outgassing problem in pcb's soldering
>
> Dear Sir /Mme:
>
> My name is Toni Casas and I'm working as a quality engineer in an
> entreprise
> which performs electronic circuits and devices for industrial aplications.
>
> I have heard about your organization and I'm sending you this e-mail in
> order to ask some things about soldering processes. I explain a little
> about
> our productive process.
>
> First of all we perform SMD assembly. Then we mount conventional
> components
> by hand and then the pcb's are soldered in a new technology soldering
> line.
>
> We have problems, especially in large pcb's, by the humidity of the pcb
> amb
> the problem known by the name of outgassing. You know, we enter the pcb
> into
> the soldering line and when the tin reaches any pad of the pcb, then it
> explodes by the presence of humidity. Our pcb's supplier says that is the
> outgassing problem, but we know nothing about that: Nothing about
> outgassing, and nothing about how to use pcb's properly to get a good
> solder.
>
> If you have any information about that, I please ask you to send it at the
> address
>
> [log in to unmask]
>
> which is my personal address.
>
> Toni Casas Pujadas
> Quality Enginner
>
> ################################################################
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> To subscribe/unsubscribe, send a message to [log in to unmask] with
> following text in the body:
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> ################################################################
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> information.
> For technical support contact Hugo Scaramuzza at [log in to unmask] or
> 847-509-9700 ext.312
> ################################################################
>
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=========================================================================
Date: Sun, 14 Jun 1998 11:28:40 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
ceng <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: ceng <[log in to unmask]>
Subject: Re: BGA periphery clearance
X-To: Thomas C Han <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-Transfer-Encoding: 7bit
----------
> From: Thomas C Han <[log in to unmask]>
> To: [log in to unmask]
> Subject: Re: [TN] BGA periphery clearance
> Date: Saturday, June 13, 1998 3:13 AM
>
> Ernst,
>
> >From a manufacturing stand point, space around the BGAs are needed to
> facilitate rework. Without the space, components around the BGAs will be
> damaged during rework. Your manufacturer will charge heftier price to
> manufacture those boards without the space and in worse case you may have
> to scrap the boards that require BGA rework.
>
>
> _____________________________________________________________________
> You don't need to buy Internet access to use free Internet e-mail.
> Get completely free e-mail from Juno at http://www.juno.com
> Or call Juno at (800) 654-JUNO [654-5866]
>
> ################################################################
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following text in the body:
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information.
> For technical support contact Hugo Scaramuzza at [log in to unmask] or
847-509-9700 ext.312
> ################################################################
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=========================================================================
Date: Sun, 14 Jun 1998 16:46:05 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Gould <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Gould <[log in to unmask]>
Subject: Re: Tape residue elimination
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Hello Duane,
you could try a good quality paper masking tape. As long as it is peeled off
while the panel is still warm after soldering, it should not leave a
residue.
Otherwise, there are some very good (and expensive) masking tapes used in
hot air solder levelling, and believe me that needs a good tape. We use one
which leaves no residue and withstands the extremes of hot air levelling
without lifting. Expensive though the tape is, it is cheaper than peelable
mask although that product also works well. Your pcb supplier should be able
to supply your pcb's with peelable mask.
I can't remember the details of the tape but if you email me at my office,
[log in to unmask], I will get the details for you. You can also get tape
dispensers which deliver a measured length of tape pre-cut which speeds up
the application. Manual machines are cheap but you can get motorised ones
for volume use.
Regards
Paul Gould
Teknacron Circuits Ltd
Isle of Wight, UK
>From: Duane Briggs
>To: [log in to unmask]
>Subject: [TN] Tape residue elimination
>Date: Monday, June 01, 1998 8:29PM
>
>Gold fingers have to be covered during flow soldering. Is there any
>tape
>that does NOT leave ANY residue? If not, what is the best, cheapest way
>of
>removing the residue? Pallets are not an option for us unfortunately.
>
>Duane
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=========================================================================
Date: Sun, 14 Jun 1998 16:29:57 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Gould <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Gould <[log in to unmask]>
Subject: Re: Outgassing problem in pcb's soldering
MIME-Version: 1.0
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Hello Toni,
You appear to have a bad case of outgassing. This is coming from voids in
the copper plating through the holes. This can be due to thin plating or
poor hole drilling, or usually both.
If you can get micro sections of the holes, check plating thickness is more
than 20 microns and that the drilling is are not unduly rough.
A long low temperature bake is better than a short high temperature one. Say
about 100 C for 2 hours should be sufficient but if the pcb's are really
bad, it may take longer.
Ask your supplier to submit a spare pcb with each batch in future so that
you can conduct solderability tests before assembly. You will then be able
to reject the batch if quality is not acceptable.
Good quality pcb's should not require baking but some assembly shops do this
as a precaution, especially after long periods of storage in damp
conditions.
Hope this helps,
Regards
Paul Gould
Teknacron Circuits Ltd
UK
+44 1983 866531 Tel
+44 1983 865141 Fax
-----Original Message-----
From: [log in to unmask] <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: 13 June 1998 11:44
Subject: [TN] Outgassing problem in pcb's soldering
>Dear Sir /Mme:
>
>My name is Toni Casas and I'm working as a quality engineer in an
entreprise
>which performs electronic circuits and devices for industrial aplications.
>
>I have heard about your organization and I'm sending you this e-mail in
>order to ask some things about soldering processes. I explain a little
about
>our productive process.
>
>First of all we perform SMD assembly. Then we mount conventional components
>by hand and then the pcb's are soldered in a new technology soldering line.
>
>We have problems, especially in large pcb's, by the humidity of the pcb amb
>the problem known by the name of outgassing. You know, we enter the pcb
into
>the soldering line and when the tin reaches any pad of the pcb, then it
>explodes by the presence of humidity. Our pcb's supplier says that is the
>outgassing problem, but we know nothing about that: Nothing about
>outgassing, and nothing about how to use pcb's properly to get a good
solder.
>
>If you have any information about that, I please ask you to send it at the
>address
>
>[log in to unmask]
>
>which is my personal address.
>
>Toni Casas Pujadas
>Quality Enginner
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=========================================================================
Date: Mon, 15 Jun 1998 11:35:01 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "by Dr. Eden Chen XianSong"
<[log in to unmask]>
Subject: Conductive Epoxy for Solder termination
X-cc: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII; name="cc:Mail"
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Dear Sir,
Some silver-filled conductive epoxies in the market claim to be solder
replacement, but successful use of these material require a very good
understanding of the epoxies properties, the process and CTE mismatch.
The epoxy can be deposited to the pad by stencil printing or
dispensing,
Dispensing process has the tailing problem which can cause short for
0402 chip resistor/capacitor. It is very difficult to form the fillet
for epoxy, because the epoxy may have a gap between the side of chip
resistor/capacitor and dot peak of epoxy. How much should the
placement force be applied and how big should the dot size for 0402
resistor/capacitor?
I like to discuss the above-mentioned issue in the TECHNET
Eden
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=========================================================================
Date: Mon, 15 Jun 1998 10:36:54 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bob Willis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bob Willis <[log in to unmask]>
Subject: Video on Wave Fluxing
X-To: SMART-E-LINK <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
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Does any one have a video tape with any material of wave fluxing of wave
wax fluxing. The wave fluxer was popular in the late seventies for solder
cut solder and for use with stay wax systems. It was also used in the early
days of low residue fluxes when they did not foam that well.
The material is required for a new CD ROM on wave soldering.
Many thanks for any help.
"THE SOLUTION PROVIDER FOR YOUR MANUFACTURING PROBLEMS"
Bob Willis
Process Engineering Consultant
Electronic Presentation Services
2 Fourth Avenue, Chelmsford, Essex CM1 4HA. England.
Tel: (44) 01245 351502
Fax: (44) 01245 496123
Mobile: (44) 0860 775858
Email: [log in to unmask]
Internet Home Page: http://www.bobwillis.co.uk
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=========================================================================
Date: Mon, 15 Jun 1998 05:05:58 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mike Wilson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mike Wilson <[log in to unmask]>
Subject: Not read: Subscribe
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Your message
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Cc:
Subject: Subscribe
Sent: Fri, 3 Apr 1998 15:00:57 -0700
was not read
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=========================================================================
Date: Mon, 15 Jun 1998 09:42:53 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ed Holton <[log in to unmask]>
Subject: Re: Advertising on the TechNet Forum
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
It appears that I missed the original email issue of this item, thus I am
responding to this reply. I disagree with this suggestion. I am oppossed
to advertising on the technet by individuals, yet I have often found it
helpful when someone requests information on a product or process, asking
for real life experience with a product/process, or just general
information on what company can do what, that you respond with the company
name or product information, based on your past experience via the technet.
Vendors should contact the person directly! The purpose of our forum is to
share information, and to me this also includes success/failure stories of
products or help in locating products to enhance our process. Someone
elses request may be a problem that I have yet to encounter, and if the
information helps me be pro-active, then we all win. If the specific reply
is made to the individual requesting information, then we all lose out.
Ed Holton
Hella Electronics
734-414-0944
[log in to unmask] on 06/11/98 09:04:11 PM
Please respond to [log in to unmask]
To: [log in to unmask]
cc: (bcc: Ed Holton/Hella North America Inc.)
Subject: Re: [TN] Advertising on the TechNet Forum
To all TechNetters & the IPC:
Just a suggestion. Since it seems that people have a hard time to refrain
from blatent advertising on what is supposed to be a technical forum, I
would suggest two things:
1. If anyone asks for a vendor's information or a recommendation for
certain vendors, I suggest that respondants be required to e-mail that
person directly and NOT on this forum.
2. Perhaps the IPC could set up a forum where those that want to see this
information could go and get it without clogging up TechNet.
I believe that the TechNet forum is an invaluable tool that helps the
entire industry. Let's not spoil it with thinly disquised spam.
Thanks to all who have provided keen insights for our industry.
Phil Culpovich
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=========================================================================
Date: Mon, 15 Jun 1998 07:14:31 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bill Davis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Davis <[log in to unmask]>
Subject: Re: Tape residue elimination
X-To: Paul Gould <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Have you tried polyimide tapes?
> -----Original Message-----
> From: Paul Gould [SMTP:[log in to unmask]]
> Sent: Sunday, June 14, 1998 8:46 AM
> To: [log in to unmask]
> Subject: Re: [TN] Tape residue elimination
>
> Hello Duane,
>
> you could try a good quality paper masking tape. As long as it is peeled off
> while the panel is still warm after soldering, it should not leave a
> residue.
>
> Otherwise, there are some very good (and expensive) masking tapes used in
> hot air solder levelling, and believe me that needs a good tape. We use one
> which leaves no residue and withstands the extremes of hot air levelling
> without lifting. Expensive though the tape is, it is cheaper than peelable
> mask although that product also works well. Your pcb supplier should be able
> to supply your pcb's with peelable mask.
>
> I can't remember the details of the tape but if you email me at my office,
> [log in to unmask], I will get the details for you. You can also get tape
> dispensers which deliver a measured length of tape pre-cut which speeds up
> the application. Manual machines are cheap but you can get motorised ones
> for volume use.
>
> Regards
> Paul Gould
> Teknacron Circuits Ltd
> Isle of Wight, UK
>
> >From: Duane Briggs
> >To: [log in to unmask]
> >Subject: [TN] Tape residue elimination
> >Date: Monday, June 01, 1998 8:29PM
> >
> >Gold fingers have to be covered during flow soldering. Is there any
> >tape
> >that does NOT leave ANY residue? If not, what is the best, cheapest way
> >of
> >removing the residue? Pallets are not an option for us unfortunately.
> >
> >Duane
>
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> ################################################################
>
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=========================================================================
Date: Mon, 15 Jun 1998 09:45:55 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Coleman, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Coleman, Ron" <[log in to unmask]>
Subject: Re: Tape residue elimination
X-To: Bill Davis <[log in to unmask]>
We evaluated several hot air levelling tapes and have found two tapes that
have completely eliminated any quality issues associated with HAL tapes,
i.e., residue, lifting , delamination etc.. If you would like more info on
the tapes we identified please contact me directly via email.
-----Original Message-----
From: Bill Davis <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Monday, June 15, 1998 9:15 AM
Subject: Re: [TN] Tape residue elimination
>Have you tried polyimide tapes?
>
>> -----Original Message-----
>> From: Paul Gould [SMTP:[log in to unmask]]
>> Sent: Sunday, June 14, 1998 8:46 AM
>> To: [log in to unmask]
>> Subject: Re: [TN] Tape residue elimination
>>
>> Hello Duane,
>>
>> you could try a good quality paper masking tape. As long as it is peeled
off
>> while the panel is still warm after soldering, it should not leave a
>> residue.
>>
>> Otherwise, there are some very good (and expensive) masking tapes used in
>> hot air solder levelling, and believe me that needs a good tape. We use
one
>> which leaves no residue and withstands the extremes of hot air levelling
>> without lifting. Expensive though the tape is, it is cheaper than
peelable
>> mask although that product also works well. Your pcb supplier should be
able
>> to supply your pcb's with peelable mask.
>>
>> I can't remember the details of the tape but if you email me at my
office,
>> [log in to unmask], I will get the details for you. You can also get
tape
>> dispensers which deliver a measured length of tape pre-cut which speeds
up
>> the application. Manual machines are cheap but you can get motorised ones
>> for volume use.
>>
>> Regards
>> Paul Gould
>> Teknacron Circuits Ltd
>> Isle of Wight, UK
>>
>> >From: Duane Briggs
>> >To: [log in to unmask]
>> >Subject: [TN] Tape residue elimination
>> >Date: Monday, June 01, 1998 8:29PM
>> >
>> >Gold fingers have to be covered during flow soldering. Is there any
>> >tape
>> >that does NOT leave ANY residue? If not, what is the best, cheapest way
>> >of
>> >removing the residue? Pallets are not an option for us unfortunately.
>> >
>> >Duane
>>
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1.8c
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847-509-9700 ext.312
>> ################################################################
>>
>
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>
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=========================================================================
Date: Mon, 15 Jun 1998 07:57:07 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bill Davis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Davis <[log in to unmask]>
Subject: Entek OSP
MIME-Version: 1.0
Content-Type: text/plain
Yo techies! Has anyone out there had experience with Ethone-OMI's Enteck OSP? We're using it here as we have some 0.4mm pitch devices & have had problems managing the thickness of the OSP. We see residues which causes non-weeting on the pads, & the gold edge connector still had enough OSP left to cause connection problems. Any help would be greatly appreciated...
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=========================================================================
Date: Mon, 15 Jun 1998 08:01:29 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bill Davis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Davis <[log in to unmask]>
Subject: Adhesives for Attaching Heat SInks to IC's
MIME-Version: 1.0
Content-Type: text/plain
Does anyone have a specific adhesive for attaching aluminum heatsinks to IC's? We're using Loctite 315, but are having dismal results (the heatsinks keep falling off).
> *********************************
> Bill Davis, Ph.D.
> Diamond Multimedia Systems
> Senior Scientist
> Tel. 408.325.7868
> Cell. 408.888.5650
> e-mail: [log in to unmask]
> ********************************
>
>
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=========================================================================
Date: Mon, 15 Jun 1998 11:20:09 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Nicolas van der Heyden <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Nicolas van der Heyden <[log in to unmask]>
Subject: Gold contamination!
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
I Technetters,
I have a question about the Gold-Nickel coating.
I want to know if I will have a gold contamination
problem in the solder wave?
If yes, how I must calculated the number of
boards wich pass before I must change the solder?
(or time..)
Note: I have an automatic solder refiller and I also
Know the limit of gold (0.2%, ANSI/J-STD-001A table 5.1)
but that's all!
Thanks for all for your help
,,
( . . )
----------o00---O---00o----------------------------------
Nicolas van der Heyden
------------------------------------------------------------
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=========================================================================
Date: Mon, 15 Jun 1998 12:08:50 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Roger Mouton <[log in to unmask]>
Subject: Re: Advertising on the TechNet Forum
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Re: the E Holton comments concerning advertising. These are points well
taken. The IPC's position is very clear but there is indeed abuse of the
"system".....but only by a few. And for the most part we all know who they
are. Just delete them when you see them.
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=========================================================================
Date: Mon, 15 Jun 1998 09:48:54 PDT
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brad Vanderhoof <[log in to unmask]>
Organization: Xerox Corporation
Subject: Re: Adhesives for Attaching Heat SInks to IC's
X-To: Bill Davis <[log in to unmask]>
I have seen this problem and identified the root cause as foreign material
or contamination. Some common sources: excessive mold release on molded
component packages, machining or plating chemicals on heatsinks, and the
worst news, self-inflicted fun from residual assembly process materials.
BV
-----Original Message-----
From: Bill Davis [SMTP:[log in to unmask]]
Sent: Monday, June 15, 1998 8:01 AM
To: [log in to unmask]
Subject: [TN] Adhesives for Attaching Heat SInks to IC's
Does anyone have a specific adhesive for attaching aluminum heatsinks to
IC's? We're using Loctite 315, but are having dismal results (the heatsinks
keep falling off).
> *********************************
> Bill Davis, Ph.D.
> Diamond Multimedia Systems
> Senior Scientist
> Tel. 408.325.7868
> Cell. 408.888.5650
> e-mail: [log in to unmask]
> ********************************
>
>
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=========================================================================
Date: Mon, 15 Jun 1998 10:00:38 PDT
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brad Vanderhoof <[log in to unmask]>
Organization: Xerox Corporation
Subject: Re: Gold contamination!
X-To: Nicolas van der Heyden <[log in to unmask]>
Calculating the gold content in a solder pot is a good effort but
difficult. A solder supplier or independent lab can test samples
periodically. This data is useful to monitor the solder pot as well as
refine any empirical model.
BV
-----Original Message-----
From: Nicolas van der Heyden [SMTP:[log in to unmask]]
Sent: Monday, June 15, 1998 8:20 AM
To: [log in to unmask]
Subject: [TN] Gold contamination!
I Technetters,
I have a question about the Gold-Nickel coating.
I want to know if I will have a gold contamination
problem in the solder wave?
If yes, how I must calculated the number of
boards wich pass before I must change the solder?
(or time..)
Note: I have an automatic solder refiller and I also
Know the limit of gold (0.2%, ANSI/J-STD-001A table 5.1)
but that's all!
Thanks for all for your help
,,
( . . )
----------o00---O---00o----------------------------------
Nicolas van der Heyden
------------------------------------------------------------
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=========================================================================
Date: Mon, 15 Jun 1998 12:05:47 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Coleman, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Coleman, Ron" <[log in to unmask]>
Subject: Re: Entek OSP
X-To: Bill Davis <[log in to unmask]>
Bill,
Controlling the thickness of OSP's is not an uncommon problem. Some OSP's
are more difficult to control than others. The technique used to measure
thickness is also critical to accuracy and reliability of thickness.
Evaporation and by product reaction play biggest role in ability to control
thickness. The type of acid medium used will also affect the solubility thus
thickness. The product you are using has a long history of thickness control
issues. Contact me direct if you would like to discuss in more detail
Rob.
nal Message-----
From: Bill Davis <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Monday, June 15, 1998 10:00 AM
Subject: [TN] Entek OSP
>Yo techies! Has anyone out there had experience with Ethone-OMI's Enteck
OSP? We're using it here as we have some 0.4mm pitch devices & have had
problems managing the thickness of the OSP. We see residues which causes
non-weeting on the pads, & the gold edge connector still had enough OSP left
to cause connection problems. Any help would be greatly appreciated...
>
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=========================================================================
Date: Mon, 15 Jun 1998 13:41:45 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lenny Kurup <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lenny Kurup <[log in to unmask]>
Subject: Re: Gold contamination!
X-To: Nicolas van der Heyden <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: TEXT/PLAIN; charset=US-ASCII
Hi Nicolas,
You will need to establish a contamination history, by analytical analysis
of the solder, < 0.15% Au b.w., is usually recommended. Board count can
then be used, but still only as a guideline, analytical analysis of the
solder should be your determining factor. Also, please keep in mind, solder
joint failure will result, if the gold thickness is greater than 12
microinches.
Lenny Kurup
EMX Enterprises Ltd.
On Mon, 15 Jun 1998, Nicolas van der Heyden wrote:
> I Technetters,
>
> I have a question about the Gold-Nickel coating.
> I want to know if I will have a gold contamination
> problem in the solder wave?
> If yes, how I must calculated the number of
> boards wich pass before I must change the solder?
> (or time..)
>
> Note: I have an automatic solder refiller and I also
> Know the limit of gold (0.2%, ANSI/J-STD-001A table 5.1)
> but that's all!
>
> Thanks for all for your help
>
>
> ,,
> ( . . )
> ----------o00---O---00o----------------------------------
> Nicolas van der Heyden
>
> ------------------------------------------------------------
>
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> ################################################################
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>
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=========================================================================
Date: Mon, 15 Jun 1998 14:15:37 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Wallisch, Ernst" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Wallisch, Ernst" <[log in to unmask]>
Subject: BGA land patterns
MIME-Version: 1.0
Content-Type: text/plain
Fellow Technetters:
Could anyone recommend land pattern size, via size / configuration,
and mask size / configuration for a 357 full matrix 1.27 mm pitch PBGA?
I am thinking of using a "dog-bone" pad/via configuration with
0.025" pad diameter and 0.030" mask opening. Pad to via distance of 0.035"
(centres). Via pad diameter of 0.024" and 0.017" mask opening.
Is this reasonable? Any recommendations?
Thanks,
Ernst Wallisch
Manufacturing Engineering
Computing Devices Canada
[log in to unmask]
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=========================================================================
Date: Mon, 15 Jun 1998 14:53:10 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tom Kropski <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tom Kropski <[log in to unmask]>
Subject: Re: Advertising on the TechNet Forum
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Ed,
Well said. I too strongly agree that success/failure stories of vendor
products is important and lead to some very good discussions (or opinions).
-----Original Message-----
From: Ed Holton <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Monday, June 15, 1998 10:04 AM
Subject: Re: [TN] Advertising on the TechNet Forum
>It appears that I missed the original email issue of this item, thus I am
>responding to this reply. I disagree with this suggestion. I am oppossed
>to advertising on the technet by individuals, yet I have often found it
>helpful when someone requests information on a product or process, asking
>for real life experience with a product/process, or just general
>information on what company can do what, that you respond with the company
>name or product information, based on your past experience via the technet.
>Vendors should contact the person directly! The purpose of our forum is to
>share information, and to me this also includes success/failure stories of
>products or help in locating products to enhance our process. Someone
>elses request may be a problem that I have yet to encounter, and if the
>information helps me be pro-active, then we all win. If the specific reply
>is made to the individual requesting information, then we all lose out.
>
>Ed Holton
>Hella Electronics
>734-414-0944
>
>
>
>
>[log in to unmask] on 06/11/98 09:04:11 PM
>
>Please respond to [log in to unmask]
>
>To: [log in to unmask]
>cc: (bcc: Ed Holton/Hella North America Inc.)
>Subject: Re: [TN] Advertising on the TechNet Forum
>
>
>
>
>To all TechNetters & the IPC:
>
>Just a suggestion. Since it seems that people have a hard time to refrain
>from blatent advertising on what is supposed to be a technical forum, I
>would suggest two things:
>
>1. If anyone asks for a vendor's information or a recommendation for
>certain vendors, I suggest that respondants be required to e-mail that
>person directly and NOT on this forum.
>
>2. Perhaps the IPC could set up a forum where those that want to see this
>information could go and get it without clogging up TechNet.
>
>I believe that the TechNet forum is an invaluable tool that helps the
>entire industry. Let's not spoil it with thinly disquised spam.
>
>Thanks to all who have provided keen insights for our industry.
>
>Phil Culpovich
>
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>[log in to unmask] or 847-509-9700 ext.312
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=========================================================================
Date: Mon, 15 Jun 1998 15:22:30 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Gagrani, Kishore" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Gagrani, Kishore" <[log in to unmask]>
Subject: Heat Reflective Coating
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Anu inputs ??
How to model the application of a "heat reflective coating" to
suppress IR on a 2.8 cubic foot 63 lbs engine cowling for a helo.
Material - unknown
Application - unknown
# of steps - unknown
Thanks
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=========================================================================
Date: Mon, 15 Jun 1998 16:01:31 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Alex Neussendorfer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Alex Neussendorfer <[log in to unmask]>
Subject: Re: BGA land patterns
X-To: "Wallisch, Ernst" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-Transfer-Encoding: 7bit
Ernst,
In a previous employ, I used land and mask sizes as you mention, but
suggest allowing the vias size to be selected by the substrate vendor. We
used a .0145 inch drill on many of these types. The edge of the drilled
hole should not be closer to the part edge than .025 inch.
Alex
----------
> From: Wallisch, Ernst <[log in to unmask]>
> To: [log in to unmask]
> Subject: [TN] BGA land patterns
> Date: Monday, June 15, 1998 1:15 PM
>
> Fellow Technetters:
>
> Could anyone recommend land pattern size, via size /
configuration,
> and mask size / configuration for a 357 full matrix 1.27 mm pitch PBGA?
>
> I am thinking of using a "dog-bone" pad/via configuration with
> 0.025" pad diameter and 0.030" mask opening. Pad to via distance of
0.035"
> (centres). Via pad diameter of 0.024" and 0.017" mask opening.
>
> Is this reasonable? Any recommendations?
>
> Thanks,
>
> Ernst Wallisch
> Manufacturing Engineering
> Computing Devices Canada
> [log in to unmask]
>
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=========================================================================
Date: Mon, 15 Jun 1998 15:30:19 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mitch Morey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mitch Morey <[log in to unmask]>
Subject: Reference designators
X-To: [log in to unmask]
We (internally)have a growing debate going on in regards to reference
designators. We have (long ago) adopted IEEE 315 as the "bible" for
schematic symbol and reference designators, but the standard seems
misleading.
Take for instance OP-AMPs should have "AR" as the designations,
OSCILLATORS should be "G", ATTENUATORS should be "AT" according
to how you interpret the standard.
But, aren't these all, in fact, microcircuits ("U") or integrated-circuit
packages in today's practice? Does anyone else have a better system
for defining reference designators, per "some" standard? It seems IEEE-
315/315A should have been out-dated long ago.
Help?
Mitch
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=========================================================================
Date: Mon, 15 Jun 1998 16:31:19 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lisa Williams <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lisa Williams <[log in to unmask]>
Subject: FAB: Plugged, Filled &/or Tented Vias
Mime-Version: 1.0
Content-Type: text/plain
IPC is forming a task group that will develop the acceptability requirements of
plugged, filled and tented vias. This may involve round robin testing. If you are
interested in joining this task group, please contact Lisa Williams at the IPC.
Lisa Williams
IPC
2215 Sanders Road
Northbrook, IL 60062
URL: www.ipc.org
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=========================================================================
Date: Mon, 15 Jun 1998 15:03:58 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Matthew Park <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Matthew Park <[log in to unmask]>
Subject: Re: Conductive Epoxy for Solder termination
Mime-Version: 1.0
Content-Type: text/plain
Dear Dr. EC,
A successful implementation of electrically conductive epoxies
for SMT application is more than understanding those issues
you stated. And it is NOT definitely a replacement for tin/lead
solderpaste as some mfg of conductive epoxies claim. It is not
very difficult to form fillet with the epoxy. Simply epoxies DO NOT
form fillets and wet.
I performed a few sample tests one/two years ago when
one conductive epoxy mfg claimed it prints like any other
solderpaste and it is a replacement for solderpaste. I
concluded that some fundamental issues have to be addressed
to make electrically conductive epoxies useful in a SMT
manufacturing environment,
- impractical storage/shipping temp, -70'c to-40'c
- too suceptable to moisure and dry out too quickly
- do not adhere good to tin/lead surface. A test revealed it
adhered well to bare copper and solder mask surfaces. It is
proper to have a different metallic finish for SMT component
soldering terminals and board surface than tin/lead.
- redesigning board layout for epoxy application such as pad
sizes, conductor space req's etc...
- redesigning component soldering terminals for epoxy
application.
- poor performance of printability of epoxy
- reworkability
To answer your questions, it is vital to provide only an exact
amount of epoxy for component terminal area. A typical printed
thickness of epoxy should be at 0.1mm. That is why I believe a
dispensing option is not suitable. It won't provide a controlled
coverage of epoxy for soldering terminals. There are too many
parameter variations to control such as epoxy consistency, dot
size, dot height, placement pressure etc...
regards
Matthew
NII-Norsat International Inc.
>>> "by Dr. Eden Chen XianSong"
<[log in to unmask]> June
14, 1998 8:35 pm >>>
Dear Sir,
Some silver-filled conductive epoxies in the market claim to
be solder
replacement, but successful use of these material require a
very good
understanding of the epoxies properties, the process and
CTE mismatch.
The epoxy can be deposited to the pad by stencil printing or
dispensing,
Dispensing process has the tailing problem which can cause
short for
0402 chip resistor/capacitor. It is very difficult to form the fillet
for epoxy, because the epoxy may have a gap between the
side of chip
resistor/capacitor and dot peak of epoxy. How much should
the
placement force be applied and how big should the dot size
for 0402
resistor/capacitor?
I like to discuss the above-mentioned issue in the TECHNET
Eden
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Date: Tue, 16 Jun 1998 08:10:43 +0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Marco Biagtan <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Marco Biagtan <[log in to unmask]>
Subject: Textbooks on Photo tools
MIME-Version: 1.0
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Hi Guys,
I was wondering if anyone can recommend a good book (or any text) about
photo tooling; procedures for evaluation, and parameters to take into
consideration when evaluating. Any text or document will be appreciated.
Thanks in advance!
Marco Biagtan
NEC Components Philippines, Inc.
Process Engineer
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Date: Tue, 16 Jun 1998 09:15:13 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "by Dr. Eden Chen XianSong"
<[log in to unmask]>
Subject: Re: Conductive Epoxy for Solder termination
X-To: [log in to unmask]
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In-Reply-To: <[log in to unmask]>
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Dear Matthew,
Thank you for your advice about the conductive epoxy.
Why do we want transfer from Ag/Pd capacitor or solder/pure Tin
capacitor? Because (1) our supplier from Japan will stop supplying
the Ag/Pd capacitor and it is very difficult to get Ag/Pd capacitor at
different value. It is even more difficult to get Ag/Pd resistor; (2)
Ag/Pd terminal is expensive. Our product is optoelectronic component,
it is quite cheap about a few dollar.
We have very long history to attach Ag/Pd capacitor using conductive
epoxy. it is without any problem.
The solder/Tin termination capacitor/resistor attached with some
conductive experience resistance increase when exposure to 85/85 test.
But we do find one epoxy can pass 1000 hrs 85/85 test with very small
resistance change with encapsulant and without encapsulant.
Your advice is very correct about stencil printing and dispensing.
The printing quality is better than that using dispensing. The 4 mil
stencil was used.
When I am doing the process evaluation about the dispensing, I face a
lot of problem such as tailing, insufficient coverage of epoxy and no
fillet. After the unit was encapsulated, it go trough 3 times IR
reflow, then the resistance increase has been found.
Best Regards
Eden Chen
______________________________ Reply Separator _________________________________
Subject: Re: [TN] Conductive Epoxy for Solder termination
Author: Non-HP-MPARK ([log in to unmask]) at HP-Singapore,mimegw51
Date: 6/16/98 6:03 AM
Dear Dr. EC,
A successful implementation of electrically conductive epoxies
for SMT application is more than understanding those issues
you stated. And it is NOT definitely a replacement for tin/lead
solderpaste as some mfg of conductive epoxies claim. It is not very
difficult to form fillet with the epoxy. Simply epoxies DO NOT form
fillets and wet.
I performed a few sample tests one/two years ago when
one conductive epoxy mfg claimed it prints like any other
solderpaste and it is a replacement for solderpaste. I
concluded that some fundamental issues have to be addressed
to make electrically conductive epoxies useful in a SMT
manufacturing environment,
- impractical storage/shipping temp, -70'c to-40'c
- too suceptable to moisure and dry out too quickly
- do not adhere good to tin/lead surface. A test revealed it
adhered well to bare copper and solder mask surfaces. It is
proper to have a different metallic finish for SMT component
soldering terminals and board surface than tin/lead.
- redesigning board layout for epoxy application such as pad
sizes, conductor space req's etc...
- redesigning component soldering terminals for epoxy
application.
- poor performance of printability of epoxy
- reworkability
To answer your questions, it is vital to provide only an exact
amount of epoxy for component terminal area. A typical printed
thickness of epoxy should be at 0.1mm. That is why I believe a
dispensing option is not suitable. It won't provide a controlled
coverage of epoxy for soldering terminals. There are too many
parameter variations to control such as epoxy consistency, dot
size, dot height, placement pressure etc...
regards
Matthew
NII-Norsat International Inc.
>>> "by Dr. Eden Chen XianSong"
<[log in to unmask]> June
14, 1998 8:35 pm >>>
Dear Sir,
Some silver-filled conductive epoxies in the market claim to
be solder
replacement, but successful use of these material require a
very good
understanding of the epoxies properties, the process and
CTE mismatch.
The epoxy can be deposited to the pad by stencil printing or
dispensing,
Dispensing process has the tailing problem which can cause
short for
0402 chip resistor/capacitor. It is very difficult to form the fillet
for epoxy, because the epoxy may have a gap between the
side of chip
resistor/capacitor and dot peak of epoxy. How much should
the
placement force be applied and how big should the dot size
for 0402
resistor/capacitor?
I like to discuss the above-mentioned issue in the TECHNET
Eden
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=========================================================================
Date: Tue, 16 Jun 1998 10:13:20 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "by Dr. Eden Chen XianSong"
<[log in to unmask]>
Subject: Casting epoxy
MIME-Version: 1.0
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Dear Sir,
I am looking for a casting epoxy for optoelectronic component. The
epoxy should have low moisture absorb rate and CTE less than 60 ppm.
The epoxy can be casted to form the lens and have good clarity and
light transmissivity.
In the market, the casting epoxies have very high moisture absorb rate
and high CTE due to less filler to be added to the epoxy for light
transmitting purpose. This will cause the serious popcorn when the
unit is going to reflow.
I appreciat than i can get some information from you.
Eden Chen
Senior Engineer
HP Singapore
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=========================================================================
Date: Tue, 16 Jun 1998 07:32:43 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Eltek Ltd. - Process Engineering" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Eltek Ltd. - Process Engineering" <[log in to unmask]>
Subject: Re: Entek OSP
X-To: Bill Davis <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Bill,
Write little bit more about your process ( vertical , horizontal , surface
preparation , process control , etc )
regards
At 07:57 15/06/98 -0700, you wrote:
>Yo techies! Has anyone out there had experience with Ethone-OMI's Enteck
OSP? We're using it here as we have some 0.4mm pitch devices & have had
problems managing the thickness of the OSP. We see residues which causes
non-weeting on the pads, & the gold edge connector still had enough OSP left
to cause connection problems. Any help would be greatly appreciated...
>
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>
>
Edward Szpruch
Eltek Ltd - Israel
Tel 972 3 9395050
Fax 972 3 9309581
E-mail : [log in to unmask]
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=========================================================================
Date: Tue, 16 Jun 1998 14:21:30 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Klasek <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Klasek <[log in to unmask]>
Subject: Re: Heat Reflective Coating
X-To: "Gagrani, Kishore" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
NASA has developed a superinsulating paint , not specified as reflective
, but it DOES insulate hell from heaven literally .
Send you specs, if you'd like , give me fax , otherwise I have to scan
it .
What's wrong with old fashion chromium ?, if you'd like the reflection ?
paul
> ----------
> From: Gagrani, Kishore[SMTP:[log in to unmask]]
> Sent: Tuesday, 16 June 1998 5:22
> To: [log in to unmask]
> Subject: [TN] Heat Reflective Coating
>
> Anu inputs ??
>
> How to model the application of a "heat reflective coating" to
> suppress IR on a 2.8 cubic foot 63 lbs engine cowling for a helo.
> Material - unknown
> Application - unknown
> # of steps - unknown
>
> Thanks
>
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=========================================================================
Date: Tue, 16 Jun 1998 08:40:53 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jorg Richstein <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jorg Richstein <[log in to unmask]>
Subject: Re: Adhesives for Attaching Heat SInks to IC's
X-To: Bill Davis <[log in to unmask]>
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
We use Loctite 384 with good results.
JR
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=========================================================================
Date: Tue, 16 Jun 1998 14:47:44 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "by Dr. Eden Chen XianSong"
<[log in to unmask]>
Subject: Material Database for Microelectronic Packaging
MIME-Version: 1.0
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Dear Member,
Does anyone know where i can get a book or WWW address about the
material database for microelectronic packaging?
Best Regards
Eden Ehen
HP Singapore
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=========================================================================
Date: Tue, 16 Jun 1998 09:20:40 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Material Database for Microelectronic Packaging
X-To: [log in to unmask]
In-Reply-To: <H000011300383572@MHS>
MIME-Version: 1.0
Content-Type: multipart/alternative; boundary=openmail-part-01c8bffa-00000002
--openmail-part-01c8bffa-00000002
Content-Type: text/plain; charset=ISO-8859-1; name="[TN]"
Content-Disposition: inline; filename="[TN]"
Content-Transfer-Encoding: quoted-printable
Chen, I have not seen official "databases" like candy stores, just
ready for putting in a coin, and getting a ready solution out, but there=
are many big sources for searching articles, books and litterature.
Example:
Chapman Hall / www.chaphall.com
MCB University Press / www.mcb.co.uk
Thomas Register of American Manufacturers and many, many others.
Interesting to see what other answers you will get, Chen.
=20
Regards / Ingemar
--openmail-part-01c8bffa-00000002
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=========================================================================
Date: Tue, 16 Jun 1998 07:54:48 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mike Holmes x4356 <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mike Holmes x4356 <[log in to unmask]>
Subject: Re: Reference designators
----- Begin Included Message -----
From: Mitch Morey <[log in to unmask]>
We (internally)have a growing debate going on in regards to reference
designators. We have (long ago) adopted IEEE 315 as the "bible" for
schematic symbol and reference designators, but the standard seems
misleading.
Take for instance OP-AMPs should have "AR" as the designations,
OSCILLATORS should be "G", ATTENUATORS should be "AT" according
to how you interpret the standard.
But, aren't these all, in fact, microcircuits ("U") or integrated-circuit
packages in today's practice? Does anyone else have a better system
for defining reference designators, per "some" standard? It seems IEEE-
315/315A should have been out-dated long ago.
Help?
Mitch
----- End Included Message -----
Mitch,
As a (used to be) drafting checker, this subject always was a favorite
of mine. In selecting which reference designation class letter, one should use
the following algorithm:
Is there a specific class letter? AR, AT, G in your query. If so then
use it.
If ther is no specific class letter, is the component normally
disasseble-able without damage? If yes, use A, if no use U. U is not
a specific class letter for microcircuits but most microcircuits
do not have specific class letters and can not be disassembled without
damage thus the use of U.
|
/|\
/ | \
/ |__\ /\
/____@_\ |
~~[________)~~
~~~~~~~~~~~~~~[]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Michael L. (Mike) Holmes
Charter Member, Space Coast Chapter, IPC Designers Council
MS 1-5852
Designer 3 Harris Corporation
PWB Design Group Government Communications Systems Division
Digital and Electronic 2400 NE Palm Bay Road
Packaging Section Palm Bay, FL 32905
*****************************************************************************
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=========================================================================
Date: Tue, 16 Jun 1998 07:08:36 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bill Davis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Davis <[log in to unmask]>
Subject: Re: Adhesives for Attaching Heat SInks to IC's
X-To: Jorg Richstein <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Thanks for the input...
> -----Original Message-----
> From: Jorg Richstein [SMTP:[log in to unmask]]
> Sent: Monday, June 15, 1998 11:41 PM
> To: [log in to unmask]
> Subject: Re: [TN] Adhesives for Attaching Heat SInks to IC's
>
> We use Loctite 384 with good results.
> JR
>
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Date: Tue, 16 Jun 1998 08:56:00 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hooper Doug <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hooper Doug <[log in to unmask]>
Organization: LSI
Subject: SM Components/Solder Acceptability
Mime-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7BIT
If you have 2 components (SM chip resistors) both slightly shifted off
pad, in spec per class 3, but are touching - and are electrically
connected on the same trace, what would the acceptability requirements be
and where could I find reference to this condition?
Douglas A. Hooper, Sr.
Luminescent Systems, Inc.
[log in to unmask]
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=========================================================================
Date: Tue, 16 Jun 1998 08:46:01 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
sahmad <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: sahmad <[log in to unmask]>
Subject: Re: Conductive Epoxy for Solder termination
X-To: Matthew Park <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
The adhesion of the conductive polymers to various surfaces should depends
upon the adhesion promoters they contain. The manufacturer should be able to
include the more appropriate ones for the surfaces involved in an
application. Storage requirements and floor life are valid issues.
Syed.
-----Original Message-----
From: Matthew Park [SMTP:[log in to unmask]]
Sent: Monday, June 15, 1998 4:04 PM
To: [log in to unmask]
Subject: Re: [TN] Conductive Epoxy for Solder termination
Dear Dr. EC,
A successful implementation of electrically conductive epoxies
for SMT application is more than understanding those issues
you stated. And it is NOT definitely a replacement for tin/lead
solderpaste as some mfg of conductive epoxies claim. It is not
very difficult to form fillet with the epoxy. Simply epoxies DO
NOT
form fillets and wet.
I performed a few sample tests one/two years ago when
one conductive epoxy mfg claimed it prints like any other
solderpaste and it is a replacement for solderpaste. I
concluded that some fundamental issues have to be addressed
to make electrically conductive epoxies useful in a SMT
manufacturing environment,
- impractical storage/shipping temp, -70'c to-40'c
- too suceptable to moisure and dry out too quickly
- do not adhere good to tin/lead surface. A test revealed it
adhered well to bare copper and solder mask surfaces. It is
proper to have a different metallic finish for SMT component
soldering terminals and board surface than tin/lead.
- redesigning board layout for epoxy application such as pad
sizes, conductor space req's etc...
- redesigning component soldering terminals for epoxy
application.
- poor performance of printability of epoxy
- reworkability
To answer your questions, it is vital to provide only an exact
amount of epoxy for component terminal area. A typical printed
thickness of epoxy should be at 0.1mm. That is why I believe a
dispensing option is not suitable. It won't provide a controlled
coverage of epoxy for soldering terminals. There are too many
parameter variations to control such as epoxy consistency, dot
size, dot height, placement pressure etc...
regards
Matthew
NII-Norsat International Inc.
>>> "by Dr. Eden Chen XianSong"
<[log in to unmask]> June
14, 1998 8:35 pm >>>
Dear Sir,
Some silver-filled conductive epoxies in the market claim to
be solder
replacement, but successful use of these material require a
very good
understanding of the epoxies properties, the process and
CTE mismatch.
The epoxy can be deposited to the pad by stencil printing or
dispensing,
Dispensing process has the tailing problem which can cause
short for
0402 chip resistor/capacitor. It is very difficult to form the
fillet
for epoxy, because the epoxy may have a gap between the
side of chip
resistor/capacitor and dot peak of epoxy. How much should
the
placement force be applied and how big should the dot size
for 0402
resistor/capacitor?
I like to discuss the above-mentioned issue in the TECHNET
Eden
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=========================================================================
Date: Tue, 16 Jun 1998 09:20:22 PDT
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brad Vanderhoof <[log in to unmask]>
Organization: Xerox Corporation
Subject: Peelable Soldermask
X-cc: "Fred Martin (E-mail)" <[log in to unmask]>
Hi all,
I have an intermittent problem with a latex soldermask applied by bare
board suppliers. On some batches the product will smoke slightly during
reflow in nitrogen, others are fine. Unfortunately addition of the mask
was arranged by purchasing with process left to the vendor's discretion
(this will be corrected). What differences in materials, chemistry, etc.
contribute to more or less stable and heat resistant masks? Does anyone
have a specification they could share to insure latex mask is properly
applied, cured etc.?
Thanks in advance.
Brad Vanderhoof
Please don't try to sell me a new reflow oven over this forum.
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=========================================================================
Date: Tue, 16 Jun 1998 09:33:00 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Joy, Stephen C" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Joy, Stephen C" <[log in to unmask]>
Subject: Solder mask profile information
MIME-Version: 1.0
Content-Type: text/plain
We have been having some problems with a BGA device where we see
ball fatigue (solder ball cracks) after temp cycling. We think it
may be related to severe undercut of the solder mask.
Does anyone have information on different solder mask foot
profiles? How difficult is it to get a straight sidewall on
solder masks?
Are there any that are much better than others for this
attribute? What would be the trade offs?
You can contact me off line if you prefer.
Steve Joy
503-696-2239
[log in to unmask]
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=========================================================================
Date: Tue, 16 Jun 1998 12:06:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David D Hillman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David D Hillman <[log in to unmask]>
Subject: Re: Solder mask profile information
X-To: "Joy, Stephen C" <[log in to unmask]>
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi Steve - take a look at the following paper:
"Ball Grid Array, MicroBGA, Chip Scale Packaging, and 0.4mm Ultra Fine
Pitch Implementation At US Robotics", author Ron Evans, et al, pages
141-163, SMTA National Symposium "Emerging Technologies" Proceedings,
October 1997"
The paper contains some good information on ball grid array pad design and
manufacturing interaction issues that may be relevant to your issues. Good
Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
"Joy, Stephen C" <[log in to unmask]> on 06/16/98 11:33:00 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to "Joy, Stephen C" <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
Subject: [TN] Solder mask profile information
We have been having some problems with a BGA device where we see
ball fatigue (solder ball cracks) after temp cycling. We think it
may be related to severe undercut of the solder mask.
Does anyone have information on different solder mask foot
profiles? How difficult is it to get a straight sidewall on
solder masks?
Are there any that are much better than others for this
attribute? What would be the trade offs?
You can contact me off line if you prefer.
Steve Joy
503-696-2239
[log in to unmask]
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=========================================================================
Date: Tue, 16 Jun 1998 12:09:38 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David D Hillman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David D Hillman <[log in to unmask]>
Subject: Re: PCB finish comparison studies
X-To: Scott Martin <[log in to unmask]>
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi Scott -
Get ahold of Jack Crawford at IPC and check into obtaining a copy of the
IPC National Conference "A Summit on PWB Surface Finishes and
Solderability" Proceedings, September 1997. It contains a good cross
section of papers on different PCB finishes that may prove useful to you.
Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Scott Martin <[log in to unmask]> on 06/09/98 05:22:33 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Scott Martin <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
Subject: [TN] PCB finish comparison studies
Hello techies!
I am currently looking for any comparison studies on the solderability
of fine pitch components (20-25 mil pitch) onto various board finishes
including OSP, Immersion Gold, and HASL. Any help would be very
appreciated!
Scott
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=========================================================================
Date: Tue, 16 Jun 1998 12:26:57 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Coleman, Rob" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Coleman, Rob" <[log in to unmask]>
Subject: Re: Solder mask profile information
X-To: "Joy, Stephen C" <[log in to unmask]>
Steven,
I do not have any profiles but I have seen many. Sidewall integrity is
related to dam height as well as to mfg. parameters, i.e., intensity of
exposure unit and developing parameters. The process latitude of these
parameters vary widely from one vendors LPI to another's. Some masks are
easy to undercut and others have tremendous process latitude. Inquire about
specific process parameters that the mask was run through. Optimum
conditions can lead to impressive sidewall integrity with the right ink.
Good luck!
-----Original Message-----
From: Joy, Stephen C <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Tuesday, June 16, 1998 11:34 AM
Subject: [TN] Solder mask profile information
> We have been having some problems with a BGA device where we see
> ball fatigue (solder ball cracks) after temp cycling. We think it
> may be related to severe undercut of the solder mask.
>
> Does anyone have information on different solder mask foot
> profiles? How difficult is it to get a straight sidewall on
> solder masks?
>
> Are there any that are much better than others for this
> attribute? What would be the trade offs?
>
> You can contact me off line if you prefer.
>
> Steve Joy
> 503-696-2239
> [log in to unmask]
>
>################################################################
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>################################################################
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>################################################################
>
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=========================================================================
Date: Tue, 16 Jun 1998 13:56:35 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Gonnerman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Gonnerman <[log in to unmask]>
Subject: Re: Solder mask profile information
X-To: David D Hillman <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Sorry - I don't mean to advertise - but you can get this paper (or the
entire proceedings) from us. Reprints of SMTA papers are free for our
members.
-David
At 12:06 PM 6/16/98 -0500, you wrote:
>Hi Steve - take a look at the following paper:
>
>"Ball Grid Array, MicroBGA, Chip Scale Packaging, and 0.4mm Ultra Fine
>Pitch Implementation At US Robotics", author Ron Evans, et al, pages
>141-163, SMTA National Symposium "Emerging Technologies" Proceedings,
>October 1997"
>
>The paper contains some good information on ball grid array pad design and
>manufacturing interaction issues that may be relevant to your issues. Good
>Luck.
>
>Dave Hillman
>Rockwell Collins
>[log in to unmask]
>
>
>
>
>
>"Joy, Stephen C" <[log in to unmask]> on 06/16/98 11:33:00 AM
>
>Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
> to "Joy, Stephen C" <[log in to unmask]>
>
>To: [log in to unmask]
>cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
>Subject: [TN] Solder mask profile information
>
>
>
>
> We have been having some problems with a BGA device where we see
> ball fatigue (solder ball cracks) after temp cycling. We think it
> may be related to severe undercut of the solder mask.
>
> Does anyone have information on different solder mask foot
> profiles? How difficult is it to get a straight sidewall on
> solder masks?
>
> Are there any that are much better than others for this
> attribute? What would be the trade offs?
>
> You can contact me off line if you prefer.
>
> Steve Joy
> 503-696-2239
> [log in to unmask]
>
>################################################################
>TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
>################################################################
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>text in the body:
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>################################################################
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>information.
>For technical support contact Hugo Scaramuzza at [log in to unmask] or
>847-509-9700 ext.312
>################################################################
>
>################################################################
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>################################################################
>
>
David Gonnerman
Director of Publications
Plan now to attend:
Surface Mount International (San Jose, CA; 8/23-8/27)
Electronics Assembly Expo (Providence, RI; 10/24-10/29)
SURFACE MOUNT TECHNOLOGY ASSOCIATION
Enabling members to achieve success
in surface mount and companion technologies
through education, training and access to knowledge.
5200 Willson Road, Suite 215, Edina, MN 55424-1343
612-920-7682 F 612-926-1819
[log in to unmask] www.smta.org
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=========================================================================
Date: Tue, 16 Jun 1998 10:32:37 PST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Textbooks on Photo tools
Try C.A. Picard Inc. or Precision Art Coordinators , Inc.
M. Covel
RSC
Tucson
______________________________ Reply Separator _________________________________
Subject: [TN] Textbooks on Photo tools
Author: "TechNet E-Mail Forum." <[log in to unmask]>, at CCGATE
Date: 6/15/98 5:10 PM
Hi Guys,
I was wondering if anyone can recommend a good book (or any text) about
photo tooling; procedures for evaluation, and parameters to take into
consideration when evaluating. Any text or document will be appreciated.
Thanks in advance!
Marco Biagtan
NEC Components Philippines, Inc.
Process Engineer
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=========================================================================
Date: Tue, 16 Jun 1998 15:07:38 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tom Boyer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tom Boyer <[log in to unmask]>
Subject: traces used as a fuse
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Does anyone have any information/ tech charts on tracewidths and weights
when they are utilized as a fusable link.
Thanks
Tom
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=========================================================================
Date: Tue, 16 Jun 1998 19:22:30 GMT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Overplated blind via's
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: quoted-printable
Hello Technet,
Our company is busy designing some printed circuit boards with
"overplated blind via's" (I mean blind via's, made in a sequential
plating process, where the via is filled with epoxy, after which it is
covered with copper and a solderable plating).
All our vendors claim they can build such boards, but as far as I
known they do not use this technology very often, and I don't want to
be their "guinea pig".
The question :
What kind of questions should I ask our bare board vendors in order to
check wether they are capable of building these boards with good
relaibility in a reproducible way ? What are the potential problems
that the board vendors should be aware of, and should have solved ?
Any ideas ?
Mark Roach
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=========================================================================
Date: Tue, 16 Jun 1998 13:40:20 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
sahmad <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: sahmad <[log in to unmask]>
Subject: Re: Solder mask profile information
X-To: "Joy, Stephen C" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
May be you can keep the mask a comfortable distance away from the solder
joint.
-----Original Message-----
From: Joy, Stephen C [SMTP:[log in to unmask]]
Sent: Tuesday, June 16, 1998 10:33 AM
To: [log in to unmask]
Subject: [TN] Solder mask profile information
We have been having some problems with a BGA device where we
see
ball fatigue (solder ball cracks) after temp cycling. We think
it
may be related to severe undercut of the solder mask.
Does anyone have information on different solder mask foot
profiles? How difficult is it to get a straight sidewall on
solder masks?
Are there any that are much better than others for this
attribute? What would be the trade offs?
You can contact me off line if you prefer.
Steve Joy
503-696-2239
[log in to unmask]
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additional information.
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=========================================================================
Date: Tue, 16 Jun 1998 12:53:00 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Joy, Stephen C" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Joy, Stephen C" <[log in to unmask]>
Subject: Re: Overplated blind via's
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Mark,
There are many ways to accomplish this.
My development flow would be:
1. How much of what type of blind/buried vias are done now?
2. Is the technology homegrown or is the technology purchased? (same
questions
for the technology vendor including what type of resources are available to
train the purchaser of the technology)
3. What is the general technology level of the shop?
4. What is the process flow for the b/b process?
5. Get stability/capability data for the processes. Make sure there is
enough
data and the data has maximum variability.
6. What was the qualification plan to introduce the technology?
The general yield or reliability problems will depend on the technology
used,
but if a process is stable and capable just ask for the qualification plan
and
see if it meets your requirements.
In general, those shops that are capable of providing a reliable product
will
have much if the data above. And the key word is DATA.
Steve
Hello Technet,
Our company is busy designing some printed circuit boards with
"overplated blind via's" (I mean blind via's, made in a sequential
plating process, where the via is filled with epoxy, after which it is
covered with copper and a solderable plating).
All our vendors claim they can build such boards, but as far as I
known they do not use this technology very often, and I don't want to
be their "guinea pig".
The question :
What kind of questions should I ask our bare board vendors in order to
check wether they are capable of building these boards with good
relaibility in a reproducible way ? What are the potential problems
that the board vendors should be aware of, and should have solved ?
Any ideas ?
Mark Roach
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=========================================================================
Date: Tue, 16 Jun 1998 13:01:19 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
DAVID D RUND <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: DAVID D RUND <[log in to unmask]>
Subject: Re: Solder mask profile information
X-To: "Joy, Stephen C" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Dear Steve,
I do have information on solder mask sidewall profiles. The ability to get
a straight sidewall depends on many factors including; LPI mask type, LPI
thickness, tack drying conditions, Exposure equipment (collimated or
non-collimated), exposure lamp intensity, and developing conditions.
Most board fabricators need to "overdevelop" the LPI solder mask to ensure
that the LPI is completely developed out of holes. This typically creates
the undercut situation. It is important to note that undercut is typically
caused by underexposing or overdeveloping. You can also create an
"overhang" on the sidewall by overexposing the solder mask. Sometimes this
"overhang" is mistaken for undercut.
With BGA boards, I have seen solder mask thicknesses of 0.5 mil to 2 mils.
Are you specifying a certain solder mask thickness?
Your chances of a straight sidewall will be much better at 0.5 mil versus
2.0 mils.
With BGA boards, it is also important to note whether the board fabricator
is gold plating before or after solder mask. If the board fabricator is
applying solder mask after gold plating, the tendency is too develop very
aggressively so that the gold surface is free of mask residues for gold wire
bonding. This may result in undercut if the exposure energy is not
increased to compensate for the aggressive developing.
Steve, I would be happy to provide you with cross section photos showing
various sidewall profiles. Please contact me at 702-885-9959.
Best regards,
David Rund
Taiyo America
-----Original Message-----
From: Joy, Stephen C <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Tuesday, June 16, 1998 9:37 AM
Subject: [TN] Solder mask profile information
> We have been having some problems with a BGA device where we see
> ball fatigue (solder ball cracks) after temp cycling. We think it
> may be related to severe undercut of the solder mask.
>
> Does anyone have information on different solder mask foot
> profiles? How difficult is it to get a straight sidewall on
> solder masks?
>
> Are there any that are much better than others for this
> attribute? What would be the trade offs?
>
> You can contact me off line if you prefer.
>
> Steve Joy
> 503-696-2239
> [log in to unmask]
>
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=========================================================================
Date: Tue, 16 Jun 1998 15:08:12 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Michael Thiel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Michael Thiel <[log in to unmask]>
Subject: Board Material for a 500mhz to 2ghz Application.
MIME-Version: 1.0
Content-Type: text/plain
I would like to know the options available, as far as board
material/conductor and its
characteristics, for an application involving frequencies ranging from
500mhz to 2ghz (with the upper
limit (2ghz) being more of a concern). Intentions are to emphasize
microstrip matching at higher
frequencies (2ghz) and lumped component matching at lower frequencies
(500mhz). Basically, what
works the best and is cheap.
Thank you for your cooperation.
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=========================================================================
Date: Tue, 16 Jun 1998 15:28:40 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Entek OSP
X-To: "Coleman, Ron" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Coleman, Ron wrote:
>
> Bill,
>
> Controlling the thickness of OSP's is not an uncommon problem. Some OSP's
> are more difficult to control than others. The technique used to measure
> thickness is also critical to accuracy and reliability of thickness.
> Evaporation and by product reaction play biggest role in ability to control
> thickness. The type of acid medium used will also affect the solubility thus
> thickness. The product you are using has a long history of thickness control
> issues. Contact me direct if you would like to discuss in more detail
>
> Rob.
> nal Message-----
> From: Bill Davis <[log in to unmask]>
> To: [log in to unmask] <[log in to unmask]>
> Date: Monday, June 15, 1998 10:00 AM
> Subject: [TN] Entek OSP
>
> >Yo techies! Has anyone out there had experience with Ethone-OMI's Enteck
> OSP? We're using it here as we have some 0.4mm pitch devices & have had
> problems managing the thickness of the OSP. We see residues which causes
> non-weeting on the pads, & the gold edge connector still had enough OSP left
> to cause connection problems. Any help would be greatly appreciated...
> >
> >################################################################
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> information.
> >For technical support contact Hugo Scaramuzza at [log in to unmask] or
> 847-509-9700 ext.312
> >################################################################
> >
>
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> ################################################################Bill,
Are you specifically having problems achieving proper wet out of pads and
other fine features? There is a possible relationship between the type of
flux or paste you are using with respect to solder wet out.
What pH range do you control the OSP in? This could be a factor with
thickness control.
Good luck
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=========================================================================
Date: Tue, 16 Jun 1998 14:24:00 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Richard MacCutcheon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Richard MacCutcheon <[log in to unmask]>
Organization: BFGoodrich Data Systems
Subject: Drill Wander
MIME-Version: 1.0
Content-type: text/plain; charset="US-ASCII"
Content-transfer-encoding: 7BIT
We are drilling with #73 Megatool 800
hits maximum with .012" thick 3003
aluminum entry into GFK 062 1/1.
There appears to be some random
misalignment when comparing the artwork
to the panel. What causes drill wander
and what can be done to minimize it.
Thanks for your time,
Richard MacCutcheon
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=========================================================================
Date: Tue, 16 Jun 1998 17:19:31 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David D Hillman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David D Hillman <[log in to unmask]>
Subject: Re: Components - Exposed Cu on Component Lead Ends
X-To: Rob Schetty <[log in to unmask]>
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi Rob - here is the paper you are looking for:
"Effects of Operating Environments on Migration of Copper on Printed Wiring
Boards", May 1989, author W.H. Abbott, Battelle
I also have a paper that documents a 30 year study of exposed copper in the
Telecommunications industry but can't find it in my files - I'll post it
when I find it. Happy reading.
Dave Hillman
Rockwell Collins
[log in to unmask]
Rob Schetty <[log in to unmask]> on 06/05/98 01:00:10 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Rob Schetty <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
Subject: [TN] Components - Exposed Cu on Component Lead Ends
Can anyone direct me to a technical reference detailing the work done to
show that exposed copper on component lead ends do not pose a solderability
problem?
I've searched the Technet Archives but only found vague references to a
Battelle paper with no further details.
Thanks in advance for any responses.
Rob Schetty
LeaRonal Inc
Freeport NY USA
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=========================================================================
Date: Tue, 16 Jun 1998 18:57:50 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Flex/rigid manufacturers in China
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Eric,
If you are looking for a full service assembly house, try this
IMS (International Manufacturing Services)
In Hong Kong: IMS, Kowloon
Phone: 011-852-2727-5461
In California: IMS, San Jose
Phone: (408) 953-1000
In Thailand: IMS, Chon Buri Province
Phone: 011-66-38-493-561
In China: IMS, Guangdong
Phone: 011-86-769-3394581
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################################################################
=========================================================================
Date: Wed, 17 Jun 1998 01:09:54 +0200
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jacob Ransborg <[log in to unmask]>
Subject: Sv: [TN] Electroless Nickel/gold again
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-Transfer-Encoding: 7bit
Hi Russel
I would just hear if there was any progress in collecting the information
for me
Best Regards
Jacob
----------
> Fra: Russell S Gregory <[log in to unmask]>
> Til: [log in to unmask]
> Emne: Re: [TN] Electroless Nickel/gold again
> Dato: onsdag, juni 10, 1998 22:17
>
> Jacob,
>
> I will speak to one of my learned colleagues at Atotech here in the Uk
and we
> will contact you on Thursday to answer your questions!
>
> regards
>
> Russell Gregory
> Atotech UK
>
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> ################################################################
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################################################################
=========================================================================
Date: Tue, 16 Jun 1998 17:13:33 PDT
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Glenn Pelkey <[log in to unmask]>
Subject: Re: Material Database for Microelectronic Packaging
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Here are some sites that I've found useful. Not necessarily just for
microelectronics, but for other materials as well.
http://mems.isi.edu/mems/materials/materials.cgi
http://www.csn.net/~takinfo/prop-top.htm
http://www.imaps.org/
Glenn
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=========================================================================
Date: Wed, 17 Jun 1998 09:00:35 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "by Dr. Eden Chen XianSong"
<[log in to unmask]>
Subject: Re: Overplated blind via's
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Content-Transfer-Encoding: 7bit
I have fabricated some PCB boards by Kyoden Japan, where the via holes
are blocked by solder mask. You can contact "Singapore Kyoden Pte Ltd"
at E-mail: [log in to unmask]
Eden Chen
Singapore Component Operation
HP
______________________________ Reply Separator _________________________________
Subject: Re: [TN] Overplated blind via's
Author: Non-HP-stephen.c.joy ([log in to unmask]) at HP-Singapore,mimegw51
Date: 6/17/98 3:53 AM
Mark,
There are many ways to accomplish this.
My development flow would be:
1. How much of what type of blind/buried vias are done now?
2. Is the technology homegrown or is the technology purchased? (same
questions
for the technology vendor including what type of resources are available to
train the purchaser of the technology)
3. What is the general technology level of the shop?
4. What is the process flow for the b/b process?
5. Get stability/capability data for the processes. Make sure there is
enough
data and the data has maximum variability.
6. What was the qualification plan to introduce the technology?
The general yield or reliability problems will depend on the technology
used,
but if a process is stable and capable just ask for the qualification plan
and
see if it meets your requirements.
In general, those shops that are capable of providing a reliable product
will
have much if the data above. And the key word is DATA.
Steve
Hello Technet,
Our company is busy designing some printed circuit boards with
"overplated blind via's" (I mean blind via's, made in a sequential
plating process, where the via is filled with epoxy, after which it is
covered with copper and a solderable plating).
All our vendors claim they can build such boards, but as far as I
known they do not use this technology very often, and I don't want to
be their "guinea pig".
The question :
What kind of questions should I ask our bare board vendors in order to
check wether they are capable of building these boards with good
relaibility in a reproducible way ? What are the potential problems
that the board vendors should be aware of, and should have solved ?
Any ideas ?
Mark Roach
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ext.312
################################################################
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=========================================================================
Date: Wed, 17 Jun 1998 09:22:47 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Edwin Maximo <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
Comments: Authenticated sender is <emaximo@[192.1.1.215]>
From: Edwin Maximo <[log in to unmask]>
Subject: Assy: chip on glass
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7BIT
I'm investigating the chip on glass process for a new product that
our company will be doing. I would appreciate if anybody could share
some of their experiences with this technology, the issues involved
with this technology.
Regards,
Edwin Maximo
Electronic Assemblies Inc.
email: [log in to unmask]
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=========================================================================
Date: Tue, 16 Jun 1998 22:29:51 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Yvon Hache <[log in to unmask]>
Organization: Concept + Inc.
Subject: Re: Reference designators
X-To: Mitch Morey <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
We used our own standards. Like you mentionned, for any IC, we use U as a prefix. We never
encountered any problem with this standard in the last 12 years.
Yvon Hache
Design Engineer
Concept + Inc.
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=========================================================================
Date: Tue, 16 Jun 1998 18:45:25 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bryan Bloom <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bryan Bloom <[log in to unmask]>
Subject: Wire Bonding
Mime-Version: 1.0
Content-Type: text/html; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<html><div>We are currently performing wire bonding on a substrate for a
particular customer. Generally this is gold wedge bonding at .7 mil
find pitch. </div>
<br>
<div>We want to expand that operation and do small volume, high mix of
custom IC's (monolithic and some hybrid) built to an engineer's
specs. These would be in the 1 - 200 volume for prototype or quick
turnaround. We also want to know what other niches are open to us
with our quality wire bonding capability and how to market them and to
whom (chip on board, etc..)</div>
<br>
<div>Any suggestions from those who have had success or who see a need
that has not been met would be greatly appreciated.</div>
<br>
<div>Thank you in advance for any help or thoughts!</div>
<br>
<br>
<hr>
<font size=3D2>Bryan Bloom<br>
G & M Assembly<br>
821 South Tremont Street<br>
Oceanside, CA=A0 92054<br>
760-721-1924<br>
760-721-2545 (fax)<br>
[log in to unmask]<br>
<br>
</font><font size=3D3>*** 15 year anniversary ***</font></html>
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=========================================================================
Date: Wed, 17 Jun 1998 12:20:33 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: stop TECHNET!
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 8bit
[log in to unmask] wrote:
>
> I think it would make sense to split the mailing list in several sub
> lists
> such as:
>
> IPC standard related
> wet processes
I want to stop for TechNet email.
stop stop stop to email........
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Date: Wed, 17 Jun 1998 12:32:35 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: stop TechNet email
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 8bit
i want to stop email by TechNet.
stop stop stop stop stop.............
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Date: Wed, 17 Jun 1998 10:29:45 +0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"H.N.Muralidhara" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "H.N.Muralidhara" <[log in to unmask]>
Subject: Vendor Source
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Dear Sir / Madam,
Please let me know the source for following items,
(1) 25,50,80,200 Micron Capilex film for our Printed Circuit Board Screen
Printing puspose.
Qty.Required : 200 Sq.Mtr per Month
(2) Aluminium Entry 0.20 mm thick ( PCB Drilling sheet)
H-18 Temper, ( C-45 )
AA 3105 Alloy
Qty. Required : 3,000 Kgs per Month
Kindly confirm through e-mail / FAX.
Thanking you and best regards,
H.N.Muralidhara
H.N.MURALIDHARA
M/s INDAL ELECTRONICS LIMITED,
No. 9A, INDUSTRIAL AREA, NANJANGUD,
MYSORE DISTRICT.
PHONE No. : +91-8221-26618/26619/26584/26375
FAX No. : 91+8221-26641/27234
E-MAIL : [log in to unmask]
VIST US AT: www://www.indalpcb.com
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=========================================================================
Date: Wed, 17 Jun 1998 10:06:59 +0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"L.VINOD" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "L.VINOD" <[log in to unmask]>
Subject: PEELABLE REQUIREMENT
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Dear Sir,
We are the largest manufacurer of printed circuit board in INDIA .
We have the fallowing requirement of peelable SM.
We want Peelable SM ink that with stands IR Relow & Wave soldering cycles.
IR Reflow means board temprature upto 240 deg,c for 40-60 secs
wave soldering means a wave of 250 Deg c and pre heat of 150-200 DEG C.
Our exisiting peelable inks of two suppliers withstands only 210 DEG c
Can any one suggest us a good peelable ink source?
Awaiting yr reply
Regards
L.VINOD PH: +91-8221-26375,
26618
INDAL ELECTRONICS LTD., FAX: +91-8221-26641
PLOT NO 12A, INDUSTRIAL AREA WEB: http://www.indalpcb.com
NANJANGUD, MYSORE DIST., E-MAIL : [log in to unmask]
KARNATAKA - 571 301.
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=========================================================================
Date: Wed, 17 Jun 1998 09:59:51 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Eltek Ltd. - Process Engineering" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Eltek Ltd. - Process Engineering" <[log in to unmask]>
Subject: Re: Overplated blind via's
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Mark,
We are manufacturing blind vias using such technology . As a manufacturer of
such boards , the only " special " precaution is related to plated copper
thickness in such blind via . Rest of problems are related to whole range of
dense multilayers , nothing exceptional .
This technology is not used very often , because people don`t like addition
production stages , design and registration problems .
Apart of your standard " new supplier source " you should ask question
regarding process flow for blind and burried vias , QC procedures , general
characteristics regarding production capability ( via diameters , number of
layers , line width and spacing etc ) , and the most importand , existing
yield data and scrap characteristics regarding blind and burried PCB .
Regards
At 19:22 16/06/98 GMT, you wrote:
>Hello Technet,
>
>Our company is busy designing some printed circuit boards with
>"overplated blind via's" (I mean blind via's, made in a sequential
>plating process, where the via is filled with epoxy, after which it is
>covered with copper and a solderable plating).
>All our vendors claim they can build such boards, but as far as I
>known they do not use this technology very often, and I don't want to
>be their "guinea pig".
>The question :
>What kind of questions should I ask our bare board vendors in order to
>check wether they are capable of building these boards with good
>relaibility in a reproducible way ? What are the potential problems
>that the board vendors should be aware of, and should have solved ?
>Any ideas ?
>
>Mark Roach
>
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>
>
Edward Szpruch
Eltek Ltd - Israel
Tel 972 3 9395050
Fax 972 3 9309581
E-mail : [log in to unmask]
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=========================================================================
Date: Wed, 17 Jun 1998 03:01:58 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Manfred Huschka <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Manfred Huschka <[log in to unmask]>
Subject: Re: Board Material for a 500mhz to 2ghz Application.
X-To: Michael Thiel <[log in to unmask]>
Mime-Version: 1.0
Content-Type: TEXT/PLAIN; charset=US-ASCII
Michael,
low cost PTFE/woven glass base materials are TLC-30 (DK 3.0), TLC-32 (DK 3.2), and RF-35 (DK 3.5) from
Taconic. All of them are used at the frequency range you described.
Please contact us off-line to discuss further.
Regards
Manfred Huschka
Taconic Advanced Dielectric Division Europe
--- On Tue, 16 Jun 1998 15:08:12 -0500 Michael Thiel <[log in to unmask]> wrote:
I would like to know the options available, as far as board
material/conductor and its
characteristics, for an application involving frequencies ranging from
500mhz to 2ghz (with the upper
limit (2ghz) being more of a concern). Intentions are to emphasize
microstrip matching at higher
frequencies (2ghz) and lumped component matching at lower frequencies
(500mhz). Basically, what
works the best and is cheap.
Thank you for your cooperation.
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---------------End of Original Message-----------------
--------------------------------------------------------
Name: Manfred Huschka
Taconic Advanced Dielectric Division, Lynn Industrial Park, Mullingar,
Co. Westmeath, Republic of Ireland
Office: PF 1275, D-51676 Wipperfuerth, Germany
Tel.: +49 2267 888004
Fax: +49 2267 888005
E-mail: Manfred Huschka <[log in to unmask]>
Web: www.taconic-add.com
Date: 06/17/98
Time: 09:50:08
This message was sent by Z-Mail Pro - from NetManage
NetManage - delivers Standards Based IntraNet Solutions
--------------------------------------------------------
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=========================================================================
Date: Thu, 18 Jun 1998 17:30:52 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Marco Biagtan <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Marco Biagtan <[log in to unmask]>
Subject: Re: Textbooks on Photo tools
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-Transfer-Encoding: 7bit
Hi Mr. Covel,
Thanks for the response. Just to confirm, C.A. picard Inc./Precision Art
Coordinators, Inc are name of companies?
----------
> From: [log in to unmask]
> To: [log in to unmask]
> Subject: Re: [TN] Textbooks on Photo tools
> Date: Wednesday, June 17, 1998 2:32 AM
>
> Try C.A. Picard Inc. or Precision Art Coordinators , Inc.
>
>
> M. Covel
> RSC
> Tucson
> ______________________________ Reply Separator
_________________________________
> Subject: [TN] Textbooks on Photo tools
> Author: "TechNet E-Mail Forum." <[log in to unmask]>, at CCGATE
> Date: 6/15/98 5:10 PM
>
>
> Hi Guys,
>
> I was wondering if anyone can recommend a good book (or any text) about
> photo tooling; procedures for evaluation, and parameters to take into
> consideration when evaluating. Any text or document will be appreciated.
> Thanks in advance!
>
>
> Marco Biagtan
> NEC Components Philippines, Inc.
> Process Engineer
>
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> information.
> For technical support contact Hugo Scaramuzza at [log in to unmask] or
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> ext.312
> ################################################################
>
> ################################################################
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=========================================================================
Date: Wed, 17 Jun 1998 10:49:52 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Whalley <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Whalley <[log in to unmask]>
Subject: Re: Material Database for Microelectronic Packaging
In-Reply-To: <H000022200c166ca@MHS>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
A commercial database is available from Relative Metrics:
http://www.relmet.com
David Whalley
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=========================================================================
Date: Wed, 17 Jun 1998 07:50:24 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bill Davis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Davis <[log in to unmask]>
Subject: Polyimide Tapes for HASL, etc...
X-To: kevin berry <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
The polyimide tapes we've been using are available from:
Echo Supply
>=20
> (408) 945-0325
>=20
> P/N: Finite-557
> $ 18/roll
regards,
> -----Original Message-----
> From: kevin berry [SMTP:[log in to unmask]]
> Sent: Tuesday, June 16, 1998 12:39 AM
> To: [log in to unmask]
> Subject: Masking Tapes for HASL (ref: Technet)
>=20
> Bill,
> I am also experiencing problems of protecting PCB surfaces during =
soldering.
> =A0I would be most grateful for any information on suitable masking =
tapes.
> =A0
> Regards,
> K.J.=A0 Berry
> Technology Engineer
> =A0
> Radstone Technology=A0 PLC
> Water Lane,
> Towcester,
> Northants,
> NN12=A0 6JN.
> U.K
> =A0
> Tel :=A0=A0=A0=A0=A0=A0 +44 (0)1327 359444=A0 et : 2165
> Fax :=A0=A0=A0=A0=A0 +44 (0)1327 358112
> E-mail :=A0 [log in to unmask] <mailto:[log in to unmask]>
> =A0
> Web :=A0=A0=A0 <http://www.radstone.co.uk>
> =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 <http://www.radstone.c>om
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=========================================================================
Date: Wed, 17 Jun 1998 09:30:56 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hugo Scaramuzza <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hugo Scaramuzza <[log in to unmask]>
Subject: Re: stop TechNet email
Mime-Version: 1.0
Content-Type: text/plain
No problem.
>>> <[log in to unmask]> 06/17/98 02:32PM >>>
i want to stop email by TechNet.
stop stop stop stop stop.............
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=========================================================================
Date: Wed, 17 Jun 1998 08:43:00 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jon Johnson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jon Johnson <[log in to unmask]>
Subject: Flex Circuit Vendors
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Content-Type: text/plain; charset=ISO-8859-1
I would like to contact the following flex vendors for a high volume
application =
Single and Double sided Flex from 1,000,000 pieces and up for a yearly
volume.
Mek Tec
Nitto Denko =
World Circuits
Jon
[log in to unmask]
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=========================================================================
Date: Wed, 17 Jun 1998 10:19:21 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Modular Components National, Inc." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Modular Components National, Inc." <[log in to unmask]>
Subject: Ultrasonic cleaning
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
To all:
Are there any negative effects to using ultrasonic cleaning on nickel/gold
plating?
My reason for asking is this. We recently plated two panels and tape
tested them prior to ultrasonic cleaning. Then after ultrasonic cleaning
and during our final machining process, we experienced poor gold to nickel
adhesion.
Any input would be greatly appreciated.
Regards
Ryan
Modular Components National, Inc.
2302 Industry Court
Forest Hill, MD 2150
PH (410) 879-6553
Fax (410) 838-7629
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=========================================================================
Date: Wed, 17 Jun 1998 09:55:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Cobey Schmidt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Cobey Schmidt <[log in to unmask]>
Subject: Re: Ultrasonic cleaning
X-To: "Modular Components National, Inc." <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
In my experience, the only problems observed with this
cleaning method is getting a cleaning solution that will not leave a
nasty residue. If rinsed and dried properly, we have no defects.
Cobey Schmidt
VisionTek
1175 lakeside Drive
Gurnee, IL 60031
[log in to unmask]
<mailto:[log in to unmask]>
(847) 360-7566 voice
(847) 360-7443 fax
-----Original Message-----
From: Modular Components National,
Inc. [SMTP:[log in to unmask]]
Sent: Wednesday, June 17, 1998 9:19 AM
To: [log in to unmask]
Subject: [TN] Ultrasonic cleaning
To all:
Are there any negative effects to using
ultrasonic cleaning on nickel/gold
plating?
My reason for asking is this. We
recently plated two panels and tape
tested them prior to ultrasonic cleaning. Then
after ultrasonic cleaning
and during our final machining process, we
experienced poor gold to nickel
adhesion.
Any input would be greatly appreciated.
Regards
Ryan
Modular Components National, Inc.
2302 Industry Court
Forest Hill, MD 2150
PH (410) 879-6553
Fax (410) 838-7629
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Date: Wed, 17 Jun 1998 07:51:36 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Alan Kreplick <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Alan Kreplick <[log in to unmask]>
Subject: SMT Reliability
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
I have to assemble and solder (by hand) 0805 resistors on 1206 pads and 0603
resistors on 0805 pads.
Any thoughts on reliability?
Am I better off bonding the resistor and running jumper wires ("Dead-Bug")?
Thanks,
Al Kreplick
Teradyne, Inc.
617-422-3726
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=========================================================================
Date: Wed, 17 Jun 1998 08:39:36 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
George Franck <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: George Franck <[log in to unmask]>
Subject: Re: Overplated blind via's
X-To: [log in to unmask]
Mime-version: 1.0
Content-type: text/plain; charset="us-ascii"
Content-transfer-encoding: 7bit
Techies,
Dupont sells a product called CD-100. It is a silver-filled conductive
epoxy. The via holes are filled via a flood coat or silkscreen, but has to
be pushed into the hole. Any epoxy on the surface must be removed to allow
subsequent etching. The epoxy goes thru a cure, then has a copper flash
plate to cover the silver. (migration issues ?) The final cure of the epoxy
occurs during subsequent lamination cycles. Final copper thickness is
increased during final pattern plate.
The smallest hole size you want to design for this application is one that
is drilled with .0135 drill. There are aspect ratio issues which also
apply. The process can also be applied to Thru holes, with modification.
We design such boards when blind vias are present IN surface mount pads, AND
J-Std-001 solder standards are required on the assembly. It is the only way
we have found which can produce a reasonably flat, void free surface mount
land with a Via under it.
Hole fill is a very manual operation. It can be spotty depending on
operator ability.
You are near the leading edge with this technology. Expect variations from
lot to lot with the same supplier. Expect surprises from supplier to
supplier.
The other option is to allow the holes to fill with pre-preg material. In
fact, it is hard to keep them from filling. The holes fill fine, but do not
metalize well, due to the VERY slick surface profile of the pure resin which
fills the hole. This is prefered when vias are not in pads, or if you do
not care if the tops of the filled holes are plated or not.
These comments are from a design and procurement view point. The
manufacturing info is rumor, hear-say, and in no way is to be taken as a
formula as how to use, manufacure, or market PWB's with CB-100. Dispose of
all materials properly and consult your doctor before changing any of your
medications.
George Franck
Raytheon Systems
Falls Church Virginia
"My Opinions are just that."
----------
From: [log in to unmask]
To: [log in to unmask]
Subject: [TN] Overplated blind via's
Date: Tue, 16 Jun 1998 19:22:30 GMT
Hello Technet,
Our company is busy designing some printed circuit boards with
"overplated blind via's" (I mean blind via's, made in a sequential
plating process, where the via is filled with epoxy, after which it is
covered with copper and a solderable plating).
All our vendors claim they can build such boards, but as far as I
known they do not use this technology very often, and I don't want to
be their "guinea pig".
The question :
What kind of questions should I ask our bare board vendors in order to
check wether they are capable of building these boards with good
relaibility in a reproducible way ? What are the potential problems
that the board vendors should be aware of, and should have solved ?
Any ideas ?
Mark Roach
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=========================================================================
Date: Wed, 17 Jun 1998 10:20:51 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Cobey Schmidt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Cobey Schmidt <[log in to unmask]>
Subject: Re: SMT Reliability
X-To: Alan Kreplick <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
About the only concern is the current density. This may
and may not adverse effects, depending on the application.
Cobey Schmidt
VisionTek
1175 lakeside Drive
Gurnee, IL 60031
[log in to unmask]
<mailto:[log in to unmask]>
(847) 360-7566 voice
(847) 360-7443 fax
-----Original Message-----
From: Alan Kreplick
[SMTP:[log in to unmask]]
Sent: Wednesday, June 17, 1998 6:52 AM
To: [log in to unmask]
Subject: [TN] SMT Reliability
I have to assemble and solder (by hand) 0805
resistors on 1206 pads and 0603
resistors on 0805 pads.
Any thoughts on reliability?
Am I better off bonding the resistor and running
jumper wires ("Dead-Bug")?
Thanks,
Al Kreplick
Teradyne, Inc.
617-422-3726
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=========================================================================
Date: Wed, 17 Jun 1998 07:50:44 -0700
Reply-To: Bob Carhart <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bob Carhart <[log in to unmask]>
Subject: NASA Approved Liquid Solder Masks
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7Bit
Colleagues,
Does anyone know of the existence of a list of the liquid photoimagable solder
masks that are on the NASA approved list?
Thank you,
Bob
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=========================================================================
Date: Wed, 17 Jun 1998 10:38:26 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Dave Roesler <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dave Roesler <[log in to unmask]>
Subject: Re: Flex Circuit Vendors
X-To: Jon Johnson <[log in to unmask]>
X-cc: Hobby Hobson <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-Transfer-Encoding: 7bit
Jon,
You might also want to try Sheldahl. They specialize in high volume single
and double sided flex. Contact Hobby Hobson at (507) 663-8569.
Dave Roesler
TRI-C Design, Inc.
----------
From: Jon Johnson <[log in to unmask]>
To: [log in to unmask]
Subject: [TN] Flex Circuit Vendors
Date: Wednesday, June 17, 1998 7:43 AM
I would like to contact the following flex vendors for a high volume
application
Single and Double sided Flex from 1,000,000 pieces and up for a yearly
volume.
Mek Tec
Nitto Denko
World Circuits
Jon
[log in to unmask]
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----------
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=========================================================================
Date: Wed, 17 Jun 1998 08:34:00 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Joy, Stephen C" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Joy, Stephen C" <[log in to unmask]>
Subject: Re: Ultrasonic cleaning
MIME-Version: 1.0
Content-Type: text/plain
I have seen issues with crack initiation in assembled solder joints in some
cases. Ultrasonic cleaning after x section cutting has been statistically
confirmed as the culprit.
What you may be seeing are Ni oxidation effects.
Maybe the ultrasonic cleaner is a potential process control tool!
Steve
In my experience, the only problems observed with this
cleaning method is getting a cleaning solution that will not leave a
nasty residue. If rinsed and dried properly, we have no defects.
Cobey Schmidt
VisionTek
1175 lakeside Drive
Gurnee, IL 60031
[log in to unmask]
<mailto:[log in to unmask]>
(847) 360-7566 voice
(847) 360-7443 fax
-----Original Message-----
From: Modular Components National,
Inc. [SMTP:[log in to unmask]]
Sent: Wednesday, June 17, 1998 9:19 AM To: [log in to unmask]
Subject: [TN] Ultrasonic cleaning
To all:
Are there any negative effects to using ultrasonic cleaning on nickel/gold
plating?
My reason for asking is this. We recently plated two panels and tape
tested them prior to ultrasonic cleaning. Then after ultrasonic cleaning
and during our final machining process, we experienced poor gold to nickel
adhesion.
Any input would be greatly appreciated.
Regards
Ryan
Modular Components National, Inc.
2302 Industry Court
Forest Hill, MD 2150
PH (410) 879-6553
Fax (410) 838-7629
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=========================================================================
Date: Wed, 17 Jun 1998 10:41:15 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Cobey Schmidt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Cobey Schmidt <[log in to unmask]>
Subject: Re: Ultrasonic cleaning
X-To: "Joy, Stephen C" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Agreed. I didn't mention crack initialization, due to
the fact we discovered that this generally only happened when personnel
left the assembled product in the cleaner for a long period of time. (1
hour plus.)
Cobey
-----Original Message-----
From: Joy, Stephen C
[SMTP:[log in to unmask]]
Sent: Wednesday, June 17, 1998 10:34
AM
To: [log in to unmask]
Subject: Re: [TN] Ultrasonic
cleaning
I have seen issues with crack initiation in
assembled solder joints in some
cases. Ultrasonic cleaning after x section
cutting has been statistically
confirmed as the culprit.
What you may be seeing are Ni oxidation effects.
Maybe the ultrasonic cleaner is a potential
process control tool!
Steve
In my experience, the only problems observed
with this
cleaning method is getting a cleaning solution
that will not leave a
nasty residue. If rinsed and dried properly, we
have no defects.
Cobey Schmidt
VisionTek
1175 lakeside Drive
Gurnee, IL 60031
[log in to unmask]
<mailto:[log in to unmask]>
(847) 360-7566 voice
(847) 360-7443 fax
-----Original Message-----
From: Modular Components National,
Inc. [SMTP:[log in to unmask]]
Sent: Wednesday, June 17, 1998 9:19 AM To:
[log in to unmask]
Subject: [TN] Ultrasonic cleaning
To all:
Are there any negative effects to using
ultrasonic cleaning on nickel/gold
plating?
My reason for asking is this. We recently
plated two panels and tape
tested them prior to ultrasonic cleaning. Then
after ultrasonic cleaning
and during our final machining process, we
experienced poor gold to nickel
adhesion.
Any input would be greatly appreciated.
Regards
Ryan
Modular Components National, Inc.
2302 Industry Court
Forest Hill, MD 2150
PH (410) 879-6553
Fax (410) 838-7629
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SIGNOFF TechNet
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site
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=========================================================================
Date: Wed, 17 Jun 1998 12:02:30 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Karl Sweitzer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Karl Sweitzer <[log in to unmask]>
Organization: Image Acquisition Systems http://www.kodak.com/cgsHome/ias.shtml
Subject: Re: NASA Approved Liquid Solder Masks
X-To: Bob Carhart <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Bob,
We recently went through this exercise. Three that we found with
"low" outgassing (i.e. TML ~<1%) are:
EPIC 200
Morton Electronic Materials
Tustin, CA
714-730-4535
Contact: Lincoln Eramo
TAIYO PSR-4000BM
TAIYO America, Inc.
Carson City, NV
702-885-9959
CARAPACE EMP110 (with UV Bump)
Electra Polymers & Chemicals America
Orange, CA
714-744-8394
Contact: Lee Collier
All of these vendors supplied outgassing data. You will have to run
these by your NASA materials person to final approval.
Good luck!
--
Karl Sweitzer voice: 716.47.77546
Eastman Kodak Company pager: 716.25.33681
800 Lee Road fax: 716.47.77293
Rochester, NY 14650-3118 mailto:[log in to unmask]
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=========================================================================
Date: Wed, 17 Jun 1998 11:57:02 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Zhang, Jay" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Zhang, Jay" <[log in to unmask]>
Subject: Re: Flex Circuit Vendors
X-To: Jon Johnson <[log in to unmask]>
X-cc: "Becker, Dave" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi, Jon:
You can also get in touch with Dave Becker at Sheldahl, Inc., which is a
high volume producer of both single and double sided flex circuitry.
Sheldahl is at Northfield, Minnesota and Dave's phone number is
507-663-8345.
Regards,
Jay
----------
From: Jon Johnson [SMTP:[log in to unmask]]
Sent: Wednesday, June 17, 1998 7:43 AM
To: [log in to unmask]
Subject: [TN] Flex Circuit Vendors
I would like to contact the following flex vendors for a high
volume
application
Single and Double sided Flex from 1,000,000 pieces and up for a
yearly
volume.
Mek Tec
Nitto Denko
World Circuits
Jon
[log in to unmask]
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=========================================================================
Date: Wed, 17 Jun 1998 13:11:26 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Haugaard Svend <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Haugaard Svend <[log in to unmask]>
Subject: Moisture sensitive SMD-ICs
X-cc: Andresen Erik E <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
How to store moisture sensitive SMD-ICs in a decent and economic way ?
On delivery some SMD-IC's are packed carefully in drypacks with silica
gel and humidity indicator card. The supplier states that the parts
after unpacking have to be used in a more or less rapid way - sometimes
even within hours.
However, the problem shows when not all parts are used at once so some
of them have to be stored for a while.
The supplier states that the problem can be overcome by baking the parts
prior to reflow soldering. But baking takes time and may damage the
solderability.
So I would prefer to store the unpacked not-yet-to-use parts in a
moisture controlled environment.
We look at nitrogen storage - knowing the costs of implementing and
running the thing. Is there a way to keep the nitrogen usage at a low
level ?
Or should we go for some form of "dry air environment" ? ... Who builds
such things ? ... At what costs ?
Or perhaps we could store parts in reusable dryboxes ?
Best regards
Svend
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=========================================================================
Date: Wed, 17 Jun 1998 11:09:26 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Scott Martin <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Scott Martin <[log in to unmask]>
Subject: Re: Moisture sensitive SMD-ICs
Or, you could vacuum pack them with silica! (this is what we do)
-----Original Message-----
From: Haugaard Svend [mailto:[log in to unmask]]
Sent: Wednesday,June 17,1998 5:11 AM
To: [log in to unmask]
Subject: [TN] Moisture sensitive SMD-ICs
How to store moisture sensitive SMD-ICs in a decent and economic way ?
On delivery some SMD-IC's are packed carefully in drypacks with silica
gel and humidity indicator card. The supplier states that the parts
after unpacking have to be used in a more or less rapid way - sometimes
even within hours.
However, the problem shows when not all parts are used at once so some
of them have to be stored for a while.
The supplier states that the problem can be overcome by baking the parts
prior to reflow soldering. But baking takes time and may damage the
solderability.
So I would prefer to store the unpacked not-yet-to-use parts in a
moisture controlled environment.
We look at nitrogen storage - knowing the costs of implementing and
running the thing. Is there a way to keep the nitrogen usage at a low
level ?
Or should we go for some form of "dry air environment" ? ... Who builds
such things ? ... At what costs ?
Or perhaps we could store parts in reusable dryboxes ?
Best regards
Svend
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Date: Wed, 17 Jun 1998 12:56:34 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Andy Slade <[log in to unmask]>
Subject: Re: Overplated blind via's
X-To: [log in to unmask]
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Hi Mark,
At any given point in time, we have at least a half-dozen different
part numbers going through the shop that employ blind/buried via
technology, including sequential laminations, resin filled, CD-100
filled, controlled depth drill and laser-drilled micro-vias. I can
tell you that there are no simple answers to your questions. I
wholeheartedly agree with the previous responses concerning previous
track record, proper controls, yield data, etc. However, the fact is
that every design is different and presents their own unique set of
problems.
As you are designing sequential lamination blind vias, I'll just touch
on a couple of things with this type of product that can be of
concern.
1) Thickness of the sub-assembly - Thin (below .020") multi-layered
sub-assemblies become very tricky to control from a dimensional
stability standpoint. Materials move during the first lamination, and
then again, to a less predictable degree, during the second. It can
be a nightmare geting both the blind vias and through vias to end up
at any reasonable true position location. Different tooling
techniques can help improve this, but it is difficult, if not
impossible to resolve. Increased outer layer capture pads for the
blinds can help minimize failures, but most likely you don't have room
to grow these any larger than they already are.
2) Excessively thick sub-assemblies can pose a problem from the
standpoint of adequate filling of the vias through the lamination
process. In most cases, resin will flow up the vias, and, most of
time, one is more concerned with resin removal from the surrounding
surfaces. However, if the resin doesn't make it all the way to the
surface layer, the vias take on the characteristics of controlled
depth vias, and it becomes vital that the shop is able to protect the
copper that is exposed with whatever finish metal is being plated, at
least through the outer etching process.
3) Controlled impedance on the inner layer of sub-assemblies can be a
problem, depending on the technique used to metalize the vias in the
sub. Some folks use a "dot pattern" only plating approach, then use a
print and etch process to define the inner layer patterns. This keeps
the trace width and height controllable but "off-contact" can be a
problem with this approach depending on how much of a bump is left
around the hole. Otherwise, a full panel plate, tent and etch or a
inner pattern/outer panel plate approach can be used. With these
approaches, the inner layer is being plated and, depending on current
density, trace height and width become more variable.
4) Multiple cycling of any materials through the lamination process is
not a great thing for the material. Your design should not require
that any individual layer or sub-assembly sees the more than 3
laminations, and preferably no more than 2. Lower temperature curing
materials must be employed for further laminations.
5) The cost of producing this type of blind via can be significant,
when compared to controlled depth blinds. Understand that to produce
say an 8-layer board with blinds from 1 to 4 and 5 to 8, the
fabricator is actually building 2 4-layer boards, then putting them
together as another 4-layer board. 3X the processing of a straight
8-layer. If your design can maintain an aspect ratio of less than 1:1
(laminate thickness:drill size) to the target layer, then controlled
depth drilling may be a better (less costly, easier) approach. There
are certainly things to watch out for in this approach as well, that I
won't mention here.
As George Franck mentioned, plating over the resin in the blind can be
troublesome. There are ways to "roughen" the resin surface that makes
this less of an issue, and, for the most, it can be controlled.
George also mentioned the CB-100 via-fill process. This is a great
method for insuring an almost uniform surface over the blind vias.
For "via-in-pad" designs, whether standard SMT or BGA, it can help
with routing constraints. There are limitations and you would be best
to consult with a fabricator familiar with the process before
designing it in.
Hope this helps.
Andy Slade
Sr. Product Engineer
Hadco Tech Center East
______________________________ Reply Separator _________________________________
Subject: [TN] Overplated blind via's
Author: [log in to unmask] at SMTPLink-Hadco
Date: 06/16/98 7:22 PM
Hello Technet,
Our company is busy designing some printed circuit boards with
"overplated blind via's" (I mean blind via's, made in a sequential
plating process, where the via is filled with epoxy, after which it is
covered with copper and a solderable plating).
All our vendors claim they can build such boards, but as far as I
known they do not use this technology very often, and I don't want to
be their "guinea pig".
The question :
What kind of questions should I ask our bare board vendors in order to
check wether they are capable of building these boards with good
relaibility in a reproducible way ? What are the potential problems
that the board vendors should be aware of, and should have solved ?
Any ideas ?
Mark Roach
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=========================================================================
Date: Wed, 17 Jun 1998 13:58:42 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Guynn <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Guynn <[log in to unmask]>
Subject: Re: Moisture sensitive SMD-ICs
In-Reply-To: <c=US%a=_%p=Micron%l=_CMS01EXCH3-980617170926Z-22835@cms00p
o1.micron.com>
Mime-Version: 1.0
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Scott: how are your MSD parts packaged? Tray? Tape/reel? Tubes?
At 11:09 AM 6/17/98 -0600, you wrote:
>Or, you could vacuum pack them with silica! (this is what we do)
----
Jeffrey C. Guynn <[log in to unmask]> Phone: (219) 429-6345
Lead SMD Manufacturing Engineer Fax: (219) 429-4688
Raytheon Systems Company M/S 25-31
1010 Production Road, Fort Wayne, IN 46808-4106
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=========================================================================
Date: Wed, 17 Jun 1998 13:57:25 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Guynn <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Guynn <[log in to unmask]>
Subject: Re: Moisture sensitive SMD-ICs
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
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Hi Svend,
I have been wrestling quite a bit with moisture sensitive devices (MSD)
lately in our shop. We keep all MSD parts vacuum sealed when in storage. We
keep track of the "open hours" on a label attached to every MSD bag
containing MSD components. When a part is within 4 hours of the recommended
open time provided by the manufacturer, we bake the parts prior to the next
usage at 125 C for 24 hours (as recommended by IPC-SM-786A). We have not
had solderability problems following this procedure. It is imperative that
operators keep track of the open time for any parts that are not used for a
particular run and are resealed in the MSD bag before being put back on the
shelf. We use an A-VAC nitrogen resealer with desiccant in each MSD
container, and seal any unused components in their respective MSD bag.
Generally the silver MSD bag that the parts are received in can be
resealed at least few times if the operator cuts a minimal amount off the
end when they open it.
The A-VAC is simple to use and only uses a very small amount of nitrogen to
reseal a bag. I did not purchase our resealer but I imagine it was not a
very costly item. It first pumps nitrogegn into the bag, then evacuates the
bag providing a pretty good vacuum and heat-seals the bag.
My problem is that some of our MSD parts are only available on tape and
reel. Most of our MSD parts are tray parts and can be processed per our MSD
precedure pretty easily. Supposedly moisture and be baked out of tape/reel
parts at 40 C for one week so as not to damage the cover tape. I posted a
querie on Tech-Net asking if anybody had any actual experience with baking
out moisture with tape and reel parts and I didn't get a single reply!!
At 01:11 PM 6/17/98 +0200, you wrote:
>How to store moisture sensitive SMD-ICs in a decent and economic way ?
>
>On delivery some SMD-IC's are packed carefully in drypacks with silica
>gel and humidity indicator card. The supplier states that the parts
>after unpacking have to be used in a more or less rapid way - sometimes
>even within hours.
>However, the problem shows when not all parts are used at once so some
>of them have to be stored for a while.
>The supplier states that the problem can be overcome by baking the parts
>prior to reflow soldering. But baking takes time and may damage the
>solderability.
>
>So I would prefer to store the unpacked not-yet-to-use parts in a
>moisture controlled environment.
>We look at nitrogen storage - knowing the costs of implementing and
>running the thing. Is there a way to keep the nitrogen usage at a low
>level ?
>
>Or should we go for some form of "dry air environment" ? ... Who builds
>such things ? ... At what costs ?
>
>Or perhaps we could store parts in reusable dryboxes ?
>
>
>Best regards
>Svend
>
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>
>
----
Jeffrey C. Guynn <[log in to unmask]> Phone: (219) 429-6345
Lead SMD Manufacturing Engineer Fax: (219) 429-4688
Raytheon Systems Company M/S 25-31
1010 Production Road, Fort Wayne, IN 46808-4106
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=========================================================================
Date: Wed, 17 Jun 1998 13:19:26 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Scott Martin <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Scott Martin <[log in to unmask]>
Subject: Re: Moisture sensitive SMD-ICs
Either tray or tape and reel.
-----Original Message-----
From: Jeff Guynn [mailto:[log in to unmask]]
Sent: Wednesday,June 17,1998 12:59 PM
To: [log in to unmask]
Subject: Re: [TN] Moisture sensitive SMD-ICs
Scott: how are your MSD parts packaged? Tray? Tape/reel? Tubes?
At 11:09 AM 6/17/98 -0600, you wrote:
>Or, you could vacuum pack them with silica! (this is what we do)
----
Jeffrey C. Guynn <[log in to unmask]> Phone: (219) 429-6345
Lead SMD Manufacturing Engineer Fax: (219) 429-4688
Raytheon Systems Company M/S 25-31
1010 Production Road, Fort Wayne, IN 46808-4106
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=========================================================================
Date: Wed, 17 Jun 1998 14:30:58 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Guynn <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Guynn <[log in to unmask]>
Subject: Re: Moisture sensitive SMD-ICs
In-Reply-To: <c=US%a=_%p=Micron%l=_CMS01EXCH3-980617191926Z-23008@cms00p
o1.micron.com>
Mime-Version: 1.0
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Hi Scott
Are you baking both types of parts when they have accumulated the
recommended open time? Are you tracking open time? I'm very curious as to
what procedures you're following, especially if you're baking tape/reel parts.
At 01:19 PM 6/17/98 -0600, you wrote:
>Either tray or tape and reel.
>
>-----Original Message-----
>From: Jeff Guynn [mailto:[log in to unmask]]
>Sent: Wednesday,June 17,1998 12:59 PM
>To: [log in to unmask]
>Subject: Re: [TN] Moisture sensitive SMD-ICs
>
>
>Scott: how are your MSD parts packaged? Tray? Tape/reel? Tubes?
>
>At 11:09 AM 6/17/98 -0600, you wrote:
>>Or, you could vacuum pack them with silica! (this is what we do)
----
Jeffrey C. Guynn <[log in to unmask]> Phone: (219) 429-6345
Lead SMD Manufacturing Engineer Fax: (219) 429-4688
Raytheon Systems Company M/S 25-31
1010 Production Road, Fort Wayne, IN 46808-4106
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=========================================================================
Date: Wed, 17 Jun 1998 14:02:30 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
LI YUAN <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: LI YUAN <[log in to unmask]>
Subject: Bonding of Silica to Silica and Silica to Pd
MIME-Version: 1.0
Content-Type: TEXT/PLAIN; charset=US-ASCII
Dear Technetters,
I have a project on hand which needs your inputs. I need to bond Silica to
Silica and Silica to Pd. Each sheet is about 2"x3" and 1mm thick. The
bonding needs to be water tight. Any suggestions? Thanks,
Yuan Li
Research Associate
CAMPmode (Center For Advanced Manufacturing and Packaging of Microwave,
Optical and Digital Electronics)
University of Colorado at Boulder
CB 427, Boulder, CO 80309-0427
http://saagar.colorado.edu/~liy
(303)492-0481
(303)492-3498 (Fax)
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=========================================================================
Date: Wed, 17 Jun 1998 16:23:51 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Flex Circuit Vendors
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I wonder why you have left out Adflex, and Sheldahl?
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=========================================================================
Date: Wed, 17 Jun 1998 13:44:48 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bill Davis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Davis <[log in to unmask]>
Subject: Re: Flex Circuit Vendors
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
As well as Parlex?
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Wednesday, June 17, 1998 1:24 PM
> To: [log in to unmask]
> Subject: Re: [TN] Flex Circuit Vendors
>
> I wonder why you have left out Adflex, and Sheldahl?
>
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Date: Wed, 17 Jun 1998 15:06:44 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ron Hayashi <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ron Hayashi <[log in to unmask]>
Subject: Re: Flex Circuit Vendors -Reply
Mime-Version: 1.0
Content-Type: text/plain
Did anyone mention "M-Flex" out in California?
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=========================================================================
Date: Wed, 17 Jun 1998 18:31:49 -0400
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Andy Magee <[log in to unmask]>
Subject: Re: Flex Circuit Vendors
X-To: [log in to unmask]
MIME-Version: 1.0
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Don't forget ADFlex Solutions in Chandler, AZ This is what they do best.
You can contact them at:
www.adflex.com
Andy Magee
Still Unemployed Flex Guru
[log in to unmask]
Jon wrote,
I would like to contact the following flex vendors for a high volume
application
Single and Double sided Flex from 1,000,000 pieces and up for a yearly
volume.
Mek Tec
Nitto Denko
World Circuits
Jon
[log in to unmask]
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=========================================================================
Date: Thu, 18 Jun 1998 01:04:50 +0200
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jacob Ransborg <[log in to unmask]>
Subject: Cleaning Process after Electroless copper
MIME-Version: 1.0
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Hi technetters
I would like to hear if anybody have experience wtith a cleaning process of
PCB-boards after plating with electroless copper. Does anybody brush the
boards or use a chemical treatment etc.
Regards
Jacob Ransborg
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Date: Wed, 17 Jun 1998 16:06:06 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
bob metcalf <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: bob metcalf <[log in to unmask]>
Subject: NASA Approved Liquid Solder Masks -Reply
X-To: [log in to unmask]
Bob, NASA should be able to provide such a list. Also contact the various
solder mask manufactures. They should have the information regarding
the NASA specifications as well.
Bob Metcalf
Morton Electronic Materials
714-730-8356
>>> Bob Carhart <[log in to unmask]> 06/17/98 07:50am
>>>
Colleagues,
Does anyone know of the existence of a list of the liquid photoimagable
solder
masks that are on the NASA approved list?
Thank you,
Bob
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Date: Thu, 18 Jun 1998 09:18:07 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Klasek <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Klasek <[log in to unmask]>
Subject: Re: Conductive Epoxy for Solder termination
X-To: "[log in to unmask]"
<[log in to unmask]>
X-cc: "[log in to unmask]"
<[log in to unmask]>
MIME-Version: 1.0
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Eden ,
if you have camelot you can have a dual needle with preset foot relating
you the exact separating height ;
the placement force does not apply as far as I know .
Picture basically two needles with a touch foot beside in calibrated
offset .
As you take off sideways , after dual dispense , you can not string into
each pad .
Contact Shaafi : [log in to unmask]
he knows better than most , and can provide you with an actual custom
solution . He would recommend you volume dispensed as well .
They have a special kit for measuring the volume as well .
See you
Paul Klasek
http://www.resmed.com
> ----------
> From: by Dr. Eden Chen
> XianSong[SMTP:[log in to unmask]]
> Sent: Monday, 15 June 1998 13:35
> To: [log in to unmask]
> Subject: [TN] Conductive Epoxy for Solder termination
>
> Dear Sir,
>
> Some silver-filled conductive epoxies in the market claim to be
> solder
> replacement, but successful use of these material require a very
> good
> understanding of the epoxies properties, the process and CTE
> mismatch.
>
> The epoxy can be deposited to the pad by stencil printing or
> dispensing,
>
> Dispensing process has the tailing problem which can cause short
> for
> 0402 chip resistor/capacitor. It is very difficult to form the
> fillet
> for epoxy, because the epoxy may have a gap between the side of
> chip
> resistor/capacitor and dot peak of epoxy. How much should the
> placement force be applied and how big should the dot size for
> 0402
> resistor/capacitor?
>
> I like to discuss the above-mentioned issue in the TECHNET
>
> Eden
>
> ################################################################
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> following text in the body:
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> additional information.
> For technical support contact Hugo Scaramuzza at [log in to unmask] or
> 847-509-9700 ext.312
> ################################################################
>
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=========================================================================
Date: Thu, 18 Jun 1998 07:36:44 +0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Noppadol S." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Noppadol S." <[log in to unmask]>
Subject: Re: PEELABLE REQUIREMENT
X-To: "L.VINOD" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Dear sir,
Please try Minico M-7200 of Emerso&Cuming, it proof to 240 C HASL and 260
C Solder heat resistance. The branch in Asia-Pacific is in Japan
100 Kaneda, Atsugi-shi
Kanagawa-ken, 243
Japan
Tel : (81) 462-25-8815
Fax : (81) 462-22-1347
Good luck
Noppadol S.
At 10:06 17/6/98 +0500, you wrote:
>Dear Sir,
>
>We are the largest manufacurer of printed circuit board in INDIA .
>
>We have the fallowing requirement of peelable SM.
>
>We want Peelable SM ink that with stands IR Relow & Wave soldering cycles.
>
>IR Reflow means board temprature upto 240 deg,c for 40-60 secs
>
>
>wave soldering means a wave of 250 Deg c and pre heat of 150-200 DEG C.
>
>Our exisiting peelable inks of two suppliers withstands only 210 DEG c
>
>Can any one suggest us a good peelable ink source?
>
>
>
>Awaiting yr reply
>
>
>
>Regards
>
>
>
>L.VINOD PH: +91-8221-26375,
>26618
>INDAL ELECTRONICS LTD., FAX: +91-8221-26641
>PLOT NO 12A, INDUSTRIAL AREA WEB: http://www.indalpcb.com
>NANJANGUD, MYSORE DIST., E-MAIL : [log in to unmask]
>KARNATAKA - 571 301.
>
>################################################################
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>
>
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=========================================================================
Date: Wed, 17 Jun 1998 20:17:08 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Cleaning Process after Electroless copper
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Jacob Ransborg wrote:
>
> Hi technetters
>
> I would like to hear if anybody have experience wtith a cleaning process of
> PCB-boards after plating with electroless copper. Does anybody brush the
> boards or use a chemical treatment etc.
>
> Regards
>
> Jacob Ransborg
>
> ################################################################
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> For technical support contact Hugo Scaramuzza at [log in to unmask] or 847-509-9700 ext.312
> ################################################################Jacob,
Most electroless copper deposits are fairly rough in terms of topography
and generally provide an excellent surface for dry film adhesion.
Generally, no precleaning after electroless is required if you are going
directly to imaging.(assume hold times between electroless and
photoresist lamination is less tha eight hours)
Depending on deposit thickness, scrubbing is not recommended anyway.
Good luck.
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=========================================================================
Date: Wed, 17 Jun 1998 21:52:10 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Rudy Sedlak>" <[log in to unmask]>
Subject: Re: Bonding of Silica to Silica and Silica to Pd
X-To: [log in to unmask]
Mime-Version: 1.0
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In a message dated 98-06-17 16:05:32 EDT, you write:
<< I have a project on hand which needs your inputs. I need to bond Silica to
Silica and Silica to Pd. Each sheet is about 2"x3" and 1mm thick. The
bonding needs to be water tight. Any suggestions? Thanks,
>>
Does the bond need to be flexible at all? If not, you may want to look at
solutions of Sodium Silicate.
These are available with varying Na2O to SiO2 ratios, try low Na2O, to higher
SiO2, and apply thin. These adhesives do not have much shelf life, but they
are cheep, and the bond is very chemical resistant.
Good luck
Rudy Sedlak
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=========================================================================
Date: Wed, 17 Jun 1998 20:09:56 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Rick Thompson <[log in to unmask]>
Subject: Conformal Coating?
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Hi Technetters,
A number of our customers are starting to request more conformal coating of
the PCBA's we assemble for them, and I have been given the task of
evaluating various materials and equipment for doing this in-house rather
than outsourcing it. Specifically, I looking for any help or pointers I can
get on sources of equipment, specific types (SR, etc) I should consider,
environmental and health concerns and regulations, etc. Spraying appears to
be our best application method at this point. Any comments on building a
spray booth vs. purchasing a unit from one of the vendors supplying these
would also be appreciated.
Thanks in advance for any tips you might provide.
Regards,
Rick Thompson
Ventura Electronics Assembly
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=========================================================================
Date: Thu, 18 Jun 1998 00:35:19 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Board Material for a 500mhz to 2ghz Application.
X-To: [log in to unmask]
Mime-Version: 1.0
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We have had very good success with GE's GETEK. It processes nearly like FR4
and has good higher frequency characteristics.
Frank
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=========================================================================
Date: Thu, 18 Jun 1998 00:42:05 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: SMT Reliability
X-To: [log in to unmask]
Mime-Version: 1.0
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Besides current capacities, I would use a low thermal-capactitive iron (like a
Metcal) to do the hand assembly since temperature shock can be a big factor
with smaller chip components...especially the capacitors.
I cannot back the following statement up quantitatively, but the larger solder
wall that the 0603 component sees due to the larger 0805 solder pad can cause
higher stresses in the component since the joint becomes less compliant during
thermal excursions. This could lower reliability.
Frank
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=========================================================================
Date: Wed, 17 Jun 1998 22:38:08 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Fulabhai Patel <[log in to unmask]>
Organization: home
Subject: Re: Cleaning Process after Electroless copper
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Depends upon topography retained after elecroless copper,
1. Neutralise, rinse, scrubb , dry
2. Neutralise, rinse, antitarnish,dry
3. Neutralise , rinse, light pumise scrubb on machine,dry
Final surface must be clean, uniform , acidic , dry
Fulabhai Patel [log in to unmask]
[log in to unmask] wrote:
>
> Jacob Ransborg wrote:
> >
> > Hi technetters
> >
> > I would like to hear if anybody have experience wtith a cleaning process of
> > PCB-boards after plating with electroless copper. Does anybody brush the
> > boards or use a chemical treatment etc.
> >
> > Regards
> >
> > Jacob Ransborg
> >
> > ################################################################
> > TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
> > ################################################################
> > To subscribe/unsubscribe, send a message to [log in to unmask] with following text in the body:
> > To subscribe: SUBSCRIBE TechNet <your full name>
> > To unsubscribe: SIGNOFF TechNet
> > ################################################################
> > Please visit IPC web site (http://jefry.ipc.org/forum.htm) for additional information.
> > For technical support contact Hugo Scaramuzza at [log in to unmask] or 847-509-9700 ext.312
> > ################################################################Jacob,
> Most electroless copper deposits are fairly rough in terms of topography
> and generally provide an excellent surface for dry film adhesion.
> Generally, no precleaning after electroless is required if you are going
> directly to imaging.(assume hold times between electroless and
> photoresist lamination is less tha eight hours)
> Depending on deposit thickness, scrubbing is not recommended anyway.
> Good luck.
>
> ################################################################
> TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
> ################################################################
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> ################################################################
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=========================================================================
Date: Thu, 18 Jun 1998 09:31:17 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: uwave curing ovens
MIME-Version: 1.0
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Hi, electronic friends.
You can buy a neat and simple microwave adhesive curing oven today. And
make the curing process as easy as putting your plastic coffee cup in
the oven for a few seconds heating. Adhesives exist with special
"dopants" which make them curable in a few seconds. What a contrast to
1-2hours in a gigantic electromechanical oven from yesterday. I have
learned that wondermachines don't exist, so, what is the medal's
backside? Can you cure the silver epoxy on large MCM with metal back,
for instance? And what happens on inside of the semiconductor chips and
other components? /Ingemar
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=========================================================================
Date: Thu, 18 Jun 1998 16:16:41 +0530
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Elmec <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Elmec <[log in to unmask]>
Subject: Enquiry...
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--------------E66EDC304B066B16F27A2FE7
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Dear Sir,
We would like to introduce ourselves as an well established marketing
organisation dealing with semiconductor components and communication
equipments. We have an enquiry from one of our good customers for the
supply of item as per the list enclosed. Kindly send us your best offer
with complete product details, technical data sheets etc. Your price
should be valid for 90 days.Kindly send your FOB price. Your FOB price
should be inclusive of 5% commission for Elmec. In case you are unable
to supply the following, please let us know the name,address and fax nos
of the supplier who can offer us the same
With Best Regards,
N.V.V.KRISHNA
Elmec Associates,
#256 / 7, 44th Cross, 5th Block,
Jayanagar,
Bangalore - 560 041
Phone : +91-80-6658725 / 6636341 / 6711195
Fax : +91-80-6658725 / 6712380
E-Mail : [log in to unmask]
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--------------E66EDC304B066B16F27A2FE7--
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=========================================================================
Date: Thu, 18 Jun 1998 07:48:15 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Nelson, John" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Nelson, John" <[log in to unmask]>
Subject: Re: Cleaning Process after Electroless copper
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain
In a previous life I was instrumental in switching processes from
scrubbing with a compressed
wheel to a no-scrub process. I had very little confidence in the
quality of the rinsing and drying
from the plating process so I installed a clean line that consisted of a
four foot, high pressure
chamber with citric acid followed by three chambers with cascading water
rinse. Each chamber
had over 30 psi on fan nozzles.
The citric is a fair antitarnish and has the advantage of being cheap.
It must be dumped daily
to prevent the buildup of bacterial slime. Perhaps the most important
part of the process was
the high pressure rinsing. This is needed to remove any loose particles
of copper from around
the edges of the panels. These particles are copper or copper coated,
totally opaque to light and
and if not removed before the imaging process will ruin yields.
> -----Original Message-----
> From: Jacob Ransborg [SMTP:[log in to unmask]]
> Sent: Wednesday, June 17, 1998 7:05 PM
> To: [log in to unmask]
> Subject: [TN] Cleaning Process after Electroless copper
> Hi technetters
> I would like to hear if anybody have experience wtith a cleaning
> process of
> PCB-boards after plating with electroless copper. Does anybody brush
> the
> boards or use a chemical treatment etc.
>
> Regards
> Jacob Ransborg
>
>
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=========================================================================
Date: Thu, 18 Jun 1998 07:37:55 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"D. Rooke" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "D. Rooke" <[log in to unmask]>
Subject: FAB: Selective Solder Stripping
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
I was approached today by a request as to whether we could supply selective
solder strip boards. These boards were reflowed selective solder with hard
gold plated fingers. I hadn't heard of this for a number of years since the
advent of HASL and I was wondering whether there is still widespread use of
this process. Can any users or manufacturers of selective strip confirm its
use in their operations?
Just curious....
Dave Rooke
Viasystems Canada - Pointe Claire
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=========================================================================
Date: Thu, 18 Jun 1998 08:06:04 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mike Holmes x4356 <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mike Holmes x4356 <[log in to unmask]>
Subject: Re: FAB: Selective Solder Stripping
----- Begin Included Message -----
From: "D. Rooke" <[log in to unmask]>
I was approached today by a request as to whether we could supply selective
solder strip boards. These boards were reflowed selective solder with hard
gold plated fingers. I hadn't heard of this for a number of years since the
advent of HASL and I was wondering whether there is still widespread use of
this process. Can any users or manufacturers of selective strip confirm its
use in their operations?
----- End Included Message -----
Mr. Rooke,
Our Electronic Systems Sector default finish is tin-lead electroplate
and fuse with solder mask over bare copper which requires selective solder strip.
Our Communications Systems Division is specifying HASL more and more often.
Some of our suppliers can still do selective solder strip, some can (or will)
not.
|
/|\
/ | \
/ |__\ /\
/____@_\ |
~~[________)~~
~~~~~~~~~~~~~~[]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Michael L. (Mike) Holmes
Charter Member, Space Coast Chapter, IPC Designers Council
MS 1-5852
Designer 3 Harris Corporation
PWB Design Group Government Communications Systems Division
Digital and Electronic 2400 NE Palm Bay Road
Packaging Section Palm Bay, FL 32905
*****************************************************************************
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=========================================================================
Date: Thu, 18 Jun 1998 08:00:39 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Zecal Engineering <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Zecal Engineering <[log in to unmask]>
Subject: Citric acid
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Does anyone know of any problems citric acid cleaning causes to
subsequent finishing(eg, wirebonding, etc.)
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=========================================================================
Date: Thu, 18 Jun 1998 08:22:38 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Blanchet, Richard" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Blanchet, Richard" <[log in to unmask]>
Subject: Re: Conformal Coating?
MIME-Version: 1.0
Content-Type: text/plain
I suggest you go back to this forum archives. This subject has been
covered many times during the past year and I'm sure you will find a lot
of valuable info there. Also, I would expect Graham to give you some
info too.
Richard Blanchet
Process Engineer, screening
Viasystems Canada Inc.
tel.: (514) 694-8900, ext. 4189
fax: (514) 694-9776
[log in to unmask]
> -----Original Message-----
> From: Rick Thompson [SMTP:[log in to unmask]]
> Sent: 17 juin, 1998 23:10
> To: [log in to unmask]
> Subject: [TN] Conformal Coating?
>
> Hi Technetters,
>
> A number of our customers are starting to request more conformal
> coating of
> the PCBA's we assemble for them, and I have been given the task of
> evaluating various materials and equipment for doing this in-house
> rather
> than outsourcing it. Specifically, I looking for any help or pointers
> I can
> get on sources of equipment, specific types (SR, etc) I should
> consider,
> environmental and health concerns and regulations, etc. Spraying
> appears to
> be our best application method at this point. Any comments on
> building a
> spray booth vs. purchasing a unit from one of the vendors supplying
> these
> would also be appreciated.
>
> Thanks in advance for any tips you might provide.
>
> Regards,
>
> Rick Thompson
> Ventura Electronics Assembly
>
> ################################################################
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> following text in the body:
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> ################################################################
> Please visit IPC web site (http://jefry.ipc.org/forum.htm) for
> additional information.
> For technical support contact Hugo Scaramuzza at [log in to unmask] or
> 847-509-9700 ext.312
> ################################################################
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=========================================================================
Date: Thu, 18 Jun 1998 08:42:43 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: SMT Reliability
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
The larger solder fillets resulting from putting 0603 CCs on 0805 pads are
only a possible reliability problem, if the assembly gets cycled to cold
temperatures.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask]
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=========================================================================
Date: Thu, 18 Jun 1998 08:31:58 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Coleman, Rob" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Coleman, Rob" <[log in to unmask]>
Subject: Re: Cleaning Process after Electroless copper
X-To: [log in to unmask]
Preferred method of surface prep is dry film dependent. Some films adhere
best via mechanical bond (scrub) others prefer chemical bond
(antitarnishes). Check with dry film supplier for their recommendation. With
proper rinsing and neutalization after e-less followed by a good antitarn
should produce best results. Only concern is hold time between after eless
and prior to dry film lamination. You should not scrub if you do not need to
for fear of possible over scrub resulting in rim voids at knee of the hole.
Scrubbing also introduces unecessary mechanical stress.
-----Original Message-----
From: Jacob Ransborg <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Wednesday, June 17, 1998 6:32 PM
Subject: [TN] Cleaning Process after Electroless copper
>Hi technetters
>
>I would like to hear if anybody have experience wtith a cleaning process of
>PCB-boards after plating with electroless copper. Does anybody brush the
>boards or use a chemical treatment etc.
>
>
>Regards
>
>Jacob Ransborg
>
>################################################################
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>################################################################
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information.
>For technical support contact Hugo Scaramuzza at [log in to unmask] or
847-509-9700 ext.312
>################################################################
>
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=========================================================================
Date: Thu, 18 Jun 1998 08:32:00 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Scott M. Severson" <[log in to unmask]>
Organization: emd associates
Subject: Re: SMT Reliability
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
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Werner,
Will cycling the temerature cold put the component under tensile or
compressive load? To the best of my knowledge ceramic materials (in
general) should have a high tesile strength with a small strain to failure
in comparison with standard isotropic materials.
In a PCB application which base material will win the CTE battle, the
isotropic copper pad and solder that the component is attached to or the
anisotropic laminate that the board is made out of?
Any thoughts?
Scott M. Severson
Benchmark Electronics Inc.
>Date: 18-Jun-98 6:42:43 -0600
>From: ENGELMAI @ SMTP (Werner Engelmaier) [log in to unmask]
>To: TECHNET @ SMTP [log in to unmask]
>Subject: Re: [TN] SMT Reliability
>
>The larger solder fillets resulting from putting 0603 CCs on 0805 pads are
>only a possible reliability problem, if the assembly gets cycled to cold
>temperatures.
>
>Werner Engelmaier
>Engelmaier Associates, L.C.
>Electronic Packaging, Interconnection and Reliability Consulting
>7 Jasmine Run
>Ormond Beach, FL 32174 USA
>Phone: 904-437-8747, Fax: 904-437-8737
>E-mail: [log in to unmask]
>
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Date: Thu, 18 Jun 1998 09:45:16 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Andy Slade <[log in to unmask]>
Subject: Re: FAB: Selective Solder Stripping
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Dave,
We see this on fairly frequent basis. Usually needed if a MIL-type
requirement of ".0003" as deposited" is specified. Also, if other
selective metalization, such as soft gold, is required in other areas
of part, HASL becomes a hassle (sorry, I had to), with masking and
such.
Andy Slade
______________________________ Reply Separator _________________________________
Subject: [TN] FAB: Selective Solder Stripping
Author: "D. Rooke" <[log in to unmask]> at SMTPLink-Hadco
Date: 06/18/98 7:37 AM
I was approached today by a request as to whether we could supply selective
solder strip boards. These boards were reflowed selective solder with hard
gold plated fingers. I hadn't heard of this for a number of years since the
advent of HASL and I was wondering whether there is still widespread use of
this process. Can any users or manufacturers of selective strip confirm its
use in their operations?
Just curious....
Dave Rooke
Viasystems Canada - Pointe Claire
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Date: Thu, 18 Jun 1998 16:59:22 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Eltek Ltd. - Process Engineering" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Eltek Ltd. - Process Engineering" <[log in to unmask]>
Subject: Washing of small PCB
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Technetters,
After routing stage the PCBs are washed to remove dust , fingerprints etc .
Normally , this is done using washing machine fitted with hot water rinse ,
soft brushes , high pressure rinse , DI rinse and dryer . As long as the PCB
is bigger than , say , 7" by 4" , we have no problems . Probles are with
really small boards such as 2" by 3" or even less .
What kind of washing machines are used for such small boards ?
Edward Szpruch
Eltek Ltd - Israel
Tel 972 3 9395050
Fax 972 3 9309581
E-mail : [log in to unmask]
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Date: Thu, 18 Jun 1998 07:59:39 -0600
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kent Johnson <[log in to unmask]>
Organization: Unicircuit, Inc.
Subject: Re: Overplated blind via's
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Mark,
You have a valid concern. This type of construction requires some skill
and experience to produce reliable boards.
FYI, we have built in excess of $1 million of this type of product, to
IPC-RB-276 Type 4 Class 3 specs, for flight hardware (source inspected).
The majority of these boards were 15 layer, with blinds from layer 1-14,
and also 12 layer with blinds from 1-10. The hole diameter was typically
.010, so getting proper resin fill was a challenge. They were then plated
over.
I'll be glad to talk with you about this further.
Kent Johnson
UNICIRCUIT
Phone: 800-648-6449
On Tuesday, June 16, 1998 1:23 PM, [log in to unmask] [SMTP:[log in to unmask]]
wrote:
> Hello Technet,
>
> Our company is busy designing some printed circuit boards with
> "overplated blind via's" (I mean blind via's, made in a sequential
> plating process, where the via is filled with epoxy, after which it is
> covered with copper and a solderable plating).
> All our vendors claim they can build such boards, but as far as I
> known they do not use this technology very often, and I don't want to
> be their "guinea pig".
> The question :
> What kind of questions should I ask our bare board vendors in order to
> check wether they are capable of building these boards with good
> relaibility in a reproducible way ? What are the potential problems
> that the board vendors should be aware of, and should have solved ?
> Any ideas ?
>
> Mark Roach
>
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Date: Thu, 18 Jun 1998 10:49:20 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Aric parr <[log in to unmask]>
Subject: Re: Conformal Coating?
-------------
Original Text
From: Aric Parr@01635@Lectron_RH, on 6/18/98 7:30 AM:
To:
EatonWHQ@CorpMail@WHQCleveOH[C=US/A=INTERNET/DDA=ID/rickt(a)appliedsynergy.c
om, internet[[log in to unmask]]]
Try a selective coating system. Start up cost is significantly higher,
material cost is lower, masking cost is lower.
Hand spraying provides little process control for coverage and thickness
relative to any automatic process.
100% reactive formulations should be used for EPA permitting reasons.
Thermal cure systems require oven bakes, where not all components can
handle the cure properties. Lower temperature cure relative to the
supplier's specifications can result in poor coating adhesion, no permanent
cure, poor performance....
RTV systems (moisture cure) work great and will always cure. They may also
cure inside the sytem if you don't design for it. Many do not require an
oven for rapid curing.
Avoid UV cure. Shadow cure mechanisms are not very robust. It is also very
sensitive to flux residues.
ARIC PARR
Sr. Manufacturing Engineer
Eaton Corp
1400 S. Livernois
P. O. Box 5020
Rochester Hills, Mi 48308-5020
[log in to unmask]
248 608 7780
Fax: 248 656 2242
---------
From: C=US/A=INTERNET/DDA=ID/rickt(a)appliedsynergy.com, on 6/17/98 11:23
PM:
To: Aric Parr@01635@Lectron_RH,
EatonWHQ@CorpMail@WHQCleveOH[C=US/A=INTERNET/DDA=ID/TechNet(a)IPC.ORG]
Hi Technetters,
A number of our customers are starting to request more conformal coating of
the PCBA's we assemble for them, and I have been given the task of
evaluating various materials and equipment for doing this in-house rather
than outsourcing it. Specifically, I looking for any help or pointers I
can
get on sources of equipment, specific types (SR, etc) I should consider,
environmental and health concerns and regulations, etc. Spraying appears
to
be our best application method at this point. Any comments on building a
spray booth vs. purchasing a unit from one of the vendors supplying these
would also be appreciated.
Thanks in advance for any tips you might provide.
Regards,
Rick Thompson
Ventura Electronics Assembly
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=========================================================================
Date: Thu, 18 Jun 1998 10:18:15 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jack Crawford <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jack Crawford <[log in to unmask]>
Subject: Re: Conformal Coating?
X-To: [log in to unmask]
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Rick, you should also consider getting a copy of IPC-CC-830 "Qualificaiton and
Performance of Electrical Insulating Compound for Printed Board Assemblies".
(Revision A of this document is in the final stage of Interim Final Balloting but is
still a couple of months away from publication.)\
You can order IPC-CC-830 from IPC Customer Service at 847.509.9700 or through our web
site at http://www.ipc.org. Cost is $15 members/$20 non-members.
IPC/SMTA Electronics Assembly Expo
Technical Committee Meetings, Conference, Exhibits
Providence RI October 24-29
More info at http://www.ipc.org
Jack Crawford, IPC Project Manager - Assembly
2215 Sanders Road, Northbrook IL 60062-6135
[log in to unmask] 847-509-9700 x 393 fax 847-509-9798
>>> Rick Thompson <[log in to unmask]> 06/17/98 10:09PM >>>
Hi Technetters,
A number of our customers are starting to request more conformal coating of
the PCBA's we assemble for them, and I have been given the task of
evaluating various materials and equipment for doing this in-house rather
than outsourcing it. Specifically, I looking for any help or pointers I can
get on sources of equipment, specific types (SR, etc) I should consider,
environmental and health concerns and regulations, etc. Spraying appears to
be our best application method at this point. Any comments on building a
spray booth vs. purchasing a unit from one of the vendors supplying these
would also be appreciated.
Thanks in advance for any tips you might provide.
Regards,
Rick Thompson
Ventura Electronics Assembly
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=========================================================================
Date: Thu, 18 Jun 1998 11:19:03 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Washing of small PCB
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In a message dated 6/18/98 6:59:49 AM Pacific Daylight Time,
[log in to unmask] writes:
> Technetters,
> After routing stage the PCBs are washed to remove dust , fingerprints etc .
> Normally , this is done using washing machine fitted with hot water rinse ,
> soft brushes , high pressure rinse , DI rinse and dryer . As long as the
PCB
> is bigger than , say , 7" by 4" , we have no problems . Probles are with
> really small boards such as 2" by 3" or even less .
> What kind of washing machines are used for such small boards ?
> Edward Szpruch
> Eltek Ltd - Israel
> Tel 972 3 9395050
> Fax 972 3 9309581
> E-mail : [log in to unmask]
Hello Ed,
Normally what I've done in the past (and what I'm having to do now), is
getting some stainless steel wire baskets made to place the boards in. Made of
a heavy enough gage stainless wire that it'll be able to take the abuse and
give it some weight so that it doesn't fly about inside the cleaner like small
boards do when trying to wash them individually.
That's one thing that seems to be a bit of a headache with the newer
aqueous cleaners...along with the added cleaning power that the 10-15
horsepower washer pumps and drying blowers bring in the latest generation
cleaners, the problem is trying to keep the darn things from bouncing around
like a ping-pong ball inside the cleaner. They do have double mesh belt
systems out that do capture the boards preventing that from happening, but
they've got their problems too...getting tangled and jamming, boards getting
caught in it and taking them back into the machine to follow the belt around a
bunch of rollers nicely stressing the solder joints...
Baskets are about the only thing I've found that works...
-Steve Gregory-
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Date: Thu, 18 Jun 1998 10:08:50 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Mauricio Castro <[log in to unmask]>
Subject: Re: Washing of small PCB
Mime-Version: 1.0
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Use metal cages to put the small boards, but be sure keep the height
very low.
With this cages you can use your big Cleaner to wash small boards.
Mauricio
______________________________ Reply Separator _________________________________
Subject: [TN] Washing of small PCB
Author: "Eltek Ltd. - Process Engineering" <[log in to unmask]> at
INTERNET
Date: 18/6/98 4:59 PM
Technetters,
After routing stage the PCBs are washed to remove dust , fingerprints etc .
Normally , this is done using washing machine fitted with hot water rinse ,
soft brushes , high pressure rinse , DI rinse and dryer . As long as the PCB
is bigger than , say , 7" by 4" , we have no problems . Probles are with
really small boards such as 2" by 3" or even less .
What kind of washing machines are used for such small boards ?
Edward Szpruch
Eltek Ltd - Israel
Tel 972 3 9395050
Fax 972 3 9309581
E-mail : [log in to unmask]
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=========================================================================
Date: Thu, 18 Jun 1998 11:29:16 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Larry Crane <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Larry Crane <[log in to unmask]>
Subject: Re: uwave curing ovens
X-To: [log in to unmask]
X-cc: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/mixed;
Boundary="0__=gTPBLoVveQugYOTRz5JXOL43CfSkxHrX3A8UYqfVmZTpGyEvf8UMLe6W"
--0__=gTPBLoVveQugYOTRz5JXOL43CfSkxHrX3A8UYqfVmZTpGyEvf8UMLe6W
Content-Type: text/plain; charset=us-ascii
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As a futher insight in this country Lambda Technologies has developed a
variable frequency microwave oven. they have done extensive testing at the
CALCE center to prove that microwave has no negative impact on the chips.
contact there is Dr. Zak Fahti. [log in to unmask]
[log in to unmask] on 06/18/98 03:31:17 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to [log in to unmask]
To: [log in to unmask]
cc: (bcc: Larry Crane/LRH/Loctite Americas)
Subject: [TN] uwave curing ovens
Hi, electronic friends.
You can buy a neat and simple microwave adhesive curing oven today. And
make the curing process as easy as putting your plastic coffee cup in
the oven for a few seconds heating. Adhesives exist with special
"dopants" which make them curable in a few seconds. What a contrast to
1-2hours in a gigantic electromechanical oven from yesterday. I have
learned that wondermachines don't exist, so, what is the medal's
backside? Can you cure the silver epoxy on large MCM with metal back,
for instance? And what happens on inside of the semiconductor chips and
other components? /Ingemar
--0__=gTPBLoVveQugYOTRz5JXOL43CfSkxHrX3A8UYqfVmZTpGyEvf8UMLe6W
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IGRvbid0IGV4aXN0LCBzbywgd2hhdCBpcyB0aGUgbWVkYWwncyB9XHFse1xmMVxmczIwXGNmMFx1
cDBcZG4wIGJhY2tzaWRlPyBDYW4geW91IGN1cmUgdGhlIHNpbHZlciBlcG94eSBvbiBsYXJnZSBN
Q00gd2l0aCBtZXRhbCBiYWNrLCB9XHFse1xmMVxmczIwXGNmMFx1cDBcZG4wIGZvciBpbnN0YW5j
ZT8gQW5kIHdoYXQgaGFwcGVucyBvbiBpbnNpZGUgb2YgdGhlIHNlbWljb25kdWN0b3IgY2hpcHMg
YW5kIH1ccWx7XGYxXGZzMjBcY2YwXHVwMFxkbjAgb3RoZXIgY29tcG9uZW50cz8gL0luZ2VtYXJ9
fQ==
--0__=gTPBLoVveQugYOTRz5JXOL43CfSkxHrX3A8UYqfVmZTpGyEvf8UMLe6W--
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=========================================================================
Date: Thu, 18 Jun 1998 08:49:04 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, ETS <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: ETS <[log in to unmask]>
Subject: Re: Enquiry...
X-To: Elmec <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Dear Sir,
Thank you for your inquiry but if I understand you correctly you are looking
for solder paste manufactured by Kestor Solders? Am I correct?
ETS is the manufacturer of Solder Reflow Systems and Curing Ovens for use in
the Surface Mount Industry. If your customer has a need for a reflow or
curing oven then please write me again. Otherwise I believe that you are
trying to contact Kestor Solders.
Sincerely,
Brian Stumm
Director, Sales & Marketing
>Dear Sir,
>We would like to introduce ourselves as an well established marketing
>organisation dealing with semiconductor components and communication
>equipments. We have an enquiry from one of our good customers for the
>supply of item as per the list enclosed. Kindly send us your best offer
>with complete product details, technical data sheets etc. Your price
>should be valid for 90 days.Kindly send your FOB price. Your FOB price
>should be inclusive of 5% commission for Elmec. In case you are unable
>to supply the following, please let us know the name,address and fax nos
>of the supplier who can offer us the same
>
>
>With Best Regards,
>
>N.V.V.KRISHNA
>
>Elmec Associates,
>#256 / 7, 44th Cross, 5th Block,
>Jayanagar,
>Bangalore - 560 041
>
>Phone : +91-80-6658725 / 6636341 / 6711195
>Fax : +91-80-6658725 / 6712380
>E-Mail : [log in to unmask]
>
>
>Attachment Converted: X:\EZNET\EZNET\EUDORA\ITEM9.DOC
>
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=========================================================================
Date: Thu, 18 Jun 1998 12:11:52 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Sherry Warner <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Sherry Warner <[log in to unmask]>
Subject: Re: NASA Approved Liquid Solder Masks
X-To: Bob Carhart <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Bob,
This is the materials branch homepage for
NASA - Goddard Space Flight Center, that
may help you or can get you in touch with someone that can..
http://arioch.gsfc.nasa.gov/313/html/home.html
_______________________
Sherry Warner/Code 561
RMS Information Systems
NASA/Goddard Space Flight Center
Mail Stop 450.B
Greenbelt, MD 20771
TEL: 301-286-3940
FAX: 301-286-1740
Lab. Web Page: http://fab.gsfc.nasa.gov/
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=========================================================================
Date: Thu, 18 Jun 1998 12:38:40 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Tom Bresnan <[log in to unmask]>
Subject: FAB: solder over nickel
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit
All:
Is there a preferred nickel I should be trying to plate solder on top
of? We're struggling with plating tin lead on top of nickel and it's
subsequent reflow after soldermask. Anyone have any suggestions? We're
seeing dewetting and I'm wondering how many others out there are
trying to do this. We currently use a nickel sulfamate bath, if that
has any bearing... I'm not sure of activators and such, but if you
think it's important, I'll find them.
Thanks in advance all...
Regards
Tom Bresnan
[log in to unmask]
PS. Please respond direct to me as well as to the forum. I'm presently
disconnected from the service.
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=========================================================================
Date: Thu, 18 Jun 1998 13:26:39 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Zecal Engineering <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Zecal Engineering <[log in to unmask]>
Subject: Citric cleaning
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Anyone know of assembly problems after cleaning metals in citric acid?
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=========================================================================
Date: Thu, 18 Jun 1998 13:09:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Washing of small PCB
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hi Techies,
Typical small board applications in cleaning are not very different from
large boards, EXCEPT something needs to be done to keep those little guys
from flying around. Common solutions are stainless steel baskets (we make
them here) or even a short piece of conveyor belt to cover the boards. A
more costly, though "effortless" solution is a second conveyor belt retrofit
to sandwich the assembly betweeen, powered and synchronized (we do that here
too).
Hope that helps,
Ed
------------------------------
Date: Thu, 18 Jun 1998 16:59:22 +0300
From: "Eltek Ltd. - Process Engineering" <[log in to unmask]>
Subject: Washing of small PCB
Technetters,
After routing stage the PCBs are washed to remove dust , fingerprints etc .
Normally , this is done using washing machine fitted with hot water rinse ,
soft brushes , high pressure rinse , DI rinse and dryer . As long as the PCB
is bigger than , say , 7" by 4" , we have no problems . Probles are with
really small boards such as 2" by 3" or even less .
What kind of washing machines are used for such small boards ?
Edward Szpruch
Eltek Ltd - Israel
Tel 972 3 9395050
Fax 972 3 9309581
E-mail : [log in to unmask]
Ed Popielarski
QTA Machine
10 Mc Laren, Suite D
Irvine, Ca. USA 92618
Ph: (949)581-6601
Fx: (949)581-2448
E-Mail: [log in to unmask]
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=========================================================================
Date: Thu, 18 Jun 1998 14:33:19 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: SMT Reliability
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Hi Scott,
On cooling the CC is in overall compression, but there also is a bending
moment that could the CC layers farthest away from the PCB in tension. As the
solder creeps the overall compression is reduced, and on rewarming you get
tension in the CC. The surface copper layers have clearly have an impact on
the local expansion mismatch, but the global expansion ismatch is dominated by
the PCB material combination.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask]
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=========================================================================
Date: Thu, 18 Jun 1998 14:19:23 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Gagrani, Kishore" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Gagrani, Kishore" <[log in to unmask]>
Subject: Re: Washing of small PCB
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Make sure you take proper care of ESD while doing any customized
solution for washing (specially take care of component's sensitivity
for static charge) . I have had a very bitter experience on this.
Thanks
-----Original Message-----
From: [log in to unmask] [SMTP:[log in to unmask]]
Sent: Thursday, June 18, 1998 2:09 PM
To: [log in to unmask]
Subject: Re: [TN] Washing of small PCB
Hi Techies,
Typical small board applications in cleaning are not very different
from
large boards, EXCEPT something needs to be done to keep those little
guys
from flying around. Common solutions are stainless steel baskets (we
make
them here) or even a short piece of conveyor belt to cover the boards.
A
more costly, though "effortless" solution is a second conveyor belt
retrofit
to sandwich the assembly betweeen, powered and synchronized (we do
that here
too).
Hope that helps,
Ed
------------------------------
Date: Thu, 18 Jun 1998 16:59:22 +0300
From: "Eltek Ltd. - Process Engineering"
<[log in to unmask]>
Subject: Washing of small PCB
Technetters,
After routing stage the PCBs are washed to remove dust , fingerprints
etc .
Normally , this is done using washing machine fitted with hot water
rinse ,
soft brushes , high pressure rinse , DI rinse and dryer . As long as
the PCB
is bigger than , say , 7" by 4" , we have no problems . Probles are
with
really small boards such as 2" by 3" or even less .
What kind of washing machines are used for such small boards ?
Edward Szpruch
Eltek Ltd - Israel
Tel 972 3 9395050
Fax 972 3 9309581
E-mail : [log in to unmask]
Ed Popielarski
QTA Machine
10 Mc Laren, Suite D
Irvine, Ca. USA 92618
Ph: (949)581-6601
Fx: (949)581-2448
E-Mail: [log in to unmask]
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additional information.
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=========================================================================
Date: Thu, 18 Jun 1998 15:11:02 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Barry Ritchie <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Barry Ritchie <[log in to unmask]>
Subject: Re: Conformal Coating?
X-To: [log in to unmask], Larry Crane <[log in to unmask]>
X-cc: Jim Heaton <[log in to unmask]>,
Christy Marinelli <[log in to unmask]>,
Brian Rogove <[log in to unmask]>,
Lester Bennington <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Rick,
Since the size of spacing and component lead pitch are reduced by industry
needs, many new devices and designs cannot perform adequately in humid life
cycle environments without some form of protection to the conductors.
Many manufacturer's are being required to apply conformal coatings to
electronic assemblies to enhance reliability.
You actually have many conformal coating options.
Silicones are generally used for automotive type applications where the
circuit boards are going to see extreme temperature cycling environments.
They are soft elastomeric materials with limited abrasion resistance.
On the other hand, the organic family of conformal coatings encompass AR
(acrylic resin), ER (epoxy resin), and UR (urethane resin), materials
including the UV hybrids like AR/UR, and are "general purpose", tough, high
dielectric materials.
Many of these materials have been formulated without solvents so high VOC
issues and solvent dilution are no longer a factor in production. They also
coexist very well with various solder masks and soldering flux residues.
Loctite does not get involved with solvent based coating chemistries. All
my stuff is solvent free.
Curing option include UV with secondary ambient moisture for shadowed areas
and heat cures. The UV's are the most efficient for high volume short cycle
time applications such as 5293 silicone and 394 ARUR.
As far as equipment suppliers, you have 3 of the largest players home based
right here in the US.
1. Nordson Corporation, Amherst, OH (440) 988-9411, produce in-line
selective coating systems for UV and heat cure materials. The most recent
development is their "SwirlCoat" dispense head which allows the user three
different dispense patterns within the same dispense head / program. They
employ there own non-atomized dispense head technology. Nordson is the
leader in high volume production systems.
2. Precision Valve and Automation, Halfmoon, NY (518) 371-2684 is a
producer of a "very flexible" in-line selective platform which has multiple
heads for a variety of dispense applications for conformal coating. They
employ there own valve technology which is top of the line. They also
provide UV and heat cure tunnels at a fair cost.
3. Specialty Coating Systems, Indy, IN (317) 240-2073 produce an in-line
atomized selective spray platform as well as UV and heat cure tunnels.
They also produce non-selective reciprocating platforms and some dip
systems.
If you chose other than a selective process, you have to contend with
masking and demasking operations which are off line and labor intensive. A
decent "nothing fancy" selective robot and cure cell will run you no less
than $100K.
If you cannot justify a system, you can revert to a standard paint spray
booth and a turn table but this type of efficiency will depend on your
volume requirements.
I would also refer you to the Loctite home page at:
www.loctite.com
steps:
1. chose "United States",
2. then click "electronic products"
3. and then "conformal coatings".
There is a great deal of information including technical articles on
silicones and some on incorporating solvent free conformal coating
chemistries into today's production environments.
You can also refer to the NEPCON West proceeding for the past 6 years.
Several technical papers have been published on these topics.
I travel a lot, but you can also contact me directly if you wish.
Good Luck,
Barry Ritchie
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=========================================================================
Date: Thu, 18 Jun 1998 14:50:16 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Martin <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Martin <[log in to unmask]>
Subject: Conformal Coating
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Rick,
Interestingly enough, my company is researching the possibility of setting
up one of our vendors to do Conformal Coatings for us!
Many coating materials can be applied with same sprayers used in
auto shops. The minimum of equipment, spray booth, compressor, and hand
sprayer, will cost $3500 if you go this rout. Just check out a Grainger
catalog. Don't forget to add the cost of installation, local environmental
requirements (always ask before you buy), and training into your estimation.
In any case, you are still in fairly good shape money wise. This kind of
system is not very good for the 2-part coatings, but not many people are
requesting that anyway. By the way, it was a rep from a coating maufacture
who told me about this.
I don't know of an inexpensive way to dip coat.
On the other hand, if it is certain that your company is going for
the long run, you might move up from the economy car, to the Cadillac. Hague
makes a stand alone system that looks pretty impressive, but so is the
price. Starting in at about $13,000 with the bells, but without the whistles
it is quite an investment. I think the system was called the SB-2900.
You will have to anticipate the coatings you want to offer your
customers as the curing conditions is a definite factor. You might need UV
lamps or ovens for the initial cure.
Pitfalls, well we haven't tried it yet. One of our other vendors
does offer Conformal Coating and it is looking like we will shift production
over to them. There are other reasons for the move besides this one, but it
is a factor.
As a final thought, check out the archives for this forum. There is
a ton of usefull information there.
I realize some of this is obvious, but I am coming from the
perspective of a customer, not a supplier.
Martin
----------------Original Message---------------------------------------
Date: Wed, 17 Jun 1998 20:09:56 -0700
From: Rick Thompson <[log in to unmask]>
Subject: Conformal Coating?
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Hi Technetters,
A number of our customers are starting to request more conformal coating of
the PCBA's we assemble for them, and I have been given the task of
evaluating various materials and equipment for doing this in-house rather
than outsourcing it. Specifically, I looking for any help or pointers I can
get on sources of equipment, specific types (SR, etc) I should consider,
environmental and health concerns and regulations, etc. Spraying appears to
be our best application method at this point. Any comments on building a
spray booth vs. purchasing a unit from one of the vendors supplying these
would also be appreciated.
Thanks in advance for any tips you might provide.
Regards,
Rick Thompson
Ventura Electronics Assembly
-------------------------------END------------------------------------
-------------------
Martin Spizman
MEYER SOUND LABS
(510) 486-1166
[log in to unmask]
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=========================================================================
Date: Thu, 18 Jun 1998 15:21:02 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bryan Bloom <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bryan Bloom <[log in to unmask]>
Subject: Wire Bonding
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
We are currently performing wire bonding on a substrate for a particular
customer. Generally this is gold wedge bonding at .7 mil find pitch.
We want to expand that operation and do small volume, high mix of custom
IC's (monolithic and some hybrid) built to an engineer's specs. These
would be in the 1 - 200 volume for prototype or quick turnaround. We also
want to know what other niches are open to us with our quality wire bonding
capability and how to market them and to whom (chip on board, etc..)
Any suggestions from those who have had success or who see a need that has
not been met would be greatly appreciated.
Thank you in advance for any help or thoughts!
Bryan Bloom
G&M Assembly
[log in to unmask]
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=========================================================================
Date: Thu, 18 Jun 1998 15:22:30 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bryan Bloom <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bryan Bloom <[log in to unmask]>
Subject: Wire Bonding
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
We are currently performing wire bonding on a substrate for a particular
customer. Generally this is gold wedge bonding at .7 mil find pitch.
We want to expand that operation and do small volume, high mix of custom
IC's (monolithic and some hybrid) built to an engineer's specs. These
would be in the 1 - 200 volume for prototype or quick turnaround. We also
want to know what other niches are open to us with our quality wire bonding
capability and how to market them and to whom (chip on board, etc..)
Any suggestions from those who have had success or who see a need that has
not been met would be greatly appreciated.
Thank you in advance for any help or thoughts!
Bryan Bloom
G&M Assembly
[log in to unmask]
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=========================================================================
Date: Thu, 18 Jun 1998 20:29:28 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
John Waite <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: John Waite <[log in to unmask]>
Subject: Re: Washing of small PCB
X-To: "Eltek Ltd. - Process Engineering" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=big5
Content-Transfer-Encoding: 7bit
Hi Ed,
Small parts cleaning has been a challenge for most of us. I'll offer a couple of ideas that
has worked for me in the past
1) Wash the parts in a 75/25 alcohol/water mix. Use a plastic strainer and pail. Afterwards,
place on a large mesh screen (metal) and place in an oven at 180 deg. F. this method is
extremely labor intensive. Do not put in an oven that is over 212 deg. F or used for general
baking due to the potential of oxidation.
2) generate a "frame" using nylon type screen mesh (large mesh) and .059" laminate. Sandwich the
boards between the frame, secure, and process through your cleaning unit. Check the pieces at
the exit conveyor for possible overlapping. If overlapped, place in the oven as in #1)
3) THIS IS MY PREFERRED METHOD: Try to get your customer(s) to palletize by "web" routing or
scoring and ship in a pallet form.
Good Luck... JOHN WAITE
Eltek Ltd. - Process Engineering wrote:
> Technetters,
> After routing stage the PCBs are washed to remove dust , fingerprints etc .
> Normally , this is done using washing machine fitted with hot water rinse ,
> soft brushes , high pressure rinse , DI rinse and dryer . As long as the PCB
> is bigger than , say , 7" by 4" , we have no problems . Probles are with
> really small boards such as 2" by 3" or even less .
> What kind of washing machines are used for such small boards ?
> Edward Szpruch
> Eltek Ltd - Israel
> Tel 972 3 9395050
> Fax 972 3 9309581
> E-mail : [log in to unmask]
>
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=========================================================================
Date: Thu, 18 Jun 1998 20:31:08 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Don Vischulis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: FAB: solder over nickel
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Tom:
I've never tried to plate solder over nickel, but nickel does passivate rapidly when exposed to
air. Back when hand lines were used for plating nickel/gold edge connectors, it was well known
that the nickel plate had to be activated by a dip into 10% to 15% sulfuric acid. In your case,
I'd recommend attempting to activate the nickel with an acid compatible with your plating bath
(usually fluorboric or sulfonic depending on your bath). A 2 to 3 minute immersion in the acid
followed by a quick rinse and into the solder bath. Given that sulfuric is normally supplied at
98% to 96% and the others are considerably weaker, you might have to experiment with the
concentration.
As I recall, the reason for acid activation between nickel and gold plating was removal of the
organics used in the nickel bath as well as the prevention of oxidation. If the activation step
was inadequate, the gold would plate the tabs, but the end product would fail a tape test.
Don Vischulis
[log in to unmask]
Tom Bresnan wrote:
> All:
>
> Is there a preferred nickel I should be trying to plate solder on top
> of? We're struggling with plating tin lead on top of nickel and it's
> subsequent reflow after soldermask. Anyone have any suggestions? We're
> seeing dewetting and I'm wondering how many others out there are
> trying to do this. We currently use a nickel sulfamate bath, if that
> has any bearing... I'm not sure of activators and such, but if you
> think it's important, I'll find them.
>
> Thanks in advance all...
>
> Regards
>
> Tom Bresnan
> [log in to unmask]
>
> PS. Please respond direct to me as well as to the forum. I'm presently
> disconnected from the service.
snip--------------------------
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=========================================================================
Date: Fri, 19 Jun 1998 09:08:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Steven H Axdal <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Steven H Axdal <[log in to unmask]>
Subject: Re: Nickel over Copper
X-To: Return requested <[log in to unmask]>
MIME-Version: 1.0
We plate tin-lead over nickel regularly, either immediately or after
another layer of resist. We're running a Watts bath (nickel chloride,
nickel sulfate, boric acid) rather than sulfamate. The activation of the
nickel surface before the tin-lead plating is critical. If the nickel
plate has been dried, there's an initial PC-455 bath to clean the
surface, then the steps are water rinse, 40% hydrochloric etch, rinse,
10% fluoboric etch, rinse, tin-lead plating. Once started from nickel to
tin-lead, the timings are tightly controlled, certainly no long dwells in
the rinses or etches.
Steve Axdal
[log in to unmask]
Tom Bresnan wrote:
> All:
>
> Is there a preferred nickel I should be trying to plate solder on top
> of? We're struggling with plating tin lead on top of nickel and it's
> subsequent reflow after soldermask. Anyone have any suggestions? We're
> seeing dewetting and I'm wondering how many others out there are
> trying to do this. We currently use a nickel sulfamate bath, if that
> has any bearing... I'm not sure of activators and such, but if you
> think it's important, I'll find them.
>
> Thanks in advance all...
>
> Regards
>
> Tom Bresnan
> [log in to unmask]
>
> PS. Please respond direct to me as well as to the forum. I'm presently
> disconnected from the service.
snip--------------------------
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=========================================================================
Date: Fri, 19 Jun 1998 10:22:00 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rich Mallicote <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rich Mallicote <[log in to unmask]>
Subject: Reference Designator Problem
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/alternative; boundary="----
=_NextPart_001_01BD9B8F.30435AF0"
This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.
------ =_NextPart_001_01BD9B8F.30435AF0
Content-Type: text/plain
My buiness unit has a design problem that requires a unique
solution. When
possible, we build multiple assemblies from a common PCB. There
are unique
design circumstances (particularly broadband filters) where a
component in
one assembly might be a resistor and in another assembly might be
an
inductor or a capacitor -- using the same circuit board and located
in the
same schematic position in the circuit. We want to find a method
where we
can specify one component with one reference designator, that will
allow
multiple component types to be placed (R, L, or C). The only
standard I
can find is a reference designator of 'E' which can be used for a
"miscellaneous electrical part".
Is there some precedent or solution that any of you have found that
allow
multiple types of components to be placed in the same electrical
and
physical location in a circuit & board?
Please copy me on your reply at [log in to unmask]
Thank you. I would appreciate a speedy reply.
------ =_NextPart_001_01BD9B8F.30435AF0
Content-Type: text/html
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">
<HTML>
<HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=us-ascii">
<META NAME="Generator" CONTENT="MS Exchange Server version 5.5.1960.3">
<TITLE>Reference Designator Problem</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=2> My buiness unit has a design problem that requires a unique solution. When </FONT>
<BR><FONT SIZE=2> possible, we build multiple assemblies from a common PCB. There are unique </FONT>
<BR><FONT SIZE=2> design circumstances (particularly broadband filters) where a component in </FONT>
<BR><FONT SIZE=2> one assembly might be a resistor and in another assembly might be an </FONT>
<BR><FONT SIZE=2> inductor or a capacitor -- using the same circuit board and located in the </FONT>
<BR><FONT SIZE=2> same schematic position in the circuit. We want to find a method where we </FONT>
<BR><FONT SIZE=2> can specify one component with one reference designator, that will allow </FONT>
<BR><FONT SIZE=2> multiple component types to be placed (R, L, or C). The only standard I </FONT>
<BR><FONT SIZE=2> can find is a reference designator of 'E' which can be used for a </FONT>
<BR><FONT SIZE=2> "miscellaneous electrical part".</FONT>
<BR><FONT SIZE=2> </FONT>
<BR><FONT SIZE=2> Is there some precedent or solution that any of you have found that allow </FONT>
<BR><FONT SIZE=2> multiple types of components to be placed in the same electrical and </FONT>
<BR><FONT SIZE=2> physical location in a circuit & board?</FONT>
<BR><FONT SIZE=2> </FONT>
<BR><FONT SIZE=2> Please copy me on your reply at [log in to unmask]</FONT>
<BR><FONT SIZE=2> Thank you. I would appreciate a speedy reply.</FONT>
</P>
</BODY>
</HTML>
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=========================================================================
Date: Fri, 19 Jun 1998 09:41:10 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Washing of small PCB vs. ESD
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hi all,
Good point there, with the ESD. We have made clever polypropylene baskets
for one application and ended up getting "dinged" for the plastic. Irony of
the whole thing, though, is most (almost all) aqueous cleaners are
constructed of polypropylene!!! Even worse are the neoprene rubber curtains
touching the assy between each stage (however we can provide ESD dissipative
curtains). While employed at Unisys, we ran a static meter through the
cleaner and found that although the material is a high risk, the relative
humidity inside was enough to keep charges at bay. What we *DID* learn is
the blowers in the dry section created a lot of static but simply grounding
the stainless steel air knives seemed to chase that one away as well. The
outside of these cleaners are "hot" and resting an assembly on the polypro
surface tends to be a common practice. Those "dissipative cleaning
solutions" and air ionizers resolved that issue.
Just wanted to throw in my 2 cents!
Ed
Date: Thu, 18 Jun 1998 14:19:23 -0400
From: "Gagrani, Kishore" <[log in to unmask]>
Subject: Re: Washing of small PCB
Make sure you take proper care of ESD while doing any customized
solution for washing (specially take care of component's sensitivity
for static charge) . I have had a very bitter experience on this.
Thanks
Ed Popielarski
QTA Machine
10 Mc Laren, Suite D
Irvine, Ca. USA 92618
Ph: (949)581-6601
Fx: (949)581-2448
E-Mail: [log in to unmask]
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=========================================================================
Date: Fri, 19 Jun 1998 11:00:36 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Christine Lizzul Rinne <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Christine Lizzul Rinne <[log in to unmask]>
Subject: Re: FAB: solder over nickel
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Hello Tom,
I have plated Sn/Pb over nickel. I have also used a nickel sulfamate bath
operating at around 54C. I did not see dewetting after reflow.
The Sn/Pb plating was done immediately after the nickel plating. Following
the Ni electrodeposition, the surface was rinsed, dipped into a dilute
nitric acid bath, and then rinsed again. The Sn/Pb plating was initiated
before the surface was allowed to dry. I was using a methane sulfonic acid
based bath for the Sn/Pb plating.
Best Regards,
Christine
At 12:38 PM 6/18/98 -0400, you wrote:
> All:
>
> Is there a preferred nickel I should be trying to plate solder on top
> of? We're struggling with plating tin lead on top of nickel and it's
> subsequent reflow after soldermask. Anyone have any suggestions? We're
> seeing dewetting and I'm wondering how many others out there are
> trying to do this. We currently use a nickel sulfamate bath, if that
> has any bearing... I'm not sure of activators and such, but if you
> think it's important, I'll find them.
>
> Thanks in advance all...
>
> Regards
>
> Tom Bresnan
> [log in to unmask]
>
> PS. Please respond direct to me as well as to the forum. I'm presently
> disconnected from the service.
>
********************************************************
Christine Lizzul Rinne
Graduate Student
Dept. Of Materials Science and Engineering
North Carolina State University
Box 7907
Raleigh, NC 27695-7907
(919) 248-1107 TEL
(919) 248-1455 FAX
NCSU
http://vims.ncsu.edu/matsci/
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=========================================================================
Date: Fri, 19 Jun 1998 09:02:13 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Fulabhai Patel <[log in to unmask]>
Organization: home
Subject: Re: FAB: solder over nickel
X-To: Don Vischulis <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Don Vischulis wrote:
>
> Tom:
>
> I've never tried to plate solder over nickel, but nickel does passivate rapidly when exposed to
> air. Back when hand lines were used for plating nickel/gold edge connectors, it was well known
> that the nickel plate had to be activated by a dip into 10% to 15% sulfuric acid. In your case,
> I'd recommend attempting to activate the nickel with an acid compatible with your plating bath
> (usually fluorboric or sulfonic depending on your bath). A 2 to 3 minute immersion in the acid
> followed by a quick rinse and into the solder bath. Given that sulfuric is normally supplied at
> 98% to 96% and the others are considerably weaker, you might have to experiment with the
> concentration.
>
> As I recall, the reason for acid activation between nickel and gold plating was removal of the
> organics used in the nickel bath as well as the prevention of oxidation. If the activation step
> was inadequate, the gold would plate the tabs, but the end product would fail a tape test.
>
> Don Vischulis
> [log in to unmask]
>
> Tom Bresnan wrote:
>
> > All:
> >
> > Is there a preferred nickel I should be trying to plate solder on top
> > of? We're struggling with plating tin lead on top of nickel and it's
> > subsequent reflow after soldermask. Anyone have any suggestions? We're
> > seeing dewetting and I'm wondering how many others out there are
> > trying to do this. We currently use a nickel sulfamate bath, if that
> > has any bearing... I'm not sure of activators and such, but if you
> > think it's important, I'll find them.
> >
> > Thanks in advance all...
> >
> > Regards
> >
> > Tom Bresnan
> > [log in to unmask]
> >
> > PS. Please respond direct to me as well as to the forum. I'm presently
> > disconnected from the service.
>
> snip--------------------------
>
> ################################################################
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Solder plating over nickel.....
This is very unusual and tin component of solder will not diffuse
to Nickel to create metallic interface bond and non-wetting will
happened while reflow.
Instad of Nickel , use TIN-NICKEL plating and then solder plating
and reflow. Problem will be minimised.There must be good judgement
for solder platig and reflow technics. Wish you best of luck...
Fulabhai Patel
[log in to unmask]
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=========================================================================
Date: Fri, 19 Jun 1998 10:12:11 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bill Davis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Davis <[log in to unmask]>
Subject: Re: Wire Bonding
X-To: Bryan Bloom <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
If you can do chip-on-flex, try approaching flex assmblers (Smartflex,
Tustin, CA); also Cidco (Morgan Hill, CA) used to require a great deal
of chip on flex assembly for their call ID boxes...
> -----Original Message-----
> From: Bryan Bloom [SMTP:[log in to unmask]]
> Sent: Thursday, June 18, 1998 3:23 PM
> To: [log in to unmask]
> Subject: [TN] Wire Bonding
>
> We are currently performing wire bonding on a substrate for a
> particular
> customer. Generally this is gold wedge bonding at .7 mil find pitch.
>
> We want to expand that operation and do small volume, high mix of
> custom
> IC's (monolithic and some hybrid) built to an engineer's specs. These
> would be in the 1 - 200 volume for prototype or quick turnaround. We
> also
> want to know what other niches are open to us with our quality wire
> bonding
> capability and how to market them and to whom (chip on board, etc..)
>
> Any suggestions from those who have had success or who see a need that
> has
> not been met would be greatly appreciated.
>
> Thank you in advance for any help or thoughts!
>
> Bryan Bloom
> G&M Assembly
> [log in to unmask]
>
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>
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=========================================================================
Date: Fri, 19 Jun 1998 18:43:28 GMT
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Peter Swanson <[log in to unmask]>
Subject: Re: Conformal Coating?
In message <[log in to unmask]> [log in to unmask] writes:
<a number of good points snipped>
> Avoid UV cure. Shadow cure mechanisms are not very robust. It is also very
> sensitive to flux residues.
A sweeping generalisation, and not necessarily accurate. Light curing conformal
coatings work very well in the appropriate circumstances (including pcb's which
have not been cleaned). The geometry of the assembly and application method are
two of the factors which determine whether a light curing coating will work for
you. Testing with the flux residue(s) is advised, as it is for any coating.
Peter
--
:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
Peter Swanson Oxfordshire, England
INTERTRONICS
[log in to unmask] http://www.cygnetuk.demon.co.uk
Suppliers of materials and consumables to the electronics & related industries
:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
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=========================================================================
Date: Fri, 19 Jun 1998 14:14:12 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Modular Components National, Inc." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Modular Components National, Inc." <[log in to unmask]>
Subject: Gold to nickel adhesion
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Thank you for the responses we've received to our question on ultrasonic
cleaning. However, the question was worded poorly and also did not cover
the topics we wanted it to. So we're going to give it a second go.
Lately, we have experienced some problems with gold to nickel adhesion.
We are using nickel/gold plating as an etch resist for an ammoniacal
etcher. The parts have a dry film image placed on them prior to plating.
Immediately following nickel/gold plating, the parts are tape tested. They
are then sent to have the dry film removed and then etched. Following the
etching process they are again tape tested. Occasionally, the first tape
test will produce gold peeling, and the job gets reworked then. Most of
the time, however, the gold holds up through the first tape test, and most
adhesion problems that we have don't show up until after etching. It also
seems to happen more frequently on TMM material then on others.
Any suggestions you may have would be a great help to us.
Thank you
Ryan
Modular Components National, Inc.
2302 Industry Court
Forest Hill, MD 2150
PH (410) 879-6553
Fax (410) 838-7629
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=========================================================================
Date: Fri, 19 Jun 1998 11:31:27 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Arturo J. Aguayo" <[log in to unmask]>
Subject: Re: Board Material for a 500mhz to 2ghz Application.
X-To: Michael Thiel <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Michael,
For your requirements of performance from 500 MHz to 2 GHz, I would
recommend the RO4000 materials from Rogers (thermoset resin/woven
glass). This is a low cost high frequency material that is processed
like FR4 (keeps fab costs sinmilar to FR4). PTFE based materials (RO3203
material from Rogers as well as various from Taconic from a previous
posting) will also provide the performance you need but processing costs
may be greater (depending on complexity of construction, MLB for
example). Other resins have provided better performance than FR4 like
PPO (GE) and PPE (Nelco, Isola) but since these are not true high
frequency materials their ability to perform to your electrical
specifications might not be met. Hope this real brief summary of
available materials helps, let me know if you have any additional
questions.
Art Aguayo, Technical Support Manager
[log in to unmask]
602 961-1382
www.rogers-corp.com/mwu/
Michael Thiel wrote:
>
> I would like to know the options available, as far as board
> material/conductor and its
> characteristics, for an application involving frequencies ranging from
> 500mhz to 2ghz (with the upper
> limit (2ghz) being more of a concern). Intentions are to emphasize
> microstrip matching at higher
> frequencies (2ghz) and lumped component matching at lower frequencies
> (500mhz). Basically, what
> works the best and is cheap.
>
> Thank you for your cooperation.
>
> ################################################################
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=========================================================================
Date: Fri, 19 Jun 1998 15:37:01 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lenny Kurup <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lenny Kurup <[log in to unmask]>
Subject: Re: Gold to nickel adhesion
X-To: "Modular Components National, Inc." <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: TEXT/PLAIN; charset=US-ASCII
The ammoniacal etchant must be controlled very closely during the
etching cycle, remember most ammoniacal etchants carry chlorides, what is
happening is attack of the nickel under the gold
via the side walls, leading to a weakened gold layer, resulting in peeling.
Good Luck
Lenny Kurup
EMX Enterprises Ltd
Markham, Ontario
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Date: Fri, 19 Jun 1998 15:50:33 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Stammely, Tim" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Stammely, Tim" <[log in to unmask]>
Subject: Immersion white Tin PCB surface finish
MIME-Version: 1.0
Content-Type: text/plain
Hi TechNet,
Has anyone out there had any experience with assembling boards with
Immersion White Tin(trademark name "Omikron") as the board finish. If so,
have you encountered any problems (i.e., shelf life, rework, wetting,
cleaning, etc.). Many thanks in advance.
Tim Stammely
Process Engineer
MSI
Manassas, VA
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Date: Fri, 19 Jun 1998 12:54:43 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Vaughan, Ralph H" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Vaughan, Ralph H" <[log in to unmask]>
Subject: Plastic parts
MIME-Version: 1.0
Content-Type: text/plain
Dear Technet,
Fact or Fiction?
Being a relic of military electronics assembly, I have always dealt with
ceramic-encased microcircuits. As we're starting to look at plastic
encapsulated microcircuits (PEMs), some new assembly considerations
arise. One that we (technet) have covered lately is the moisture
absorption, which I can understand. Another concern that my folks are
telling me is that these PEMs are subject to corrosion when soldered
with rosin-based fluxes, even the RMA types, regardless of cleaning
processes. Other no-clean or water soluble fluxes are ok. I am having
trouble with this one. Can anyone support or deny this notion?
Thanks
Ralph
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Date: Fri, 19 Jun 1998 15:17:10 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jack Crawford <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jack Crawford <[log in to unmask]>
Subject: Re: Immersion white Tin PCB surface finish
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain
Tim, I urge you to search the TechNet Archives at http://jefry.ipc.org/archives/ and
select <TechNet> then <search the archives> (searches every msg from day 1)
If you search the words <white tin> you will get at least 39 matches and I saw a half
dozen that are directly related to your query. Jack
IPC/SMTA Electronics Assembly Expo
Technical Committee Meetings, Conference, Exhibits
Providence RI October 24-29
More info at http://www.ipc.org
Jack Crawford, IPC Project Manager - Assembly
2215 Sanders Road, Northbrook IL 60062-6135
[log in to unmask] 847-509-9700 x 393 fax 847-509-9798
>>> "Stammely, Tim" <[log in to unmask]> 06/19/98 02:50PM >>>
Hi TechNet,
Has anyone out there had any experience with assembling boards with
Immersion White Tin(trademark name "Omikron") as the board finish. If so,
have you encountered any problems (i.e., shelf life, rework, wetting,
cleaning, etc.). Many thanks in advance.
Tim Stammely
Process Engineer
MSI
Manassas, VA
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=========================================================================
Date: Fri, 19 Jun 1998 23:19:15 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Conformal Coating
X-cc: Martin <[log in to unmask]>
Hi TechNetters,
I sincerely hope you have had a better week than me! However, in replying to
Rick's original question and Martins response, firstly I have replied to
Rick OFFLINE, heaven forbid that I should be accused of
spamming......again.......
However, in respect to Martin's reply:
Auto-Shop spraying for conformal coating?
Please consider that: A true conformal coating should be applied to a
thickness of 0.001 to 0.005 inches dependant upon the material selected.
This should be the thickness applied to a flat, unencumbered substrate.
The profile of a circuit assembly resembles Manhattan in miniature. Have you
felt the influences of high rise buildings on airflow?? Try Chicago then!!
In order to get the coating applied correctly, you need low pressure. Less
than 10 psi. You then need to get the coating UNDER (as far as possible) the
components and to make sure that drips, runs, blisters and other coating
deformities (look at IPC-CC-830) are minimised.
Will your "Auto-booth" spray be wet or dry back? Is the exhaust at the rear
or under the assembly? Will you spray vertical or horizontal? What spray
pressure and what coating blend will you use? What sort of coating?
Most folks can easily spray coat a flat surface, now try 3D!
I do not wish to give away all our secrets but, as with most things, there
are tricks to every trade.
If you are handling 2 part materials, for goodness sake do not (no, on
second thoughts PLEASE DO) dip coat 2 part materials. The wastage will help
ease me into early retirement.....
Spraying is the only practical and cost effective method for 2 part
materials.
Dipping inexpensively? Well, provided your assembly has been designed for
coating (all non-coat areas on one side of the board) then I can dip coat
under as well as over components, up to 500 assemblies per hour at a far
lower cost than any other method. Of course curing needs to be considered.
UV curing? I have posted other replies on this topic but: if you are coating
2 dimensional objects, this is a great technology. If it is 3 dimensional,
Einstein had it right, more or less, "Boy, is it difficult to bend light!"
However, and without wishing to be flippant, the issue with UV materials is
pot life and stability to ensure shadow cure. "Cure under the device? No
problem but pot life will be but a few hours! Otherwise, curing will be
generally around 48 to 72 hours AFTER the UV "CURE" part.
Fibre-Optics, Track-side coating or other 2 dimensional objects - UV is
great.
However, also remember that the time it takes to apply the coating really
does not change. So, the speed of the conveyor is dictated by the dipping
time NOT the curing time and don't put the curing zone anywhere near the dip
tank or you will have a wonderful, if expensive, paperweight!
Regards, Graham Naisbitt
__________________________________________________________________________
[log in to unmask]
Concoat Ltd
Alasan House, Albany Park
Camberley GU15 2PL UK http://www.concoat.co.uk
-----Original Message-----
From: Martin <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: 18 June 1998 23:04
Subject: [TN] Conformal Coating
>Rick,
>
>Interestingly enough, my company is researching the possibility of setting
>up one of our vendors to do Conformal Coatings for us!
> Many coating materials can be applied with same sprayers used in
>auto shops. The minimum of equipment, spray booth, compressor, and hand
>sprayer, will cost $3500 if you go this rout. Just check out a Grainger
>catalog. Don't forget to add the cost of installation, local environmental
>requirements (always ask before you buy), and training into your
estimation.
>In any case, you are still in fairly good shape money wise. This kind of
>system is not very good for the 2-part coatings, but not many people are
>requesting that anyway. By the way, it was a rep from a coating maufacture
>who told me about this.
> I don't know of an inexpensive way to dip coat.
> On the other hand, if it is certain that your company is going for
>the long run, you might move up from the economy car, to the Cadillac.
Hague
>makes a stand alone system that looks pretty impressive, but so is the
>price. Starting in at about $13,000 with the bells, but without the
whistles
>it is quite an investment. I think the system was called the SB-2900.
> You will have to anticipate the coatings you want to offer your
>customers as the curing conditions is a definite factor. You might need UV
>lamps or ovens for the initial cure.
> Pitfalls, well we haven't tried it yet. One of our other vendors
>does offer Conformal Coating and it is looking like we will shift
production
>over to them. There are other reasons for the move besides this one, but it
>is a factor.
> As a final thought, check out the archives for this forum. There is
>a ton of usefull information there.
> I realize some of this is obvious, but I am coming from the
>perspective of a customer, not a supplier.
>
>
> Martin
>
>----------------Original Message---------------------------------------
>Date: Wed, 17 Jun 1998 20:09:56 -0700
>From: Rick Thompson <[log in to unmask]>
>Subject: Conformal Coating?
>MIME-Version: 1.0
>Content-Type: text/plain; charset="iso-8859-1"
>Content-Transfer-Encoding: 7bit
>
>Hi Technetters,
>
>A number of our customers are starting to request more conformal coating of
>the PCBA's we assemble for them, and I have been given the task of
>evaluating various materials and equipment for doing this in-house rather
>than outsourcing it. Specifically, I looking for any help or pointers I
can
>get on sources of equipment, specific types (SR, etc) I should consider,
>environmental and health concerns and regulations, etc. Spraying appears
to
>be our best application method at this point. Any comments on building a
>spray booth vs. purchasing a unit from one of the vendors supplying these
>would also be appreciated.
>
>Thanks in advance for any tips you might provide.
>
>Regards,
>
>Rick Thompson
>Ventura Electronics Assembly
>-------------------------------END------------------------------------
>-------------------
>Martin Spizman
> MEYER SOUND LABS
> (510) 486-1166
> [log in to unmask]
>
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=========================================================================
Date: Sat, 20 Jun 1998 12:09:52 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Charles Barker <[log in to unmask]>
Subject: Re: Washing of small PCB
X-To: "Eltek Ltd. - Process Engineering" <[log in to unmask]>
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Ed,
We use a powerful in-line claener on our assembled boards. We had stainless
steel wire mesh baskets made in different thicknesses to accomodate our
assembled boards.
Charlie B.
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to "Eltek Ltd. - Process Engineering" <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Charles Barker/US/I-O INC)
Subject: [TN] Washing of small PCB
Technetters,
After routing stage the PCBs are washed to remove dust , fingerprints etc .
Normally , this is done using washing machine fitted with hot water rinse ,
soft brushes , high pressure rinse , DI rinse and dryer . As long as the
PCB
is bigger than , say , 7" by 4" , we have no problems . Probles are with
really small boards such as 2" by 3" or even less .
What kind of washing machines are used for such small boards ?
Edward Szpruch
Eltek Ltd - Israel
Tel 972 3 9395050
Fax 972 3 9309581
E-mail : [log in to unmask]
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=========================================================================
Date: Sat, 20 Jun 1998 15:11:05 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jim Campo <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jim Campo <[log in to unmask]>
Subject: subscirbe
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Would like to subcribe.
Thanks
Jim Campo
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Date: Sun, 21 Jun 1998 17:56:57 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: drying
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
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HYGREX tm Spehr Industries manufactures the HYGREX tm drying system in Bolton
Ontario Canada .The HYGREX operates with super dry air and removes the moistre
from food, water washed components ,paint and sludges without heat.for more
information contact Mrs> Honey Felske at 905 857 3331 or E-Mail
[log in to unmask]
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=========================================================================
Date: Mon, 22 Jun 1998 13:32:43 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ricky Javier <rjavier@[192.1.1.215]>
Sender: TechNet <[log in to unmask]>
Comments: Authenticated sender is <rjavier@[192.1.1.215]>
From: Ricky Javier <rjavier@[192.1.1.215]>
Subject: die shear specification
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
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Hello everybody,
We are processing chip-on-board devices and want to conduct die shear
sampling test before wirebond , The specs should conform with the
Mil.Std-883 D but unfortunately I don't have the hardcopy of it
for my reference . Actually we already placed an order for this one
but according to our purchaser Mil.Std.-883D is out of the market.
Could anyone can help us on how we can get a copy of it so that we
can follow / implement the specs in our process once we required
by our customer . I understand that for every die size there should
have a corresponding die shear limit and that is what we are missing
right now . I want to give you some die sizes : 68 x 74 ,151x137
,235x173 mils,
Your help is highly appreciated,Thank you very much.
Regards
ricky
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Date: Mon, 22 Jun 1998 15:52:36 +0900
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"M. C. Chu" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "M. C. Chu" <[log in to unmask]>
Subject: Re: Immersion white Tin PCB surface finish
X-To: "Stammely, Tim" <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Young:
I think the technology will dominate the market sooner or later.
Is there still any chance for us to sell it?
Regards,
/MCCAt 03:50 =BF=C0=C8=C4 98-06-19 -0400, you wrote:
>Hi TechNet,
>
>Has anyone out there had any experience with assembling boards with
>Immersion White Tin(trademark name "Omikron") as the board finish. If so=
,
>have you encountered any problems (i.e., shelf life, rework, wetting,
>cleaning, etc.). Many thanks in advance.
>
>Tim Stammely
>Process Engineer
>MSI
>Manassas, VA
>
>################################################################
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l
information.
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>################################################################
>
>
>
CSS Asia Co., Ltd.=20
Tel: 82-2-523-8810
Fax: 82-2-523-1483
E-Mail: [log in to unmask]
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Date: Mon, 22 Jun 1998 12:28:03 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jan Thuesen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jan Thuesen <[log in to unmask]>
Subject: FAB: Horizontal HASL
Mime-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Dear Technetters,
is there any other suppliers of horizontal HASL equipment than CEMCO and =
Teledyne-Halco?
We are in investigations of buying a horizontal HASL-unit.=20
I think that the capability and capacity of the Teledyne HSL-175 will =
fulfill our needs.
But due to our internal politics we have to have at least 3 suppliers to =
choose among.
I have already got Teledyne HSL-175, HSL-375 and CEMCO=B4s Alchemy.
If you have any recommendations at all please send a mail.
With best regards=20
CHEMITALIC A/S
Jan Thuesen
E-mail: [log in to unmask]
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Date: Mon, 22 Jun 1998 07:00:02 -0400
Reply-To: Sid Tryzbiak <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Sid Tryzbiak <[log in to unmask]>
Subject: Re: Overplated blind via's
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
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Hi Mark,
We have been building this type of blind via board for about 12 years and it
accounts for a substantial part of our board volume. All of the major OEMs
use this technology and if you would like to know more, visit our web page
at www.microvia.com or call me direct at 407-699-5000.
Thanks,
Sid Tryzbiak
Microvia, Inc.
-----Original Message-----
From: [log in to unmask] <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Tuesday, June 16, 1998 4:36 PM
Subject: [TN] Overplated blind via's
Hello Technet,
Our company is busy designing some printed circuit boards with
"overplated blind via's" (I mean blind via's, made in a sequential
plating process, where the via is filled with epoxy, after which it is
covered with copper and a solderable plating).
All our vendors claim they can build such boards, but as far as I
known they do not use this technology very often, and I don't want to
be their "guinea pig".
The question :
What kind of questions should I ask our bare board vendors in order to
check wether they are capable of building these boards with good
relaibility in a reproducible way ? What are the potential problems
that the board vendors should be aware of, and should have solved ?
Any ideas ?
Mark Roach
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=========================================================================
Date: Mon, 22 Jun 1998 08:19:59 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
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From: [log in to unmask]
Subject: Atlanta Chapter Designers Council Meeting
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This Month's Meeting
The chapter is planning to have its next meeting on Wednesday, June 24 at the
Norcross Siemens facility. There is tremendous momentum building with the
Designers Council. Our featured speaker, Gary Ferrari, Executive Director from
the IPC will be presenting an Accreditation Program update including
developments right here in good ol' Atlanta metro area (Gwinnett County). In
addition, Gary will discuss the changes to IPC-D-2221, IPC-D-2222 Design
specifications and, IPC Designers Council changes that directly affect
everyone's membership privileges and the accreditation program both nationwide
and around the world. The Designers Council PWB Designer Certification Program
is reaching critical mass and could be the single most important outcome from
the Council. You don't want to miss this meeting.
This will be the last 'free' meeting. At our August meeting non- members
will be required to pay and entrance fee. Please R.S.V.P by Friday, June 23 if
you plan to attend. Directions to Siemens follows on page 2 (attachment).
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--part0_898518000_boundary--
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=========================================================================
Date: Mon, 22 Jun 1998 15:50:12 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Love
MIME-Version: 1.0
Content-Type: multipart/alternative; boundary=openmail-part-01d4efb6-00000002
--openmail-part-01d4efb6-00000002
Content-Type: text/plain; charset=ISO-8859-1; name="Love"
Content-Disposition: inline; filename="Love"
Content-Transfer-Encoding: quoted-printable
Not what you thought, sorry. I'm searching for someone who knows
the e-mail adress to Fujitsu Computer Packaging Technologies,
San Jos=E9, CA. Wanted person is David Love. Alternatively Larry
Moresco, Conny Wong or Patricia Boucher. / Ingemar
--openmail-part-01d4efb6-00000002
Content-Type: application/rtf; name="Love"
Content-Disposition: attachment; filename="Love"
Content-Transfer-Encoding: base64
e1xydGYxXGFuc2lcZGVmZjB7XGZvbnR0Ymx7XGYwXGZyb21hbiBUbXMgUm1uO317XGYxXGZy
b21hbiBDb3VyaWVyIE5ldzt9fXtcY29sb3J0YmxccmVkMFxncmVlbjBcYmx1ZTA7XHJlZDBc
Z3JlZW4wXGJsdWUyNTU7XHJlZDBcZ3JlZW4yNTVcYmx1ZTI1NTtccmVkMFxncmVlbjI1NVxi
bHVlMDtccmVkMjU1XGdyZWVuMFxibHVlMjU1O1xyZWQyNTVcZ3JlZW4wXGJsdWUwO1xyZWQy
NTVcZ3JlZW4yNTVcYmx1ZTA7XHJlZDI1NVxncmVlbjI1NVxibHVlMjU1O1xyZWQwXGdyZWVu
MFxibHVlMTI3O1xyZWQwXGdyZWVuMTI3XGJsdWUxMjc7XHJlZDBcZ3JlZW4xMjdcYmx1ZTA7
XHJlZDEyN1xncmVlbjBcYmx1ZTEyNztccmVkMTI3XGdyZWVuMFxibHVlMDtccmVkMTI3XGdy
ZWVuMTI3XGJsdWUwO1xyZWQxMjdcZ3JlZW4xMjdcYmx1ZTEyNztccmVkMTkyXGdyZWVuMTky
XGJsdWUxOTJ9e1xpbmZve1xjcmVhdGltXHlyMTk5OFxtbzZcZHkyMlxocjE1XG1pbjQ3XHNl
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SW5nZW1hcn19
--openmail-part-01d4efb6-00000002--
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=========================================================================
Date: Mon, 22 Jun 1998 09:49:28 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: FAB: Selective Solder Stripping
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Dave, in the Minnesota area the largest circuit manufactures produce high
quantities of selective solder strip every day.
If you are going to offer selective strip in high volumes, be sure to test the
resist lamination, and tin stip processes thoroughly. If you'd like any
details please feel free to contact me.
Scott Griggs
Senior Applications Engineer
RBP Chemical Corp.
#612-825-6113
[log in to unmask]
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=========================================================================
Date: Mon, 22 Jun 1998 09:56:00 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Chan, Marcelo" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Chan, Marcelo" <[log in to unmask]>
Subject: Re: Love
X-To: "[log in to unmask]"
<[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
try 408 943-7740
Marcelo
-----Original Message-----
From: [log in to unmask]
[SMTP:[log in to unmask]]
Sent: Monday, June 22, 1998 9:50 AM
To: [log in to unmask]
Subject: [TN] Love
Not what you thought, sorry. I'm searching for someone who knows
the e-mail adress to Fujitsu Computer Packaging Technologies,
San Jos=E9, CA. Wanted person is David Love. Alternatively Larry
Moresco, Conny Wong or Patricia Boucher. / Ingemar << File: =
Love
>>=20
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=========================================================================
Date: Mon, 22 Jun 1998 10:26:18 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Karl Sweitzer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Karl Sweitzer <[log in to unmask]>
Organization: Image Acquisition Systems http://www.kodak.com/cgsHome/ias.shtml
Subject: Solder Fatigue in Space Electronics
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Werner (and any one else),
A colleague showed me a copy of the May 27 issue of USA Today
Editorials. Your letter to the editor "Communication satellites
vulnerable to solder failure" was very interesting. Do you (or any
other TechNet subscribers) have any more details on the prevalence of
solder fatigue as a documented satellite failure mode?
--
Karl Sweitzer voice: 716.47.77546
Eastman Kodak Company pager: 716.25.33681
800 Lee Road fax: 716.47.77293
Rochester, NY 14650-3118 mailto:[log in to unmask]
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=========================================================================
Date: Mon, 22 Jun 1998 07:49:33 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kenny Bloomquist <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kenny Bloomquist <[log in to unmask]>
Subject: Re: Solder Fatigue in Space Electronics
X-To: Karl Sweitzer <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
I am very interested also, please send any response via the TechNet.
At 10:26 AM 6/22/98 -0400, you wrote:
>Werner (and any one else),
>
>A colleague showed me a copy of the May 27 issue of USA Today
>Editorials. Your letter to the editor "Communication satellites
>vulnerable to solder failure" was very interesting. Do you (or any
>other TechNet subscribers) have any more details on the prevalence of
>solder fatigue as a documented satellite failure mode?
>--
>Karl Sweitzer voice: 716.47.77546
>Eastman Kodak Company pager: 716.25.33681
>800 Lee Road fax: 716.47.77293
>Rochester, NY 14650-3118 mailto:[log in to unmask]
Ken Bloomquist
Sr. Principal Process Eng.
PRIMEX Aerospace Company
[log in to unmask]
(425) 881-8990 ext. 6645
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=========================================================================
Date: Mon, 22 Jun 1998 08:07:44 PDT
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Glenn Pelkey <[log in to unmask]>
Subject: Re: die shear specification
X-To: rjavier@[192.1.1.215]
MIME-Version: 1.0
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Ricky,
Mil-Std-883 is at revision E, and the Die Shear Strength test method is number
2019.5. You can get the standard downloaded from the DSCC web site at
http://www.dscc.dla.mil/
You're right about the strength depending on the die size. However, the limit
also depends on the amount of coverage by the attachment material. You'll
probably want to read the entire test method to get a full understanding. It
took me a couple of times.
Let me know if you can't download it, and I'll see what I can do.
Glenn Pelkey
Maxtek Components Corp.
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Date: Mon, 22 Jun 1998 10:58:06 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Sheila Smith <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Sheila Smith <[log in to unmask]>
Subject: Unplated thru holes
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
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Hi TechNet!
Does anyone know of any guidance, specifications, design practice etc =
regarding acceptability of drilled thru holes and routed slots which are =
not plated? We have observed haloing and glass fiber intrusion in & =
around some of the holes & slots at the bare board level. Our concern =
is processing chemistries wicking into the laminate during assembly =
which includes wave solder followed by hand soldering of a number of =
components and several trips thru the semiaqueous and vapor phase =
cleaners. The unplated holes are for hardware & mechanical uses, not =
electrical, but there are active circuitry traces nearby. These are =
double sided polyimide boards. Anyone have any suggestions or similar =
experiences?
Thanks in advance.
Sheila @ Tracor AES
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Date: Mon, 22 Jun 1998 10:29:44 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Dennis Ostendorf <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dennis Ostendorf <[log in to unmask]>
Subject: Re: Heat Reflective Coating -Reply
Mime-Version: 1.0
Content-Type: text/plain
Paul,
I am interested in the spec you referenced on the TechNet on the
insulating paint. Please send me the spec via Fax at (815) 394-2497.
Have you used this paint in a previous application? If yes, did the
operators have any significant complaints in applying the paint? Is the
paint used on the interior or exterior of the part? Approximately how
much more expensive is it than a "standard" epoxy based paint?
Thanks for your help!
Dennis Ostendorf
[log in to unmask]
Phone (815) 394-3361
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Date: Mon, 22 Jun 1998 10:35:27 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rout Lead <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rout Lead <[log in to unmask]>
Subject: Re: Drill Wander
X-To: Richard MacCutcheon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
SOME POSSIBLE CAUSES ARE SPINDLE RPM AND IN FEEDS, ALSO YOUR PANEL
STACK HEIGHT.THESE ARE THE THREE FACTORS THAT YOU NEED TO LOOK AT WHEN
USING A SMALL DRILL BIT LIKE AN .0240 IF YOU ARE DRILLING THREE DEEP
TRY USING A SLOWER FEED RATE AND A HIGHER RPM.
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Date: Mon, 22 Jun 1998 15:52:19 GMT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: fine-pitch component specification
X-cc: [log in to unmask]
Hello Technet,
Sometimes I'm having bad placements with oure pick & place process
due to bent corner leads on 0.5 mm pitch IC's. The machine then
complains about an incorrect "run lenght" (distance between the
center of the first, and the center of the last lead of the row) and
gives us the choice of rejecting the part or placing it inaccurately.
Instead of manually improving rejected components with tweezers or
some other tools, I would prefer sending the components back to the
supplier. The problem with this is that I'm not aware of any
specification for things like "bent leads", "sweep (all leads
pointing a little bit sideways)" or "run lenght". Does anyone know
such a specifications ? Anyone knows of "generally accepted values" ?
Daan Terstegge
Unclassified
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=========================================================================
Date: Mon, 22 Jun 1998 09:06:15 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bill Davis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Davis <[log in to unmask]>
Subject: Re: fine-pitch component specification
X-To: "d. terstegge" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Daan-
Try JEDEC MS-029 (www.eia.org)...I'm working the same issue...
> -----Original Message-----
> From: d. terstegge [SMTP:[log in to unmask]]
> Sent: Monday, June 22, 1998 8:52 AM
> To: [log in to unmask]
> Subject: [TN] fine-pitch component specification
>
> Hello Technet,
>
> Sometimes I'm having bad placements with oure pick & place process
> due to bent corner leads on 0.5 mm pitch IC's. The machine then
> complains about an incorrect "run lenght" (distance between the
> center of the first, and the center of the last lead of the row) and
> gives us the choice of rejecting the part or placing it inaccurately.
> Instead of manually improving rejected components with tweezers or
> some other tools, I would prefer sending the components back to the
> supplier. The problem with this is that I'm not aware of any
> specification for things like "bent leads", "sweep (all leads
> pointing a little bit sideways)" or "run lenght". Does anyone know
> such a specifications ? Anyone knows of "generally accepted values" ?
>
> Daan Terstegge
> Unclassified
>
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Date: Mon, 22 Jun 1998 11:16:43 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Guynn <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Guynn <[log in to unmask]>
Subject: Re: Plastic parts
In-Reply-To: <D19924ED1E31D111962F00805F1998611C5AE5@xch-dug-01>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
We use RMA solder paste exclusively and have many plastic parts in a very
wide variety of assemblies. Our boards go through a semi-aqueous wash. To
date we have had no such corrosion as you mention. We had been a relic of
the ceramic military industry...but now have a mix of new products using
plastic technology as well as legacy programs that use mostly ceramic.
At 12:54 PM 6/19/98 -0700, you wrote:
>Dear Technet,
>
>Fact or Fiction?
>
>Being a relic of military electronics assembly, I have always dealt with
>ceramic-encased microcircuits. As we're starting to look at plastic
>encapsulated microcircuits (PEMs), some new assembly considerations
>arise. One that we (technet) have covered lately is the moisture
>absorption, which I can understand. Another concern that my folks are
>telling me is that these PEMs are subject to corrosion when soldered
>with rosin-based fluxes, even the RMA types, regardless of cleaning
>processes. Other no-clean or water soluble fluxes are ok. I am having
>trouble with this one. Can anyone support or deny this notion?
>
>Thanks
>
>Ralph
>
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>
>
----
Jeffrey C. Guynn <[log in to unmask]> Phone: (219) 429-6345
Lead SMD Manufacturing Engineer Fax: (219) 429-4688
Raytheon Systems Company M/S 25-31
1010 Production Road, Fort Wayne, IN 46808-4106
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=========================================================================
Date: Mon, 22 Jun 1998 13:01:52 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Andy Slade <[log in to unmask]>
Subject: Re: Unplated thru holes
X-To: Sheila Smith <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit
Hi Sheila,
Not sure whether you have a long term reliability problem or not.
By your description, I am assuming the NPT holes are being drilled in
after the panels have been through the final etching process, and that
things like drill feeds and speeds, routing speeds, tools, etc. have
been optimized for this material. I am also assuming this is pure
polyimide. Unsupported polyimide material will fracture quite readily
during machining. This condition can be minimized, if not eliminated,
by performing these secondary drilling/routing operations prior to
etching the base copper from the material. Also, the polyimide/epoxy
blended resins (Tg around 220 deg C) machine much better the pure
poly.
Hope this helps...Andy Slade
______________________________ Reply Separator _________________________________
Subject: [TN] Unplated thru holes
Author: Sheila Smith <[log in to unmask]> at SMTPLink-Hadco
Date: 06/22/98 10:58 AM
Hi TechNet!
Does anyone know of any guidance, specifications, design practice etc regarding
acceptability of drilled thru holes and routed slots which are not plated? We
have observed haloing and glass fiber intrusion in & around some of the holes &
slots at the bare board level. Our concern is processing chemistries wicking
into the laminate during assembly which includes wave solder followed by hand
soldering of a number of components and several trips thru the semiaqueous and
vapor phase cleaners. The unplated holes are for hardware & mechanical uses,
not electrical, but there are active circuitry traces nearby. These are double
sided polyimide boards. Anyone have any suggestions or similar experiences?
Thanks in advance.
Sheila @ Tracor AES
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=========================================================================
Date: Mon, 22 Jun 1998 13:07:20 -0400
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Chris Williams <[log in to unmask]>
Subject: Re: Drill Wander
X-To: Rout Lead <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Make sure you are using good entry material (preferably aluminum).
Rout Lead wrote:
> SOME POSSIBLE CAUSES ARE SPINDLE RPM AND IN FEEDS, ALSO YOUR PANEL
> STACK HEIGHT.THESE ARE THE THREE FACTORS THAT YOU NEED TO LOOK AT WHEN
> USING A SMALL DRILL BIT LIKE AN .0240 IF YOU ARE DRILLING THREE DEEP
> TRY USING A SLOWER FEED RATE AND A HIGHER RPM.
>
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=========================================================================
Date: Mon, 22 Jun 1998 10:29:37 PDT
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Larry Grazian <[log in to unmask]>
Subject: Pink Anti-static Poly Film & PCB's
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Recently, a question was asked by Mike Bailey on the forum, concerning
problems with PCB's in pink anti-static bags. There were several responses
and all agreed that the use of pink poly bags was not a good idea. All of
the responses, however, seem to be based on old data or experience.
In the beginning, "amines" were used as the anti-static agent in pink poly
bags. In order to work, the substance must bleed to the surface of the
film to repel static. After much use it was discovered that, in addition
to the excessive greasy substance which transferred itself to the contents
of the bag, there were other negative aspects to the amine substance
including:
1. Corrosiveness to metals
2. Skin irritation
3. Film sealability problems
Realizing the problems with amines, some manufacturers are using an "amide"
based medium as the anti-static agent in their poly film. While it is more
expensive, it is a big improvement over amines. It is 90% less corrosive,
does not irritate skin, and does not hinder the sealability. However, like
amines, the substance must come to the film surface to work and exhibits a
slight slick feeling.
I haven't been able to find any information on what effect to solderability
the amide based material has. And this is my problem. We use a very
large national PCB manufacturer that vacuum packs the boards using a pink
poly film that has an amide based anti-static agent. When we asked them
not to pack our boards using this pink poly they resisted strongly and
wanted data in support of our objection since that is their standard
package and haven't had objections or problems from some very large
national customers.
So here are my questions:
1. Does anyone have good scientific data on the effect of amide based
anti-static agents on the solderability of PCB's as a result of packaging.
2. If you object to having your boards packaged in pink poly, how are your
boards packaged. The other thing I am told is that amides are commonly
used as lubricants and mold release agents in the manufacture of plastics
including clear poly film.
Thanks for any assistance I can get.
Larry Grazian
Process Engineer
Anritsu Co.
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=========================================================================
Date: Mon, 22 Jun 1998 14:10:34 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Holly Evans <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Holly Evans <[log in to unmask]>
Subject: switch from chromic-based etchants
Mime-Version: 1.0
Content-Type: text/enriched; charset="us-ascii"
Dear Technetters:
I am writing a journal article on the environmental improvements the
industry has made over the past 20 years. My list includes:
- reduced use of tin-lead as etch resist
- increased use of HASL alternatives
- increased use of direct metallization
- elimination of chlorinated solvents
- switch from chromic-based etchants
If any of you have any insight into the <underline>technical</underline>
reasons, the industry adopted these improvements, I would greatly
appreciate your insight and help (I really need help on the chromic acid
section). You can respond to me directly through my e-mail address
([log in to unmask]).
Thank you in advance.
Holly Evans
Director of Environmental and Safety Programs
IPC
1400 Eye St., N.W., Suite 540
Washington, D.C. 20005-2208
phone: 202-638-6219
fax: 202-638-0145
e-mail: [log in to unmask]
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=========================================================================
Date: Mon, 22 Jun 1998 14:36:29 -0400
Reply-To: Tom Monico <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tom Monico <[log in to unmask]>
Subject: Paradigm by Cimnet Systems
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_000C_01BD9DEB.249D35C0"
This is a multi-part message in MIME format.
------=_NextPart_000_000C_01BD9DEB.249D35C0
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Can anyone provide any feedback on Paradigm from Cimnet systems? The =
feedback I have so far is that it's powerful but it has a pretty steep =
learning curve.
What are it's strength's and weaknesses?=20
Comparisons to ProMS would be great.
Thanks for the help.
Tom Monico
------=_NextPart_000_000C_01BD9DEB.249D35C0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD W3 HTML//EN">
<HTML>
<HEAD>
<META content=3Dtext/html;charset=3Diso-8859-1 =
http-equiv=3DContent-Type>
<META content=3D'"MSHTML 4.72.2106.6"' name=3DGENERATOR>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT color=3D#000000 size=3D2>Can anyone provide any feedback on =
Paradigm from=20
Cimnet systems? The feedback I have so far is that it's powerful but it =
has a=20
pretty steep learning curve.</FONT></DIV>
<DIV><FONT color=3D#000000 size=3D2></FONT> </DIV>
<DIV><FONT color=3D#000000 size=3D2>What are it's strength's and =
weaknesses?=20
</FONT></DIV>
<DIV><FONT color=3D#000000 size=3D2></FONT> </DIV>
<DIV><FONT color=3D#000000 size=3D2>Comparisons to ProMS would be=20
great.</FONT></DIV>
<DIV><FONT color=3D#000000 size=3D2></FONT> </DIV>
<DIV><FONT color=3D#000000 size=3D2>Thanks for the help.</FONT></DIV>
<DIV><FONT color=3D#000000 size=3D2></FONT> </DIV>
<DIV><FONT color=3D#000000 size=3D2>Tom =
Monico</FONT></DIV></BODY></HTML>
------=_NextPart_000_000C_01BD9DEB.249D35C0--
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=========================================================================
Date: Mon, 22 Jun 1998 13:35:02 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ron Payne <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ron Payne <[log in to unmask]>
Subject: Re: FAB: Plugged, Filled &/or Tented Vias
X-To: Lisa Williams <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Please sign me up!
Ron Payne
Primex
PO Box 97009
11441 Willows Rd NE
Redmond WA 98073
>IPC is forming a task group that will develop the acceptability requirements of
>plugged, filled and tented vias. This may involve round robin testing. If
you are
>interested in joining this task group, please contact Lisa Williams at the IPC.
>
>Lisa Williams
>IPC
>2215 Sanders Road
>Northbrook, IL 60062
>URL: www.ipc.org
>
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=========================================================================
Date: Mon, 22 Jun 1998 15:37:10 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Gary Christenson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gary Christenson <[log in to unmask]>
Organization: ECC Corp
Subject: Cimnet system
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I am also interested in any information on this system.
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Date: Mon, 22 Jun 1998 19:17:19 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Job opportuniyt
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My name is Fari Nazemi from A.L.I., L.C. Holdings. We are in need of
experienced consultants to perform Environmental, Architectural and property
condition surveys. Please let us know how we can post this message. Please
contact me @ Fax 703-941-8366 or e-mail [log in to unmask], or call me at Tel
703-978-3190.
Rates are negotiable, numerous tasks are available nationwide.
Best Regards
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=========================================================================
Date: Mon, 22 Jun 1998 16:46:29 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Fred Watt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Fred Watt <[log in to unmask]>
Subject: Re: FAB: Plugged, Filled &/or Tented Vias
X-To: Lisa Williams <[log in to unmask]>
Lisa,
I have some inputs, but I don't think I can join your task group.
Specifically, I use tented and plugged vias for vacuum hold down on pogo
pin fixtures. Also, I use filled vias plated smooth for surface mount pads
which need a hardness to accept a pogo pin tip. Keep me posted, if you
can.
Fred Watt
[log in to unmask]
----------
From: Lisa Williams[SMTP:[log in to unmask]]
Reply To: TechNet E-Mail Forum.; Lisa Williams
Sent: Monday, June 15, 1998 2:31 PM
To: [log in to unmask]
Subject: [TN] FAB: Plugged, Filled &/or Tented Vias
IPC is forming a task group that will develop the acceptability
requirements of
plugged, filled and tented vias. This may involve round robin testing. If
you are
interested in joining this task group, please contact Lisa Williams at the
IPC.
Lisa Williams
IPC
2215 Sanders Road
Northbrook, IL 60062
URL: www.ipc.org
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=========================================================================
Date: Mon, 22 Jun 1998 17:29:07 PDT
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Glenn Pelkey <[log in to unmask]>
Subject: Ionic Contaminate Calculation
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hello all,
I'm trying to understand the relationship between Resistivity (ohm-cm) and the
equivalent NaCl in micrograms/square inch. I found some discussion in the
past archives, but I still can't get the equation in TM-650, Method 2.3.26.1
to work for me.
Has anybody used that equation that would be willing to help me out? It looks
like the surface area is taken into account in the formula, but the statement
in Sec 5.4.2 contradicts that. And, where do all the units go? Looks like I
need a practice problem with solutions.
Thanks for any help
Glenn Pelkey
Maxtek Components Corp.
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=========================================================================
Date: Tue, 23 Jun 1998 09:14:29 +0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"H.N.Muralidhara" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "H.N.Muralidhara" <[log in to unmask]>
Subject: Vendor Source
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Please let me know the source for following product,
(1) Nitrile Hand Gloves cotton flock lined in Green colour 330 mm ( 13" )
Qty. Required : 200 Pairs / month
Application : Chemical Processing
Thanking you and best regards,
-----------------------f r o m ---------------------------
H.N.MURALIDHARA |PHONE No.:+91+8221-26618/26619
M/s INDAL ELECTRONICS LTD |FAX No. : +91+8221-26641/27234
12/A, INDUSTRIAL AREA |Email: [log in to unmask]
NANJANGUD - 571 301 |Website:http://www.indalpcb.com
MYSORE DISTRICT, |
KARNATAKA STATE, INDIA |
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=========================================================================
Date: Tue, 23 Jun 1998 09:34:33 +0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"H.N.Muralidhara" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "H.N.Muralidhara" <[log in to unmask]>
Subject: Vendor Source
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Please let me know the source for following product,
(1) Nitrile Hand Gloves cotton flock lined in Green colour 330 mm ( 13" )
Qty. Required : 200 Pairs / month
Application : Chemical Processing
(2) F.R.P.Lining 3 mm thick
Qty. - 500 Sq.Mtr
(3) F.R.P.Screeding 10 mm thick
Qty. - 300 Sq.mtr
(4) Silicone Sponge chord for our Multilater Pressing
Dia - 12 mm
Type - Round
Temp. - Material should withstand minimum 170 Deg.c
Qty. - 20 Mtr / Month
Regards,
Thanking you and best regards,
-----------------------f r o m ---------------------------
H.N.MURALIDHARA |PHONE No.:+91+8221-26618/26619
M/s INDAL ELECTRONICS LTD |FAX No. : +91+8221-26641/27234
12/A, INDUSTRIAL AREA |Email: [log in to unmask]
NANJANGUD - 571 301 |Website:http://www.indalpcb.com
MYSORE DISTRICT, |
KARNATAKA STATE, INDIA |
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=========================================================================
Date: Tue, 23 Jun 1998 17:28:51 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "by Dr. Eden Chen XianSong"
<[log in to unmask]>
Subject: FEM modelling
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII; name="cc:Mail"
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Dear member,
I am going to do FEM simulation for our electronic packaging. There
are several software in the market, such as ANSYS, MARK, ABACUS and
Pro-mechanical. From your experience, which one is better?
I need to simulate the nonlinear material and very fine structure such
as wire and adhesive.
Pls. give me some advice.
Best Regards
Eden
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=========================================================================
Date: Tue, 23 Jun 1998 14:33:59 +0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"L.VINOD" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "L.VINOD" <[log in to unmask]>
Subject: SOURCE FOR BACKUP
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Dear Sirs,
i would like to have some soures for the BACK UP which is used in PCB
DRILLING PURPOSE the thickness varies from 1.6mm to 2mm it should be paper
base or phenolic based.Any type of backup which is used to drill Multilayer
boards.
Kindly give us some addresses.
Regards
L.Vinod
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
L.VINOD PH: +91-8221-26375,
26618
INDAL ELECTRONICS LTD., FAX: +91-8221-26641
PLOT NO 12A, INDUSTRIAL AREA WEB: http://www.indalpcb.com
NANJANGUD, MYSORE DIST., E-MAIL : [log in to unmask]
KARNATAKA - 571 301.
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=========================================================================
Date: Tue, 23 Jun 1998 11:51:07 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: Solder Fatigue in Space Electronics
X-To: [log in to unmask]
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Hi Karl,
Turns out the recent satellite failure is on a satellite in geosynchronous
orbit; a geo-orbit gives you one cycle/day making solder fatigue in a recent
satellite less likely. Very few commercial,if any, leo (low earth
orbit)-satellites are in space at this time; and you would not ear of failures
in military satellites. However, solder joint failures in the Hubble Telescope
and the Gallileo and Magellan spcecraft are documented; they occurred
primarily because of mandated inappropriate testing of the flight hardware
prior to launch which consumed about 60% of the mean solder joint lives.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask]
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=========================================================================
Date: Tue, 23 Jun 1998 11:13:39 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hugo Scaramuzza <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hugo Scaramuzza <[log in to unmask]>
Subject: Re: Job opportuniyt
Mime-Version: 1.0
Content-Type: text/plain
Mr. Nazemi
The IPC's Technet email forum is a free public forum. JOB POSTINGS ARE NOT ALLOWED
on this forum, as stated on IPC's web page. If you continue to post this type of
message, we will invoice you for server time and our internet connection time to
deliver your messages. Please desist immediately.
Hugo Scaramuzza
Electronic Communications Administrator
IPC
2215 Sanders Road
Northbrook IL 60062-6135
(847)509-9700 ext.312
fax:(847)509-9798
[log in to unmask]
>>> <[log in to unmask]> 06/22/98 06:17PM >>>
My name is Fari Nazemi from A.L.I., L.C. Holdings. We are in need of
experienced consultants to perform Environmental, Architectural and property
condition surveys. Please let us know how we can post this message. Please
contact me @ Fax 703-941-8366 or e-mail [log in to unmask], or call me at Tel
703-978-3190.
Rates are negotiable, numerous tasks are available nationwide.
Best Regards
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ext.312
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=========================================================================
Date: Tue, 23 Jun 1998 12:00:16 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Bill Fabry <[log in to unmask]>
Subject: Gold Coated Solder
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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Deat "Techies":
I have a "GOLDEN" opportunity for the experts to shine. I have in my possession
some SMT assemblies built on gold flash fabs that exhibit gold residing on the
surface of the fillet, rather than being dissolved in the solder. The fillet is
fully formed with no graininess or other visual anomilies. The phenomenon
occurs on ONE end of a MELF diode, not on both ends. To answer the obvious
question, it is NOT dependant on the diode polarity; it happens on either end
but on one end only.
I have digitally captured a couple of photos of the phenomenon. If you need
pictorial representation, please e-mail me directly and I can attach it to a
return e-mail.
As you will see, the gold remains on the surface of the fillet, rather than
being dissolved in the fillet. A slight scraping of the fillet surface will
uncover the base solder with NO visual evidence of gold inside. Other
terminations on other components do NOT exhibit this phenomenon. The assembly
subcontractor is using standard NO-CLEAN solder paste (OMG Americas 500ADV
NO-CLEAN 63SN). Unsoldered parts show a tin/lead termination, indicating that
the gold has possibly migrated over the entire termination.
My question: What mechanism is at work to keep the gold from totally dissolving
into the Sn/Pb paste after it leaves the fab during reflow?
Thanks for the help.
Bill Fabry, Sr. Manufacturing Engineer
Plantronics, Inc.
345 Encinal Street
Santa Cruz, Ca. 95060
(408) 458-7555
[log in to unmask]
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=========================================================================
Date: Tue, 23 Jun 1998 15:09:13 -0400
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Doug McGrigor <[log in to unmask]>
Organization: Praegitzer Design
Subject: Subscribing
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I would like to subscribe to this site. Thank you.
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=========================================================================
Date: Tue, 23 Jun 1998 14:39:44 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David D Hillman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David D Hillman <[log in to unmask]>
Subject: Re: Gold Coated Solder
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi Bill - Please email me the photos but I have a couple of questions:
1) If gold is truely on the solder joint surface then it had to come from
somewhere - what surfaces are in the vicinity of the diode during soldering
that are gold coated?
2) When does this "gold" surface coating appear? After solder processes
(reflow) or after ???????
Sorry for the obvious questions but having gold on the surface of a solder
joint as the result of a reflow process is pretty tough to accomplish. Gold
has a very fast diffusion rate in solder so if the solder joint had a gold
coating to start with or was in contact with a gold finish then the gold
would go directly into the solder joint itself rather than "deposit" on the
solder joint surface. Getting gold (or other metals) to migrate onto a
solder joint surface would take an electrochemical reaction - some
reasonable temperature(s) (but not molten!) coupled with moisture (e.g.
humidity). You gave one clue to what you might have - the use of a low
residue material in a no-clean process mode. It has been documented that
flux residues can give a solder joint a "golden" appearance (many of the
old RMA fluxes if not removed properly could give this appearance). I
recommend getting a scanning electron microscopy xray analysis of the
solder joint - it will tell you definitavely if you truely have a "gold"
coating or if you have an flux residue coating. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Bill Fabry <[log in to unmask]> on 06/23/98 02:00:16 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to [log in to unmask]
To: [log in to unmask]
cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
Subject: [TN] Gold Coated Solder
Deat "Techies":
I have a "GOLDEN" opportunity for the experts to shine. I have in my
possession
some SMT assemblies built on gold flash fabs that exhibit gold residing on
the
surface of the fillet, rather than being dissolved in the solder. The
fillet is
fully formed with no graininess or other visual anomilies. The phenomenon
occurs on ONE end of a MELF diode, not on both ends. To answer the obvious
question, it is NOT dependant on the diode polarity; it happens on either
end
but on one end only.
I have digitally captured a couple of photos of the phenomenon. If you
need
pictorial representation, please e-mail me directly and I can attach it to
a
return e-mail.
As you will see, the gold remains on the surface of the fillet, rather
than
being dissolved in the fillet. A slight scraping of the fillet surface
will
uncover the base solder with NO visual evidence of gold inside. Other
terminations on other components do NOT exhibit this phenomenon. The
assembly
subcontractor is using standard NO-CLEAN solder paste (OMG Americas 500ADV
NO-CLEAN 63SN). Unsoldered parts show a tin/lead termination, indicating
that
the gold has possibly migrated over the entire termination.
My question: What mechanism is at work to keep the gold from totally
dissolving
into the Sn/Pb paste after it leaves the fab during reflow?
Thanks for the help.
Bill Fabry, Sr. Manufacturing Engineer
Plantronics, Inc.
345 Encinal Street
Santa Cruz, Ca. 95060
(408) 458-7555
[log in to unmask]
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=========================================================================
Date: Tue, 23 Jun 1998 16:19:07 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Blanchet, Richard" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Blanchet, Richard" <[log in to unmask]>
Subject: Fab: plug vias
MIME-Version: 1.0
Content-Type: text/plain
Hello,
If the solder mask in the vias has been cured (full plug), is there any
way to remove it without damaging the boards ? There's no solder mask
on the surface beside in the vias. Thanks.
Richard Blanchet
Process Engineer, screening
Viasystems Canada Inc.
tel.: (514) 694-8900, ext. 4189
fax: (514) 694-9776
[log in to unmask]
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=========================================================================
Date: Tue, 23 Jun 1998 15:38:00 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tezak Tim <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
Comments: RFC822 error: <W> TO field duplicated. Last occurrence was
retained.
Comments: RFC822 error: <W> TO field duplicated. Last occurrence was
retained.
Comments: RFC822 error: <W> TO field duplicated. Last occurrence was
retained.
Comments: RFC822 error: <W> TO field duplicated. Last occurrence was
retained.
Comments: RFC822 error: <W> TO field duplicated. Last occurrence was
retained.
From: Tezak Tim <[log in to unmask]>
Subject: address transfere
X-To: "Tezak, Ed" <[log in to unmask]>, Ty-Guy <[log in to unmask]>,
Anand Krishnan <[log in to unmask]>,
"Wilson, Cindy" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
fyi
getting a new computer at work
and
just needed to transfere all my adddresses home
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=========================================================================
Date: Sun, 21 Jun 1998 15:22:22 CDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Frank Jalili <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Frank Jalili <[log in to unmask]>
Subject: Re: Paradigm by Cimnet Systems
X-To: [log in to unmask]
Tom,
Back in early part of 1997 we were in market to find a quality
manufacturing software. The search was narrowed-done to Ciment's
Paradigm and Tangible Vision's Imprimis. We have done some comparisons
between two packages back then, data is old, however, if you think that
could be useful to you, please e-mail me off-line. I will be more than
happy to share the information.
ps. we are not using either packages at this point.
Regards,
Frank Jalili
[log in to unmask]
972.335.9841
On Mon, 22 Jun 1998 14:36:29 -0400 Tom Monico <[log in to unmask]>
writes:
>This is a multi-part message in MIME format.
>
>------=_NextPart_000_000C_01BD9DEB.249D35C0
>Content-Type: text/plain;
> charset="iso-8859-1"
>Content-Transfer-Encoding: quoted-printable
>
>Can anyone provide any feedback on Paradigm from Cimnet systems? The =
>feedback I have so far is that it's powerful but it has a pretty steep
>=
>learning curve.
>
>What are it's strength's and weaknesses?=20
>
>Comparisons to ProMS would be great.
>
>Thanks for the help.
>
>Tom Monico
>
>------=_NextPart_000_000C_01BD9DEB.249D35C0
>Content-Type: text/html;
> charset="iso-8859-1"
>Content-Transfer-Encoding: quoted-printable
>
><!DOCTYPE HTML PUBLIC "-//W3C//DTD W3 HTML//EN">
><HTML>
><HEAD>
>
><META content=3Dtext/html;charset=3Diso-8859-1 =
>http-equiv=3DContent-Type>
><META content=3D'"MSHTML 4.72.2106.6"' name=3DGENERATOR>
></HEAD>
><BODY bgColor=3D#ffffff>
><DIV><FONT color=3D#000000 size=3D2>Can anyone provide any feedback on
>=
>Paradigm from=20
>Cimnet systems? The feedback I have so far is that it's powerful but
>it =
>has a=20
>pretty steep learning curve.</FONT></DIV>
><DIV><FONT color=3D#000000 size=3D2></FONT> </DIV>
><DIV><FONT color=3D#000000 size=3D2>What are it's strength's and =
>weaknesses?=20
></FONT></DIV>
><DIV><FONT color=3D#000000 size=3D2></FONT> </DIV>
><DIV><FONT color=3D#000000 size=3D2>Comparisons to ProMS would be=20
>great.</FONT></DIV>
><DIV><FONT color=3D#000000 size=3D2></FONT> </DIV>
><DIV><FONT color=3D#000000 size=3D2>Thanks for the help.</FONT></DIV>
><DIV><FONT color=3D#000000 size=3D2></FONT> </DIV>
><DIV><FONT color=3D#000000 size=3D2>Tom =
>Monico</FONT></DIV></BODY></HTML>
>
>------=_NextPart_000_000C_01BD9DEB.249D35C0--
>
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Date: Tue, 23 Jun 1998 17:06:23 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Gold Coated Solder
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
In a message dated 6/23/98 12:09:38 PM Pacific Daylight Time,
[log in to unmask] writes:
> Dear "Techies":
>
> I have a "GOLDEN" opportunity for the experts to shine. I have in my
> possession
> some SMT assemblies built on gold flash fabs that exhibit gold residing on
> the
> surface of the fillet, rather than being dissolved in the solder. The
> fillet is
> fully formed with no graininess or other visual anomilies. The phenomenon
> occurs on ONE end of a MELF diode, not on both ends. To answer the obvious
> question, it is NOT dependant on the diode polarity; it happens on either
> end
> but on one end only.
>
> I have digitally captured a couple of photos of the phenomenon. If you
need
> pictorial representation, please e-mail me directly and I can attach it to
a
> return e-mail.
>
> As you will see, the gold remains on the surface of the fillet, rather
than
> being dissolved in the fillet. A slight scraping of the fillet surface
> will
> uncover the base solder with NO visual evidence of gold inside. Other
> terminations on other components do NOT exhibit this phenomenon. The
> assembly
> subcontractor is using standard NO-CLEAN solder paste (OMG Americas 500ADV
> NO-CLEAN 63SN). Unsoldered parts show a tin/lead termination, indicating
> that
> the gold has possibly migrated over the entire termination.
>
> My question: What mechanism is at work to keep the gold from totally
> dissolving
> into the Sn/Pb paste after it leaves the fab during reflow?
>
> Thanks for the help.
>
> Bill Fabry, Sr. Manufacturing Engineer
> Plantronics, Inc.
> 345 Encinal Street
> Santa Cruz, Ca. 95060
> (408) 458-7555
Hi ya' Bill!!
You got the boards like that from a subcontractor huh? (Hmmmm, I wonder
if the same guy I know is working at your subcontractor...could be, I'm just
over the hill from ya' in Sunnyvale...)
What I was referring to in the previous sentence, was this production
operator I used to know. But I don't need to get into that...lemme ask you
this, is the end of the diode that has the gold on it anywhere close to the
gold fingers of the board? The reason I ask is because I used to know an
operator that got a little too crazy with the replating unit we had to fix the
solder splashes on the gold fingers...wound-up plating some solder fillets on
components that were close to the fingers...BOY! was that ever fun explaining
to the customer!
Anyways, kinda' sounds like what may have happened with your boards...
-Steve Gregory-
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Date: Tue, 23 Jun 1998 14:45:28 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Bill Fabry <[log in to unmask]>
Subject: Gold Coated Solder - a Followup
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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Techies:
Thanks for your response to the above-mentioned topic.
As it turned out, the root cause of the problem wasn't as difficult or
"off-the-wall" as I originally thought it to be. Steve Gregory hit the nail on
the head.
Our assembly subcontractor splashed solder on the adjacent gold fingers during
component replacement. They used in-house gold replating operation to resurface
the fingers and were a bit overzealous in the plating, causing the MELF
terminals to be inadvartantly coated along with the fingers with the "new" gold.
Bill Fabry
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=========================================================================
Date: Tue, 23 Jun 1998 17:15:22 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jerry Cupples <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jerry Cupples <[log in to unmask]>
Subject: ASSY: BGA sanity check
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Hello, TechNet....
Soldering (inline convection furnace) BGA's on both sides of a board is
beyond my own experience, but it seems to violate a principle (at least an
imaginary one) related to the controlled collapse, or perhaps liquids under
tension.
For a board design using 3 commercial BGA packages (PBGA 256, eutectic
balls on 1.27 mm pitch), am I obstinately blocking the path of progress by
requesting that this package style be confined to only one surface of a new
board design?
If you are doing this today and it is a piece of cake, go ahead and brag;
but I would prefer to hear that caution is well advised, i.e. tales of
misery, shame and corporate disaster resulting from such mistakes. ;-)
cheers,
Jerry Cupples
Interphase Corporation
Dallas, TX USA
http://www.iphase.com
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=========================================================================
Date: Wed, 24 Jun 1998 08:41:06 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Klasek <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Klasek <[log in to unmask]>
Subject: Re: ASSY: BGA sanity check
X-To: Jerry Cupples <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Jerry ;
this task is quite possible using reflows with bottom temp chilling ;
up to some 30'C differentiation can be achieved ; therefore keeping you
below liquidus on second pass on bottom side .
Sorry to disappoint you , however if you do not have reflow rigged with
chiller you still have a pretty good excuse .
Paul Klasek
http://www.resmed.com
> ----------
> From: Jerry Cupples[SMTP:[log in to unmask]]
> Sent: Wednesday, 24 June 1998 8:15
> To: [log in to unmask]
> Subject: [TN] ASSY: BGA sanity check
>
> Hello, TechNet....
>
> Soldering (inline convection furnace) BGA's on both sides of a board
> is
> beyond my own experience, but it seems to violate a principle (at
> least an
> imaginary one) related to the controlled collapse, or perhaps liquids
> under
> tension.
>
> For a board design using 3 commercial BGA packages (PBGA 256, eutectic
> balls on 1.27 mm pitch), am I obstinately blocking the path of
> progress by
> requesting that this package style be confined to only one surface of
> a new
> board design?
>
> If you are doing this today and it is a piece of cake, go ahead and
> brag;
> but I would prefer to hear that caution is well advised, i.e. tales of
> misery, shame and corporate disaster resulting from such mistakes. ;-)
>
>
> cheers,
>
>
>
>
> Jerry Cupples
> Interphase Corporation
> Dallas, TX USA
> http://www.iphase.com
>
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=========================================================================
Date: Tue, 23 Jun 1998 18:48:46 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Afri Singh <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Afri Singh <[log in to unmask]>
Subject: Re: Fab: plug vias
X-To: "Blanchet, Richard" <[log in to unmask]>
In-Reply-To: <CF6402C346C6D011BD2500A0C9319AF59E6ED4@EXCH_SRV1>
MIME-Version: 1.0
Content-Type: TEXT/PLAIN; charset=US-ASCII
Is this thermal,UV or LPI ink ?
On Tue, 23 Jun 1998, Blanchet, Richard wrote:
> Hello,
>
> If the solder mask in the vias has been cured (full plug), is there any
> way to remove it without damaging the boards ? There's no solder mask
> on the surface beside in the vias. Thanks.
>
>
> Richard Blanchet
> Process Engineer, screening
> Viasystems Canada Inc.
> tel.: (514) 694-8900, ext. 4189
> fax: (514) 694-9776
> [log in to unmask]
>
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>
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=========================================================================
Date: Tue, 23 Jun 1998 12:57:10 PST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: switch from chromic-based etchants
Holly,
You may also consider adding the following to your list :
The elimination of Chlorine gas .
The elimination of Silver Halide imaging film ( as a result of
Laser Imaging .
Improved filtration of photoresist material during the stripping
process .
Mike Covel
Raytheon Systems Company
Tucson Az.
______________________________ Reply Separator _________________________________
Subject: [TN] switch from chromic-based etchants
Author: "TechNet E-Mail Forum." <[log in to unmask]>, at CCGATE
Date: 6/22/98 11:31 AM
Dear Technetters:
I am writing a journal article on the environmental improvements the
industry has made over the past 20 years. My list includes:
- reduced use of tin-lead as etch resist
- increased use of HASL alternatives
- increased use of direct metallization
- elimination of chlorinated solvents
- switch from chromic-based etchants
If any of you have any insight into the <underline>technical</underline>
reasons, the industry adopted these improvements, I would greatly
appreciate your insight and help (I really need help on the chromic acid
section). You can respond to me directly through my e-mail address
([log in to unmask]).
Thank you in advance.
Holly Evans
Director of Environmental and Safety Programs
IPC
1400 Eye St., N.W., Suite 540
Washington, D.C. 20005-2208
phone: 202-638-6219
fax: 202-638-0145
e-mail: [log in to unmask]
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=========================================================================
Date: Wed, 24 Jun 1998 07:35:13 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Andy Slade <[log in to unmask]>
Subject: Re: Fab: plug vias
X-To: "Blanchet; Richard" <[log in to unmask]>
Mime-Version: 1.0
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Hi Richard,
We have had some success with laser ablating mask from via holes.
This can be a bit challenging at set up, and not 100% successful.
Success depends on thickness, mask type, aspect ratio, surrounding
feature size, etc. We have managed to saved a fair number of boards
destined for the dumpster this way. I am assuming this is a thermoset
epoxy mask vs. LPI. LPI's can generally be chemically stripped.
Hope this helps...Andy Slade
______________________________ Reply Separator _________________________________
Subject: [TN] Fab: plug vias
Author: "Blanchet; Richard" <[log in to unmask]> at SMTPLink-Hadco
Date: 06/23/98 4:19 PM
Hello,
If the solder mask in the vias has been cured (full plug), is there any
way to remove it without damaging the boards ? There's no solder mask
on the surface beside in the vias. Thanks.
Richard Blanchet
Process Engineer, screening
Viasystems Canada Inc.
tel.: (514) 694-8900, ext. 4189
fax: (514) 694-9776
[log in to unmask]
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=========================================================================
Date: Wed, 24 Jun 1998 21:57:33 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Nicholas Kane <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Nicholas Kane <[log in to unmask]>
Subject: Re: ASSEMBLY:Barcoding
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Perhaps someone can help me.
I am looking to do a barcoding trial. I need some software, shareware
preferably, that will enable me to compose and print a wide range of
barcode labels. I need to be able to vary size, code type, style and content.
Does anyone have any thoughts?
N
[Nicholas Kane]
[Axion Australasia]
[Suite 3, 651 Canterbury Road]
[Surrey Hills]
[Victoria 3127 Australia]
[tel: 613 9899 3511 fax: 613 9899 3811]
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=========================================================================
Date: Wed, 24 Jun 1998 06:52:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David D Hillman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David D Hillman <[log in to unmask]>
Subject: Re: Gold Coated Solder - a Followup
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hi Bill - thanks for the followup - it puts my faith back in a few physics
principles! I'll file this one in my unique but possible defects file.
Dave
Bill Fabry <[log in to unmask]> on 06/23/98 04:45:28 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to [log in to unmask]
To: [log in to unmask]
cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
Subject: [TN] Gold Coated Solder - a Followup
Techies:
Thanks for your response to the above-mentioned topic.
As it turned out, the root cause of the problem wasn't as difficult or
"off-the-wall" as I originally thought it to be. Steve Gregory hit the
nail on
the head.
Our assembly subcontractor splashed solder on the adjacent gold fingers
during
component replacement. They used in-house gold replating operation to
resurface
the fingers and were a bit overzealous in the plating, causing the MELF
terminals to be inadvartantly coated along with the fingers with the "new"
gold.
Bill Fabry
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=========================================================================
Date: Wed, 24 Jun 1998 07:15:50 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Tenison Stone <[log in to unmask]>
Subject: Low-melt solder alloys for desoldering
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi everyone,
I would like your opinions and experiences using low-melt solder alloys for
rework of smd. The mixture contains tin, lead, and bismuth. What
potential problems are associated with this combination?
Thank you for your help.
Tenison Stone
Telex Communications
Blue Earth, MN
507-526-3205
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=========================================================================
Date: Wed, 24 Jun 1998 07:08:40 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David D Hillman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David D Hillman <[log in to unmask]>
Subject: Re: ASSY: BGA sanity check
X-To: Jerry Cupples <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hi Jerry - processing a double sided BGA PWA design is no different than
processing a double sided 0.4mm (16 mil pitch for the metrically impaired)
QFP PWA design. You need to calculate your surface tension to component
weight ratio to make sure that physics are in your favor. I have done some
soldering trials with reasonable success without taking any special steps
(pad design, footprint location, etc. ) other than conducting the normal
assembly reflow profiling steps. I would be more concern with having the
BGA's located to facilitate rework if necessary. Having the BGAs mirror
each other on opposing assembly sides or having high profile components
adjacent to a BGA (i.e. a high skyline) would be a problem for our rework
scheme. Spending time on getting the reflow profile tuned has been the key
for me. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Jerry Cupples <[log in to unmask]> on 06/23/98 05:15:22 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Jerry Cupples <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
Subject: [TN] ASSY: BGA sanity check
Hello, TechNet....
Soldering (inline convection furnace) BGA's on both sides of a board is
beyond my own experience, but it seems to violate a principle (at least an
imaginary one) related to the controlled collapse, or perhaps liquids under
tension.
For a board design using 3 commercial BGA packages (PBGA 256, eutectic
balls on 1.27 mm pitch), am I obstinately blocking the path of progress by
requesting that this package style be confined to only one surface of a new
board design?
If you are doing this today and it is a piece of cake, go ahead and brag;
but I would prefer to hear that caution is well advised, i.e. tales of
misery, shame and corporate disaster resulting from such mistakes. ;-)
cheers,
Jerry Cupples
Interphase Corporation
Dallas, TX USA
http://www.iphase.com
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=========================================================================
Date: Wed, 24 Jun 1998 08:31:59 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"John Haman Jr." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "John Haman Jr." <[log in to unmask]>
Subject: Re: Fab: plug vias
X-To: "Blanchet, Richard" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-Transfer-Encoding: 7bit
The laser method mentioned might be your only option but rather expensive
if
you do not have one. Chemically stripping will most likely not work,
especially with no mask on the surface. Soldermask strip is extremely
aggressive and will attack the butter coat. If the boards are not very
expensive I would suggest a remake.
Not much of an answer, However that situation never really has one.
Good Luck
John Haman Jr.
----------
> From: Blanchet, Richard <[log in to unmask]>
> To: [log in to unmask]
> Subject: [TN] Fab: plug vias
> Date: Tuesday, June 23, 1998 4:19 PM
>
> Hello,
>
> If the solder mask in the vias has been cured (full plug), is there any
> way to remove it without damaging the boards ? There's no solder mask
> on the surface beside in the vias. Thanks.
>
>
> Richard Blanchet
> Process Engineer, screening
> Viasystems Canada Inc.
> tel.: (514) 694-8900, ext. 4189
> fax: (514) 694-9776
> [log in to unmask]
>
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=========================================================================
Date: Wed, 24 Jun 1998 08:44:46 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bev Christian <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bev Christian <[log in to unmask]>
Subject: Re: ASSY: BGA sanity check
X-To: Jerry Cupples <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Jerry,
There should not be a problem with double-sided BGAs if:
1) your oven uses rails and not a mesh belt
2) it moves smoothly
3) the BGAs are light enough that the liquid surface tension of the molten
soler is enough to hold it to the board. Without doing the math I would
expect that with the number of I/Os for a BGA that you should be OK, unless
you are trying to start off with a BGA with an embedded copper heat sink!!
I have no corporate disasters to report on this front. However, I will tell
you to be particularly careful of moisture storage of BGAs.
regards,
Bev Christian
Nortel
> ----------
> From: Jerry Cupples[SMTP:[log in to unmask]]
> Sent: Tuesday, June 23, 1998 6:15 PM
> To: [log in to unmask]
> Subject: [TN] ASSY: BGA sanity check
>
> Hello, TechNet....
>
> Soldering (inline convection furnace) BGA's on both sides of a board is
> beyond my own experience, but it seems to violate a principle (at least an
> imaginary one) related to the controlled collapse, or perhaps liquids
> under
> tension.
>
> For a board design using 3 commercial BGA packages (PBGA 256, eutectic
> balls on 1.27 mm pitch), am I obstinately blocking the path of progress by
> requesting that this package style be confined to only one surface of a
> new
> board design?
>
> If you are doing this today and it is a piece of cake, go ahead and brag;
> but I would prefer to hear that caution is well advised, i.e. tales of
> misery, shame and corporate disaster resulting from such mistakes. ;-)
>
>
> cheers,
>
>
>
>
> Jerry Cupples
> Interphase Corporation
> Dallas, TX USA
> http://www.iphase.com
>
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=========================================================================
Date: Wed, 24 Jun 1998 09:17:58 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Tim Gallagher <[log in to unmask]>
Subject: Re: ASSEMBLY:Barcoding
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Nicholas,
There are a number of quality manufacturers out
there for both hardware and software. I would try contacting your local
"Brady","Zebra", or "Sato" rep. All of these Manufacturers make quality
thermal transfer printers which interface to most barcode software
packages. I'm sure one of them would love to help you with your
preliminary testing.
I'm not aware of any shareware out there that will enable you to print a
quality label on one of the above mentioned printers. The key to your
success here will be in the hardware. If you print high quality (300dpi)
labels you will need the equivalent reader/gun/pen wand to interpret the
info. for usage.
Good luck !!!!
Tim Gallagher
Development Eng.
Celestica New England (U.S.A.)
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=========================================================================
Date: Wed, 24 Jun 1998 07:41:45 -0600
Reply-To: Mark Harrand <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Harrand <[log in to unmask]>
Subject: Re: Low-melt solder alloys for desoldering
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
I just started researching this subject myself. Common problems cited is
are a wide range of melting points and some embrittlement from
intermetallics.
Take a look at this
http://www.tms.org/pubs/journals/JOM/9605/McCormack-9605.html for info on
Sn/Pb/Bi. Feel free to e-mail me personally if you wish to compare notes.
Mark Harrand
-----Original Message-----
From: Tenison Stone <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Wednesday, June 24, 1998 6:10 AM
Subject: [TN] Low-melt solder alloys for desoldering
>Hi everyone,
>
>I would like your opinions and experiences using low-melt solder alloys for
>rework of smd. The mixture contains tin, lead, and bismuth. What
>potential problems are associated with this combination?
>
>Thank you for your help.
>
>Tenison Stone
>Telex Communications
>Blue Earth, MN
>507-526-3205
>
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>
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=========================================================================
Date: Wed, 24 Jun 1998 09:49:00 PDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Kasprzak, Bill (esd) US" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Kasprzak, Bill (esd) US" <[log in to unmask]>
Subject: : Solder Fatigue in Space Electronics
Werner:
I was wondering if you point me in the right direction as to where the
documentation can be located concerning the solder joint failures on the
spacecraft mentioned in your earlier response. I am curious as to the nature
of the "inappropiate testing". I think that a response to tech-net would be
appropiate because if I request a "private" response, the tech-net would get
flooded with the "Me Too" response requests which may be annoying to some.
Thanks,
Bill Kasprzak
Moog Inc.
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=========================================================================
Date: Wed, 24 Jun 1998 16:10:04 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Cecilia Rohrt <[log in to unmask]>
Subject: SPC software
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hello,
I'm interested in a spc software that can handle data from our dispensing
process. It should be able to handle:
- data inputs from manual inspection (for example defect codes) for
calculation of dpm (defects per million).
- data inputs, such as time and date for cleaning the pumps and needles,
changing solder paste tubes and batches.
- measure values, such as temperature and humidity inside the dispenser and
long time storage (fridge or freezer). I would like to know of some measure
equipment that can communicate with the software.
There should be possible to develope the software with options for future
needs.
Looking forward hearing from You
/Cecilia Rohrt
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=========================================================================
Date: Wed, 24 Jun 1998 07:31:19 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kenny Bloomquist <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kenny Bloomquist <[log in to unmask]>
Subject: Re: SPC software
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
We do not have the exact application that you do but we have found
GageTalker CimWorks to be pretty flexible.
11415 NE 128th St.
Kirkland, WA 98034-6332
800-955-7100
Ken Bloomquist
Sr. Principal Process Eng.
PRIMEX Aerospace Company
[log in to unmask]
(425) 881-8990 ext. 6645
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=========================================================================
Date: Wed, 24 Jun 1998 10:57:50 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: ASSEMBLY:Barcoding
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
In a message dated 6/24/98 5:01:20 AM Pacific Daylight Time, nicholas@AXION-
AUST.COM writes:
> Perhaps someone can help me.
>
> I am looking to do a barcoding trial. I need some software, shareware
> preferably, that will enable me to compose and print a wide range of
> barcode labels. I need to be able to vary size, code type, style and
> content.
>
> Does anyone have any thoughts?
>
> N
>
>
>
> [Nicholas Kane]
> [Axion Australasia]
> [Suite 3, 651 Canterbury Road]
> [Surrey Hills]
> [Victoria 3127 Australia]
> [tel: 613 9899 3511 fax: 613 9899 3811]
Good Day Nicholas!
I'm assuming you have WEB access, so point your browser to:
http://www.industry.net/c/mn/_swbarcode
there must be at least 20-different shareware packages at that site! Enjoy!
-Steve Gregory-
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=========================================================================
Date: Wed, 24 Jun 1998 18:09:23 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Gabriela Bogdan <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gabriela Bogdan <[log in to unmask]>
Subject: Solder mask between fine pitch pads
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Hi, TechNetters!
Could you please share with me your experience about pro and con's
regarding solder mask
between fine pitch-16mil- pads in relation to the finish of the PCB pads
?
Not being greedy, I'll save the next question for after some answers.
Thank you,
Gaby
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=========================================================================
Date: Wed, 24 Jun 1998 11:20:19 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kuczynski Michael <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kuczynski Michael <[log in to unmask]>
Subject: Soldermask/Pads
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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I've usually always keep the pad/soldermask/pastemask the same size.
For micropitch devices I "try" to ensure a 9MIL clearance PAD 2 PAD for the
soldermask while trying to keep the pad size 3MILs larger than the lead.
Michael Kuczynski 201-393-2122 (Phone)
Allied Signal 201-393-6688 (Fax)
688 Rt46E E/K4
Teterboro NJ 07608
[log in to unmask]
[log in to unmask]
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=========================================================================
Date: Wed, 24 Jun 1998 11:45:04 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Lainie Loveless <[log in to unmask]>
Subject: Re: Solder mask between fine pitch
Gaby -
At a previous employer, we had a case where we designed the board to have
the mask between the pads (HASL). The vendor had difficulty achieving a
quality finish -the mask simply disappeared between leads upon curing.
This vendor claimed we were overly cautious in designing the boards with
the mask between the pads and that we were his only customer who was
doing so for the 16 mil pitch. My comments are if you don't need masking
between fine pitch pads [to prevent bridging], where else would you need
it? That said, we used the boards without the mask between pads and did
not have a bridging problem for paste, place, and reflow. Any manual
rework of these parts, however, was obviously very difficult!
Lainie Loveless
Quad Systems
----------
From: TechNet
Sent: Wednesday, June 24, 1998 11:16 AM
To: [log in to unmask]
Subject: [TN] Solder mask between fine pitc
Hi, TechNetters!
Could you please share with me your experience about pro and con's
regarding solder mask
between fine pitch-16mil- pads in relation to the finish of the PCB pads
?
Not being greedy, I'll save the next question for after some answers.
Thank you,
Gaby
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=========================================================================
Date: Wed, 24 Jun 1998 11:37:55 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Undetermined origin c/o LISTSERV administrator
<[log in to unmask]>
Sender: TechNet <[log in to unmask]>
Comments: RFC822 error: <E> "From:"/"Sender:" field is missing.
From: Undetermined origin c/o LISTSERV administrator
<[log in to unmask]>
Subject: Deleted Message
To: Aric Parr@01635@Lectron_RH
EatonWHQ@CorpMail@WHQCleveOH [C=US/A=INTERNET/DDA=ID/TechNet(a)IPC.ORG]
From: EatonWHQ@CorpMail@WHQCleveOH [C=US/A=INTERNET/DDA=ID/TechNet(a)IPC
Subject: Re: [TN] SPC software
Message in Transport deleted by:
Alex Michalczyk@TelCom@WHQPC1
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Date: Wed, 24 Jun 1998 11:23:04 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bev Christian <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bev Christian <[log in to unmask]>
Subject: Re: ASSY: BGA sanity check
X-To: Jerry Cupples <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
This is a repeat. First one got bounced back by admin system.
Jerry,
There should not be a problem with double-sided BGAs if:
1) your oven uses rails and not a mesh belt
2) it moves smoothly
3) the BGAs are light enough that the liquid surface tension of the molten
soler is enough to hold it to the board. Without doing the math I would
expect that with the number of I/Os for a BGA that you should be OK, unless
you are trying to start off with a BGA with an embedded copper heat sink!!
I have no corporate disasters to report on this front. However, I will tell
you to be particularly careful of moisture storage of BGAs.
regards,
Bev Christian
Nortel
> ----------
> From: Jerry Cupples[SMTP:[log in to unmask]]
> Sent: Tuesday, June 23, 1998 6:15 PM
> To: [log in to unmask]
> Subject: [TN] ASSY: BGA sanity check
>
> Hello, TechNet....
>
> Soldering (inline convection furnace) BGA's on both sides of a board is
> beyond my own experience, but it seems to violate a principle (at least an
> imaginary one) related to the controlled collapse, or perhaps liquids
> under
> tension.
>
> For a board design using 3 commercial BGA packages (PBGA 256, eutectic
> balls on 1.27 mm pitch), am I obstinately blocking the path of progress by
> requesting that this package style be confined to only one surface of a
> new
> board design?
>
> If you are doing this today and it is a piece of cake, go ahead and brag;
> but I would prefer to hear that caution is well advised, i.e. tales of
> misery, shame and corporate disaster resulting from such mistakes. ;-)
>
>
> cheers,
>
>
>
>
> Jerry Cupples
> Interphase Corporation
> Dallas, TX USA
> http://www.iphase.com
>
> ################################################################
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Date: Wed, 24 Jun 1998 11:58:39 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Karl Sweitzer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Karl Sweitzer <[log in to unmask]>
Organization: Image Acquisition Systems http://www.kodak.com/cgsHome/ias.shtml
Subject: Re: : Solder Fatigue in Space Electronics
X-To: "Kasprzak, Bill (esd) US" <[log in to unmask]>,
Werner Engelmaier <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Bill,
I have seen the issue that Werner wrote about on many programs, that
is, the manufacturing and or test environments can be much more
damaging than the use environment. This is why one should design (as
well as perform a reliability analysis) for the whole life cycle.
When you perform this life cycle analysis, you can tabulate the damage
for each life cycle segment. This approach to fatigue analysis was
used very successfully on the Air Force F22 as part of the Avionics
Integrity Program (AVIP for short).
On a recent LEO commercial imaging electronics system that I worked on
I was able to show our customer that the testing environments consumed
over 80% of the total life cycle fatigue damage for some components.
I was only able to do this after requesting that the customer gave me
a detailed "day in the life" thermal profile of the satellite
environment so that I could compare the on orbit fatigue damage to the
test environment damage. I choose to use an elastic plastic total
strain approach to compare the low cycle (about 20 cycles) fatigue
damage caused by the test environment with the relatively high cycle
(about 40,000 cycles over 7 years) fatigue damage caused by the orbit
environment.
With this data we were then able to negotiate a reasonable number of
test cycles that could "screen out" infant moralities while not
forcing a design that would require expensive materials.
Please reply (personally or to TechNet) with any comments or further
questions.
--
Karl Sweitzer voice: 716.47.77546
Eastman Kodak Company pager: 716.25.33681
800 Lee Road fax: 716.47.77293
Rochester, NY 14650-3118 mailto:[log in to unmask]
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=========================================================================
Date: Wed, 24 Jun 1998 09:10:15 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, ETS <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: ETS <[log in to unmask]>
Subject: Re: ASSY: BGA sanity check
X-To: Jerry Cupples <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Dear Jerry,
As a reflow manufacturer of course I want to brag but I also do not blame
you for your hesitation. The weight of most BGA's outwieghts the surface
tension of the solder paste. However, as Mr. Klasek pointed out, reflow CAN
be avoided on the bottom side of the board. I am sure that you have heard
before that once solder has been reflowed once the melting point of that
solder increases to a higher temperature. This is where I have to differ
with Mr. Klasek, we have not found chillers to be necessary. After reflowing
the BGA's on the top side and inverting the board, we run the assembly
through an ETS CUREFLOW that has both top and bottom convection heating. We
use a profile that uses standard temperatures on all 6 top zones (165C,
175C, 160C, 160C, 185C, 245C) and then set all bottom zones to ambient
temperature (or room temperature). This creates differential heating on the
assembly by heating the top side of the board and cooling the bottom side
of the assembly. This creates a big enough temperature delta to keep the
bottom side components from reflowing a second time.
Of course this method requires two passes through the reflow oven whereas if
all the BGA's where on the top of the board you might be able to solder both
sides with a single pass through reflow.
If you would like to discuss this further I can be contacted at [log in to unmask]
Sincerely,
Brian Stumm
>Hello, TechNet....
>
>Soldering (inline convection furnace) BGA's on both sides of a board is
>beyond my own experience, but it seems to violate a principle (at least an
>imaginary one) related to the controlled collapse, or perhaps liquids under
>tension.
>
>For a board design using 3 commercial BGA packages (PBGA 256, eutectic
>balls on 1.27 mm pitch), am I obstinately blocking the path of progress by
>requesting that this package style be confined to only one surface of a new
>board design?
>
>If you are doing this today and it is a piece of cake, go ahead and brag;
>but I would prefer to hear that caution is well advised, i.e. tales of
>misery, shame and corporate disaster resulting from such mistakes. ;-)
>
>
>cheers,
>
>
>
>
>Jerry Cupples
>Interphase Corporation
>Dallas, TX USA
>http://www.iphase.com
>
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>
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=========================================================================
Date: Wed, 24 Jun 1998 12:47:27 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: : Solder Fatigue in Space Electronics
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=ISO-8859-1
Content-transfer-encoding: quoted-printable
Hi Bill,
On the inappropriate NASA testing you may look at: Engelmaier, W.,=0A"Env=
ironmental Stress Screening and Use Environments - Their Impact on Solder=
=0AJoint and Plated-Through-Hole Reliability," Proc. Int. Electronics Pac=
kaging=0AConf. (IEPS), Marlborough, MA, September1990, p.388; also in Pro=
c. 15th Ann.=0AElectronic Manufacturing Seminar, China Lake, CA, February=
1991, pp. 253-269;=0Aalso in Proc. NEPCON West =9191, Anaheim, CA, Febru=
ary 1991, pp. 67-80;. There=0Aare some JPL and NASA/Unisys GreenBelt rep=
orts on the subject of the solder=0Ajoint failures: Ross, R. G., "Magella=
n/Galileo Solder Joint Failure Analysis=0Aand Recommendations," JPL Publi=
cation 89-35 Galileo Report 1625-429, Jet=0APropulsion Laboratory, Pasade=
na, CA, September 15, 1989 and Evans, J., "Solder=0AJoint Fatigue Analysi=
s Fairchild Remote Interface Units," Goddard Space Flight=0ACenter Evalua=
tion Report, Serial No. 03347, September 8, 1989. the exact=0Areferences =
I do not have handy since I am on the road.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask] =0A
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=========================================================================
Date: Wed, 24 Jun 1998 13:07:31 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Edward J. Valentine" <[log in to unmask]>
Subject: Re: Solder mask between fine pitch pads
X-To: Gabriela Bogdan <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Gabriela Bogdan wrote:
>
> Hi, TechNetters!
> Could you please share with me your experience about pro and con's
> regarding solder mask
> between fine pitch-16mil- pads in relation to the finish of the PCB pads
> ?
> Not being greedy, I'll save the next question for after some answers.
> Thank you,
> Gaby
>
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Gaby -
I strongly recommend solder mask (LPI) between the pads on all fine
pitch. Seveal years ago, we designed a process development test board
which had both "pad windows" (no mask between pads on one side of a QFP
footprint) and mask between pads. The QFP's and pad windows were in
different orientations on the same board. The results were that we had
significantly less bridging with mask between the pads. For the last few
years, we have assembled .016 mil parts with mask between the pads. You
may want to consider another PC Board fabricator. Ed Valentine/
--
ProTronics, Inc.
861 Old Knight Road
Knightdale, NC 27545
Phone: (919) 217-0007, Fax: (919) 217-0050
http://www.protronics-inc.com
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=========================================================================
Date: Wed, 24 Jun 1998 10:17:22 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tom Lambert <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tom Lambert <[log in to unmask]>
Subject: Chip Termination Finish
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Hi Folks : I just know many of you out there have knowledge re termination
finish of chip parts to pass along. Specifically - is "hot solder dip" any
better/worse than "solder plate" ?? Thanx.
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=========================================================================
Date: Wed, 24 Jun 1998 13:29:47 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"John Haman Jr." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "John Haman Jr." <[log in to unmask]>
Subject: Re: Solder mask between fine pitch pads
X-To: Gabriela Bogdan <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-Transfer-Encoding: 7bit
Gaby,
Results shown on 16 and 20 mil pitch devices assembled in our 5 assembly
houses with soldermask dams has greatly reduced the number of solder
shorts.
As the manufacturer of the boards for these houses all product with these
smt's
now get 100% dams.
John Haman Jr.
----------
> From: Gabriela Bogdan <[log in to unmask]>
> To: [log in to unmask]
> Subject: [TN] Solder mask between fine pitch pads
> Date: Wednesday, June 24, 1998 11:09 AM
>
> Hi, TechNetters!
> Could you please share with me your experience about pro and con's
> regarding solder mask
> between fine pitch-16mil- pads in relation to the finish of the PCB pads
> ?
> Not being greedy, I'll save the next question for after some answers.
> Thank you,
> Gaby
>
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=========================================================================
Date: Wed, 24 Jun 1998 10:47:10 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Subject: void size specification for BGA's
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Is there an IPC void size specification for BGA's detected by transmission
X-ray or industry defecto standard?
re,
ken patel
______________________________________________________
Ken Patel Phone: (408) 490-6804
1708 McCarthy Blvd. Fax: (408) 490-6859
Milpitas, CA 95035 Beeper: (888) 769-1808
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=========================================================================
Date: Wed, 24 Jun 1998 21:32:46 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Gabriela Bogdan <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gabriela Bogdan <[log in to unmask]>
Subject: Re: void size specification for BGA's
X-To: Ken Patel <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Ken Patel wrote:
> Is there an IPC void size specification for BGA's detected by
> transmission
> X-ray or industry defecto standard?
>
> re,
> ken patel
> ______________________________________________________
> Ken Patel Phone: (408) 490-6804
> 1708 McCarthy Blvd. Fax: (408) 490-6859
> Milpitas, CA 95035 Beeper: (888) 769-1808
>
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Ken,
The only reference I know is on Bob Willis's site and in the last
Bellcore 78 spec which states
a ridiculous 1%.
I am dying to find out other reasonable requirements too.
Please include me in your mail.
Gaby
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=========================================================================
Date: Wed, 24 Jun 1998 11:54:11 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Subject: Reliability Risk related Electroless Nickel/immersion gold
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
On my electroless Nickel/immersion gold bare-board, I have seen few places
with brown/copper looking surface. I have following questions in this regards.
(1) Is it due to not having Nickel and gold going directly on the copper
pads?
(2) What is the reliability risk after the board assembled if above is correct
I mean gold going directly on the copper pads?
(3) We have specified immersion gold over Nickel. Looking the color which
is not 100% copper looking, can immersion gold be plated/applied on
copper or may be process might be changed to electrolytic gold?
re,
ken patel
______________________________________________________
Ken Patel Phone: (408) 490-6804
1708 McCarthy Blvd. Fax: (408) 490-6859
Milpitas, CA 95035 Beeper: (888) 769-1808
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=========================================================================
Date: Wed, 24 Jun 1998 14:57:27 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: HR Contact in Pueblo
Thank you very much
Diane
-------------
Original Text
From: N=Jeff Androlia/I=M/C=US/A=ATTMAIL/P=ETNWHQ/O=CH/EXCH, on 6/24/98
10:12 AM:
Diane the HR Mgr. is Laura Fisher 719-948-4452
-----Original Message-----
From: Diane Schenk [SMTP:[log in to unmask]]
Sent: Wednesday, June 24, 1998 9:45 AM
To: [log in to unmask]
Subject: HR Contact in Pueblo
Mr. Androlia,
I am looking into moving to Colorado and would like to transfer to the
Pueblo Assembly Plant. Unfortunately I have been unable to find any
information on who to contact at that facility. Would you be able to
help
me or tell me how to find this information?
Thank you,
Diane Schenk
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=========================================================================
Date: Wed, 24 Jun 1998 15:18:50 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bev Christian <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bev Christian <[log in to unmask]>
Subject: Re: void size specification for BGA's
X-To: Gabriela Bogdan <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Friends,
We had a good discussion on this at the IPC meeting in Washington in a
session committee chaired by Les Hymes. There is no standard (yet), but it
looked like Celestica, Motorola and Honeywell may have the most info on
this. Motorola data suggests that voiding (within limits) is a good thing
in that the voids are crack arrestors. I did not make the equivalent
committee meeting in Long Beach, so I do not know where it went after that.
Jack? Anybody?
My guess is that we will end up with a standard allowing somewhere in the
15-25% range with a certain limitation of the size of any one void. I would
really like to hear what others have to say on this now. I know this has
been discussed before, but perhaps now more people have some experience and
more reliability work has been completed.
regards,
Bev Christian
Nortel
> ----------
> From: Gabriela Bogdan[SMTP:[log in to unmask]]
> Sent: Wednesday, June 24, 1998 2:32 PM
> To: [log in to unmask]
> Subject: Re: [TN] void size specification for BGA's
>
> Ken Patel wrote:
>
> > Is there an IPC void size specification for BGA's detected by
> > transmission
> > X-ray or industry defecto standard?
> >
> > re,
> > ken patel
> > ______________________________________________________
> > Ken Patel Phone: (408) 490-6804
> > 1708 McCarthy Blvd. Fax: (408) 490-6859
> > Milpitas, CA 95035 Beeper: (888) 769-1808
> >
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> > 847-509-9700 ext.312
> > ################################################################
>
> Ken,
> The only reference I know is on Bob Willis's site and in the last
> Bellcore 78 spec which states
> a ridiculous 1%.
> I am dying to find out other reasonable requirements too.
> Please include me in your mail.
> Gaby
>
> ################################################################
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> information.
> For technical support contact Hugo Scaramuzza at [log in to unmask] or
> 847-509-9700 ext.312
> ################################################################
>
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=========================================================================
Date: Wed, 24 Jun 1998 14:50:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tim Frigon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tim Frigon <[log in to unmask]>
Subject: Gold plating of PWB's
I have recently gone to work with a company who is doing SMA assembly to
PWB's which have gold plated traces and pads. This is a historical concept
as we have both ceramic and PWB substrates. In some products, there is
direct wirebonding to the pads, and hence some thick gold plating is
required. However, if there is no wirebonding to the board, is there any
other reason this would be preferable to conventional lead/tin plating? I
would like to change the solder process from using a 2% silver solder used
as a result of the gold plating to a conventional Sn63 eutectic solder as a
guard against disturbed connections. Secondarily, what is the chemical
action which makes the 2% silver solder more effective on gold plating?
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=========================================================================
Date: Wed, 24 Jun 1998 15:12:18 -0700
Reply-To: "Leslie O. Connally" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Leslie O. Connally" <[log in to unmask]>
Subject: Re: Reliability Risk related Electroless Nickel/immersion gold
X-To: Ken Patel <[log in to unmask]>
In-Reply-To: <2.2.32.19980624185411.006fd274@kms>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Ken,
I experienced the same problem years ago. We traced the problem at that time to
gold porosity, allowing oxidation of the nickel. I don't recall the fix , but I
think we went to 50 microinches of electroplated Gold.
I dont know if this helps or not, Good Luck.
Les Connally
> From: Ken Patel <[log in to unmask]>, on 6/24/98 11:54 AM:
> On my electroless Nickel/immersion gold bare-board, I have seen few places
> with brown/copper looking surface. I have following questions in this
> regards.
>
> (1) Is it due to not having Nickel and gold going directly on the copper
> pads?
> (2) What is the reliability risk after the board assembled if above is
> correct
> I mean gold going directly on the copper pads?
> (3) We have specified immersion gold over Nickel. Looking the color which
> is not 100% copper looking, can immersion gold be plated/applied on
> copper or may be process might be changed to electrolytic gold?
>
> re,
> ken patel
> ______________________________________________________
> Ken Patel Phone: (408) 490-6804
> 1708 McCarthy Blvd. Fax: (408) 490-6859
> Milpitas, CA 95035 Beeper: (888) 769-1808
>
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=========================================================================
Date: Wed, 24 Jun 1998 16:37:56 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Chafin, Ken G." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Chafin, Ken G." <[log in to unmask]>
Subject: Measling/Crazing
MIME-Version: 1.0
Content-Type: text/plain
We have a FR-4 board (11" by 8" by 0.093") on which is mounted a large
sink beneath two power transistors. When the screws which secure the
transistors to the heat sink and to the board are torqued to 5
inch-pounds, significant measling beneath the heat sink (visible from
solder side) occurs when the board is flow soldered. When the torque is
reduced to 3 inch-pounds the measling disappears.
Does the above information suggest there is a problem here beyond a
simple process problem which is addressed by reducing the torque from 5
inch-pounds (which the drawing specifies) to 3 inch-pounds? (For the
record, I don't know if this should be called measling or crazing--both
the mechanical and thermal stress are required to produce the
phenomenon.
It seems odd that the relatively small amount of torque change could
have such a dramatic effect--if the material is within specification
limits and the flow solder process is close to optimal.
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=========================================================================
Date: Wed, 24 Jun 1998 15:10:48 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
LI YUAN <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: LI YUAN <[log in to unmask]>
Subject: Re: FEM modelling
X-To: [log in to unmask]
In-Reply-To: <H0000113003e93a2@MHS>
MIME-Version: 1.0
Content-Type: TEXT/PLAIN; charset=US-ASCII
I have been using ABAQUS and PATRAN. Basically, I use PATRAN as a mesh
tool and ABAQUS for FEM analysis. I would be interested to know any
feedbacks you receive.
Thanks,
Yuan
On Tue, 23 Jun 1998, by Dr. Eden Chen XianSong wrote:
> Dear member,
>
> I am going to do FEM simulation for our electronic packaging. There
> are several software in the market, such as ANSYS, MARK, ABACUS and
> Pro-mechanical. From your experience, which one is better?
>
> I need to simulate the nonlinear material and very fine structure such
> as wire and adhesive.
>
> Pls. give me some advice.
>
> Best Regards
>
> Eden
>
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=========================================================================
Date: Wed, 24 Jun 1998 16:50:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ed Cosper <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Cosper <[log in to unmask]>
Subject: Re: Measling/Crazing
X-To: "Chafin, Ken G." <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
Hi Ken,
This is a very interesting problem. I can't say I've come across this =
complaint before. I guess it is possible that there is a torque limit =
before you start to introduce micro-fractures in the glass fibers that =
may be close to the surface. If that were the case then subsequent heat =
applications may just " push it over the limit " and make the fractures =
visible. But that is just a guess. Does the mounting holes have a =
surface pad? If not, perhaps that may just solve your problem. Or as a =
minimum hide it. You would have to evaluate any potential reliability =
issues.=20
Sorry I couldn't be more helpful.=20
Ed Cosper
----------
From: Chafin, Ken G.[SMTP:[log in to unmask]]
Sent: Wednesday, June 24, 1998 3:38 PM
To: [log in to unmask]
Subject: [TN] Measling/Crazing
We have a FR-4 board (11" by 8" by 0.093") on which is mounted a large
sink beneath two power transistors. When the screws which secure the
transistors to the heat sink and to the board are torqued to 5
inch-pounds, significant measling beneath the heat sink (visible from
solder side) occurs when the board is flow soldered. When the torque is
reduced to 3 inch-pounds the measling disappears.
Does the above information suggest there is a problem here beyond a
simple process problem which is addressed by reducing the torque from 5
inch-pounds (which the drawing specifies) to 3 inch-pounds? (For the
record, I don't know if this should be called measling or crazing--both
the mechanical and thermal stress are required to produce the
phenomenon.
It seems odd that the relatively small amount of torque change could
have such a dramatic effect--if the material is within specification
limits and the flow solder process is close to optimal.
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additional information.
For technical support contact Hugo Scaramuzza at [log in to unmask] or =
847-509-9700 ext.312
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=========================================================================
Date: Wed, 24 Jun 1998 14:30:51 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Darrell Lewis <[log in to unmask]>
Subject: Re[2]: [TN] Reliability Risk related Electroless Nickel/imme
X-To: "Leslie O. Connally" <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit
We found out the supplier did some gold plating touch up, and got some
gold on the diode solder joints.
DDL
______________________________ Reply Separator _________________________________
Subject: Re: [TN] Reliability Risk related Electroless Nickel/immersi
Author: "Leslie O. Connally" <[log in to unmask]> at INTERNET
Date: 6/24/98 3:12 PM
Ken,
I experienced the same problem years ago. We traced the problem at that time to
gold porosity, allowing oxidation of the nickel. I don't recall the fix , but I
think we went to 50 microinches of electroplated Gold.
I dont know if this helps or not, Good Luck.
Les Connally
> From: Ken Patel <[log in to unmask]>, on 6/24/98 11:54 AM:
> On my electroless Nickel/immersion gold bare-board, I have seen few places
> with brown/copper looking surface. I have following questions in this
> regards.
>
> (1) Is it due to not having Nickel and gold going directly on the copper
> pads?
> (2) What is the reliability risk after the board assembled if above is
> correct
> I mean gold going directly on the copper pads?
> (3) We have specified immersion gold over Nickel. Looking the color which
> is not 100% copper looking, can immersion gold be plated/applied on
> copper or may be process might be changed to electrolytic gold?
>
> re,
> ken patel
> ______________________________________________________
> Ken Patel Phone: (408) 490-6804
> 1708 McCarthy Blvd. Fax: (408) 490-6859
> Milpitas, CA 95035 Beeper: (888) 769-1808
>
> ################################################################
> TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
> ################################################################
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> text in the body:
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> information.
> For technical support contact Hugo Scaramuzza at [log in to unmask] or
> 847-509-9700 ext.312
> ################################################################
>
>
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=========================================================================
Date: Wed, 24 Jun 1998 17:57:34 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: SPC software
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Cecilia,
We are reviewing the software calls "NWA Quality Analyst ver. 5.1". You can
download the demo file off their website (www.nwasoft.com).
I hope this would help you!
Ivan
IMS CORPORATION
SAN JOSE, CA
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=========================================================================
Date: Wed, 24 Jun 1998 15:08:13 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kenny Bloomquist <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kenny Bloomquist <[log in to unmask]>
Subject: Mil-Std-2000A Question
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Here is another one of those sticky DOD questions. We have an assembly, TH,
Mil-Std-2000A, that has been through assembly, test and conformal coat
(UR). As it was being plugged into an end item the operator noticed a
solder ball. How it was seen I'll never know because I can not see it
through a four power glass. That aside, under a microscope we were able to
find 10 or 12 "tiny" solder balls. None of them reduced the conductor with
below an acceptable spacing and all of them are encapsulated in conformal
coat.
Mil-Std-2000A - Paragraph 4.21.4 "Cleanliness of printed wiring, boards and
assemblies. Printed wiring, boards and assemblies shall be free of foreign
matter. This includes grease, silicones, flux residue, dirt, chips, SOLDER
BALLS, insulation residue and wire clippings."
My sensible self tells me that since these solder balls (micro-size) do not
reduce the conductor spacing and they are encapsulated in UR that we will
do more damage reworking these than leaving them alone. I would think that
this is a process indicator and not a real defect.
The Question: Does anyone out there in TechNet land have the specmanship to
work through this or am I all wet?
Thanks in advance for all responses.
Ken Bloomquist
Sr. Principal Process Eng.
PRIMEX Aerospace Company
[log in to unmask]
(425) 881-8990 ext. 6645
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=========================================================================
Date: Wed, 24 Jun 1998 16:56:07 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David D Hillman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David D Hillman <[log in to unmask]>
Subject: Re: void size specification for BGA's
X-To: Bev Christian <[log in to unmask]>
X-cc: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hi TechNet - Bev's comments are correct - the IPC JSTD 001 subtask group
under the direction of Les Hymes did meet at the IPC Expo Conference in
April. I don't have my notes on which void % values were selected but when
Jack Crawford gets back from vacation (he's out this week) he will be able
to pull up that data and post it on TechNet. There was quite a bit of
debate on the allowable void subject and there has been test data submitted
to the subtask group. The subtask group's recommendations will show up in
the next revision activity on JSTD-001 as a proposal in section 9.
Dave Hillman
Rockwell Collins
[log in to unmask]
Bev Christian <[log in to unmask]> on 06/24/98 02:18:50 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Bev Christian <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
Subject: Re: [TN] void size specification for BGA's
Friends,
We had a good discussion on this at the IPC meeting in Washington in a
session committee chaired by Les Hymes. There is no standard (yet), but it
looked like Celestica, Motorola and Honeywell may have the most info on
this. Motorola data suggests that voiding (within limits) is a good thing
in that the voids are crack arrestors. I did not make the equivalent
committee meeting in Long Beach, so I do not know where it went after that.
Jack? Anybody?
My guess is that we will end up with a standard allowing somewhere in the
15-25% range with a certain limitation of the size of any one void. I
would
really like to hear what others have to say on this now. I know this has
been discussed before, but perhaps now more people have some experience and
more reliability work has been completed.
regards,
Bev Christian
Nortel
> ----------
> From: Gabriela Bogdan[SMTP:[log in to unmask]]
> Sent: Wednesday, June 24, 1998 2:32 PM
> To: [log in to unmask]
> Subject: Re: [TN] void size specification for BGA's
>
> Ken Patel wrote:
>
> > Is there an IPC void size specification for BGA's detected by
> > transmission
> > X-ray or industry defecto standard?
> >
> > re,
> > ken patel
> > ______________________________________________________
> > Ken Patel Phone: (408) 490-6804
> > 1708 McCarthy Blvd. Fax: (408) 490-6859
> > Milpitas, CA 95035 Beeper: (888) 769-1808
> >
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>
> Ken,
> The only reference I know is on Bob Willis's site and in the last
> Bellcore 78 spec which states
> a ridiculous 1%.
> I am dying to find out other reasonable requirements too.
> Please include me in your mail.
> Gaby
>
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=========================================================================
Date: Wed, 24 Jun 1998 17:09:19 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMonagle, Michael R." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMonagle, Michael R." <[log in to unmask]>
Subject: Re: Mil-Std-2000A Question
X-To: Kenny Bloomquist <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
My first response would be that MIL-STD-2000 no longer exists.
It has been superceded for quite a while now by industry standards such
as IPC610 and ANSI-J. Those standards will state that if they do not
violate conductor spacing and are firmly attached (which conformal would
do a good job of), they are not a reject....
> -----Original Message-----
> From: Kenny Bloomquist [SMTP:[log in to unmask]]
> Sent: Wednesday, June 24, 1998 5:08 PM
> To: [log in to unmask]
> Subject: [TN] Mil-Std-2000A Question
>
> Here is another one of those sticky DOD questions. We have an
> assembly, TH,
> Mil-Std-2000A, that has been through assembly, test and conformal coat
> (UR). As it was being plugged into an end item the operator noticed a
> solder ball. How it was seen I'll never know because I can not see it
> through a four power glass. That aside, under a microscope we were
> able to
> find 10 or 12 "tiny" solder balls. None of them reduced the conductor
> with
> below an acceptable spacing and all of them are encapsulated in
> conformal
> coat.
>
> Mil-Std-2000A - Paragraph 4.21.4 "Cleanliness of printed wiring,
> boards and
> assemblies. Printed wiring, boards and assemblies shall be free of
> foreign
> matter. This includes grease, silicones, flux residue, dirt, chips,
> SOLDER
> BALLS, insulation residue and wire clippings."
>
> My sensible self tells me that since these solder balls (micro-size)
> do not
> reduce the conductor spacing and they are encapsulated in UR that we
> will
> do more damage reworking these than leaving them alone. I would think
> that
> this is a process indicator and not a real defect.
>
> The Question: Does anyone out there in TechNet land have the
> specmanship to
> work through this or am I all wet?
>
> Thanks in advance for all responses.
>
> Ken Bloomquist
> Sr. Principal Process Eng.
> PRIMEX Aerospace Company
> [log in to unmask]
> (425) 881-8990 ext. 6645
>
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> For technical support contact Hugo Scaramuzza at [log in to unmask] or
> 847-509-9700 ext.312
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=========================================================================
Date: Wed, 24 Jun 1998 15:29:38 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kenny Bloomquist <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kenny Bloomquist <[log in to unmask]>
Subject: Re: Mil-Std-2000A Question
X-To: "McMonagle, Michael R." <[log in to unmask]>
In-Reply-To: <1FCFB37739DAD111BC0B00805F48442B48BF40@HOUEXC3>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Thanks Michael but;
The customer has imposed 2000A and is not letting go of it yet. We have
basically transitioned to 001 but there are still a couple contracts that
we can't change.
At 05:09 PM 6/24/98 -0500, you wrote:
> My first response would be that MIL-STD-2000 no longer exists.
>It has been superceded for quite a while now by industry standards such
>as IPC610 and ANSI-J. Those standards will state that if they do not
>violate conductor spacing and are firmly attached (which conformal would
>do a good job of), they are not a reject....
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Date: Wed, 24 Jun 1998 16:28:49 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Punched Non-Supported Holes in FR-4
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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I am seeking information on acceptability criteria for punched holes
in FR-4 laminate. I have a problem with both single and double-sided
boards.
[log in to unmask]
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Date: Wed, 24 Jun 1998 18:10:28 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dave Pick -\"process engineer\"" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dave Pick -\"process engineer\"" <[log in to unmask]>
Subject: defect marking
MIME-version: 1.0
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I am looking for a temporary way to mark defects on a PCB assembly (other than
the red arrows that everyone uses). The boards will go back through a water
wash, so I was thinking a water soluable, non-conductive ink would be nice. Are
there any recommendations?
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Date: Thu, 25 Jun 1998 09:10:44 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Klasek <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Klasek <[log in to unmask]>
Subject: Re: ASSY: BGA sanity check
X-To: ETS <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Brian
Agree, the chiller you engage only when pushing limits , depends on top
load componentry .
Brian , enlighten me :
165, 175, 160 (dip?) , 160(why?), 185, 245, ?(no cooling?) .
Somehow my Indium profile looks different .
What is the reason for dwell on 160 2x, and how do you cool ?
With ALL bottom zones blowing ambient ; the separation is nice indeed .
Can you get me an info on what ( in 'C's ) is achievable ?
thanks
Paul Klasek
http://www.resmed.com
> ----------
> From: ETS[SMTP:[log in to unmask]]
> Sent: Thursday, 25 June 1998 2:10
> To: [log in to unmask]
> Subject: Re: [TN] ASSY: BGA sanity check
>
> Dear Jerry,
>
> As a reflow manufacturer of course I want to brag but I also do not
> blame
> you for your hesitation. The weight of most BGA's outwieghts the
> surface
> tension of the solder paste. However, as Mr. Klasek pointed out,
> reflow CAN
> be avoided on the bottom side of the board. I am sure that you have
> heard
> before that once solder has been reflowed once the melting point of
> that
> solder increases to a higher temperature. This is where I have to
> differ
> with Mr. Klasek, we have not found chillers to be necessary. After
> reflowing
> the BGA's on the top side and inverting the board, we run the assembly
> through an ETS CUREFLOW that has both top and bottom convection
> heating. We
> use a profile that uses standard temperatures on all 6 top zones
> (165C,
> 175C, 160C, 160C, 185C, 245C) and then set all bottom zones to ambient
> temperature (or room temperature). This creates differential heating
> on the
> assembly by heating the top side of the board and cooling the bottom
> side
> of the assembly. This creates a big enough temperature delta to keep
> the
> bottom side components from reflowing a second time.
>
> Of course this method requires two passes through the reflow oven
> whereas if
> all the BGA's where on the top of the board you might be able to
> solder both
> sides with a single pass through reflow.
>
> If you would like to discuss this further I can be contacted at
> [log in to unmask]
>
> Sincerely,
>
> Brian Stumm
>
>
>
>
>
> >Hello, TechNet....
> >
> >Soldering (inline convection furnace) BGA's on both sides of a board
> is
> >beyond my own experience, but it seems to violate a principle (at
> least an
> >imaginary one) related to the controlled collapse, or perhaps liquids
> under
> >tension.
> >
> >For a board design using 3 commercial BGA packages (PBGA 256,
> eutectic
> >balls on 1.27 mm pitch), am I obstinately blocking the path of
> progress by
> >requesting that this package style be confined to only one surface of
> a new
> >board design?
> >
> >If you are doing this today and it is a piece of cake, go ahead and
> brag;
> >but I would prefer to hear that caution is well advised, i.e. tales
> of
> >misery, shame and corporate disaster resulting from such mistakes.
> ;-)
> >
> >
> >cheers,
> >
> >
> >
> >
> >Jerry Cupples
> >Interphase Corporation
> >Dallas, TX USA
> >http://www.iphase.com
> >
> >################################################################
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> >For technical support contact Hugo Scaramuzza at [log in to unmask] or
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> >
> >
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=========================================================================
Date: Wed, 24 Jun 1998 18:39:48 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Mil-Std-2000A Question
X-To: [log in to unmask]
MIME-version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-transfer-encoding: quoted-printable
First I will assume that since this assembly is Through hole you don't=
=20
have terminations less than .020 in.( 5.3.7.4) If the solder ball=20
cannot be seen at 4X inspection it is not rejectable. 2000A requires=20
4X inspection with 10 power to be used for referee and identification=20
of the DEFECT identified at 4 power, if what you have seen is not=20
CLEARLY rejectable 2000A says it shall be accepted.(4.3.1) Since you=20
cannot see the solder balls at 4 power you do not have a defect. =20
______________________________ Reply Separator ____________________________=
_____
Subject: Re: [TN] Mil-Std-2000A Question
Author: MIME:[log in to unmask] at INTERNET
Date: 6/24/98 5:26 PM
My first response would be that MIL-STD-2000 no longer exists.
It has been superceded for quite a while now by industry standards such=20
as IPC610 and ANSI-J. Those standards will state that if they do not=20
violate conductor spacing and are firmly attached (which conformal would=20
do a good job of), they are not a reject....
=20
> -----Original Message-----
> From: Kenny Bloomquist [SMTP:[log in to unmask]]=20
> Sent: Wednesday, June 24, 1998 5:08 PM
> To: [log in to unmask]
> Subject: [TN] Mil-Std-2000A Question=20
>
> Here is another one of those sticky DOD questions. We have an=20
> assembly, TH,
> Mil-Std-2000A, that has been through assembly, test and conformal coat=20
> (UR). As it was being plugged into an end item the operator noticed a=20
> solder ball. How it was seen I'll never know because I can not see it=20
> through a four power glass. That aside, under a microscope we were
> able to
> find 10 or 12 "tiny" solder balls. None of them reduced the conductor=20
> with
> below an acceptable spacing and all of them are encapsulated in=20
> conformal
> coat.
>
> Mil-Std-2000A - Paragraph 4.21.4 "Cleanliness of printed wiring,=20
> boards and
> assemblies. Printed wiring, boards and assemblies shall be free of=20
> foreign
> matter. This includes grease, silicones, flux residue, dirt, chips,=20
> SOLDER
> BALLS, insulation residue and wire clippings."=20
>
> My sensible self tells me that since these solder balls (micro-size)=20
> do not
> reduce the conductor spacing and they are encapsulated in UR that we=20
> will
> do more damage reworking these than leaving them alone. I would think=20
> that
> this is a process indicator and not a real defect.=20
>
> The Question: Does anyone out there in TechNet land have the=20
> specmanship to
> work through this or am I all wet?=20
>
> Thanks in advance for all responses.=20
>
> Ken Bloomquist
> Sr. Principal Process Eng.
> PRIMEX Aerospace Company
> [log in to unmask]
> (425) 881-8990 ext. 6645
>
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> additional information.
> For technical support contact Hugo Scaramuzza at [log in to unmask] or=20
> 847-509-9700 ext.312
> ################################################################
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=20
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=20
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=========================================================================
Date: Wed, 24 Jun 1998 16:48:31 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ralph Hersey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ralph Hersey <[log in to unmask]>
Subject: Re: Measling/Crazing
X-To: "Chafin, Ken G." <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Hi Ken--
Chafin, Ken G. wrote:
> We have a FR-4 board (11" by 8" by 0.093") on which is mounted a large
> sink beneath two power transistors. When the screws which secure the
> transistors to the heat sink and to the board are torqued to 5
> inch-pounds, significant measling beneath the heat sink (visible from
> solder side) occurs when the board is flow soldered. When the torque is
> reduced to 3 inch-pounds the measling disappears.
>
> Does the above information suggest there is a problem here beyond a
> simple process problem which is addressed by reducing the torque from 5
> inch-pounds (which the drawing specifies) to 3 inch-pounds? (For the
> record, I don't know if this should be called measling or crazing--both
> the mechanical and thermal stress are required to produce the
> phenomenon.
>
> It seems odd that the relatively small amount of torque change could
> have such a dramatic effect--if the material is within specification
> limits and the flow solder process is close to optimal.
>
Per the current IPC-T-50, and IPC-A-600 terms and definitions, the condition you have would most
probably be "Haloing" and not "Crazing" or "Measling".
"Measles" only occur at the weave intersections of the glass-fabric reinforcement material and
are limited to the size of the intersection.
"Crazing" most frequently occurs due to mechanically induced stress and is somewhat "round" in
shape, crazing can also be thermally induced and is generally located between component lands
(see IPC-A-600 D (not the E) page 6).
"Haloing" by definition is "Mechanically-induced fracturing of delamination, on or below the
surface of a base material, that is usually exhibited by a light area around holes or other
machined features." (per IPC-T-50).
By you description, most probably, the product has a "whitish-like" or other light colored (with
respect to the color of the base material) in a radial pattern around the fastener.
In my previous (work) life, we experienced the same effect, either after flow soldering or after
product was used. This was due to heat transfer from the cooling sink or power semiconductor
through the fastener into the base material. The heat increased the stress/strains in the base
material around the fastener as well as changes the mechanical and other properties of the resin
system.
At the greater fastener torque, the insulative base material is under significant compressive
stress, when the heat from the flow soldering process is conducted into the base material, the
base material will stress relieve. As the resin (epoxy) softens due to temperature, the glass
fiber bundles will redistribute (tend to flatten out) due to the fastener's compressive stress,
and coupled with the reduced modulus of the resin. The resin will attempt to expand
isometrically, it can't due to the fastener, therefore there will be some radial displacement of
the resin away from the fastener. All this material movement results in shear stresses/strains
at the glass fiber/resin interface. The result is a change in the refractive index of light in
the base material due to the separation -- classic haloing.
At the lower fastener torque, the base material compression won't be quite as much, and is below
the threshold for causing haloing.
Reliability concern -- in general there should be no problems, use the IPC-A-600E's acceptance
criteria if there are no other requirements.
CAUTION -- EXCEPT if the fastener torque is being used to maintain either electrical continuity
or heat transfer between the members being mechanically joined. (In the application this might
be true -- the fasteners may be used to mount a power semiconductor to a heat sink, and the
printed board; and the fastener is also being used to maintain electrical conductivity between
the semiconductors case and conductive patterns.
It is very poor design practice to use any plastic materials for any mechanical connections that
are required for either electrical or heat transfer applications, unless a spring washer is used
to ensure there is sufficient compliance in the joint members. A "Bellville" or other "spring
washer" will ensure the desired fastener tension is maintained due to thermal
expansion/contractions, and plastic flow of base materials under the operating conditions and for
the life expectancy of the product.
If the design is using the mechanical fasteners for electrical and/or thermal design
consideration, there will be a latent failure problem whether you have haloing or not.
Ralph Hersey
Ralph Hersey & Associates
3885 Mills Way
Livermore, CA 94550-3319
PHN/FAX: 925.454.9805
e-mail: [log in to unmask]
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=========================================================================
Date: Wed, 24 Jun 1998 16:51:18 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ralph Hersey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ralph Hersey <[log in to unmask]>
Subject: Re: Punched Non-Supported Holes in FR-4
X-To: [log in to unmask]
MIME-Version: 1.0
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Bruce
Look in the IPC-A-600E, Section 3.5, "Plated-Through Holes, Punched", page 87.
[log in to unmask] wrote:
> I am seeking information on acceptability criteria for punched holes
> in FR-4 laminate. I have a problem with both single and double-sided
> boards.
>
> [log in to unmask]
>
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--
Ralph Hersey
Ralph Hersey & Associates
3885 Mills Way
Livermore, CA 94550-3319
PHN/FAX: 925.454.9805
e-mail: [log in to unmask]
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=========================================================================
Date: Wed, 24 Jun 1998 20:02:18 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rob Schetty <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rob Schetty <[log in to unmask]>
Subject: Re: Chip Termination Finish
X-To: Tom Lambert <[log in to unmask]>
There are a multitude of reference sources showing that tin-lead plated
terminations are much better than solder dipped.
Rob Schetty
LeaRonal Inc
Freeport, NY USA
-----Original Message-----
From: Tom Lambert <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Wednesday, June 24, 1998 1:16 PM
Subject: [TN] Chip Termination Finish
>Hi Folks : I just know many of you out there have knowledge re termination
>finish of chip parts to pass along. Specifically - is "hot solder dip" any
>better/worse than "solder plate" ?? Thanx.
>
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=========================================================================
Date: Wed, 24 Jun 1998 21:00:44 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: ASSY: BGA sanity check
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Regarding populating both sides of the board with BGAs, I think Bev Christian
summed it up pretty well. If you meet the parameters she mentioned, you
should be fine with most PBGAs. The formula I use for calculating what will
stay in place when re-reflowed is the sum of the lead (or collapsed sphere)
surface area (all interconnects on the device) divided by the weight of the
component in grams. If it comes out to less than 30 grams/ sq in, the
component will stay on as there is ample surface tension. (Note, most ceramic
BGAs or CGAs exceed this ratio).
You sure don't need "differential heating" and you can do it on ANY reflow
oven (not just an ETS whoopee-flow or whatever) that, as Bev mentioned, has a
smooth running, edge conveyor
HOWEVER........
As Jerry Cupples wisely insinuates - beware when you do populate both sides
with these. Remember to allow room for removal and replacement (Design for
Repairability 101) ! We don't live in a perfect world, you know.
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=========================================================================
Date: Thu, 25 Jun 1998 09:02:34 PST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, tgyee <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tgyee <[log in to unmask]>
Subject: Automated Taping Machine
Hi All,
I am in search of an automated taping machine. It is to be used to
tape the gold tips part of the pcb in processes which we don't want
the tips to be exposed. If anyone have any sources please let me know.
Thank you.
Regards
TG Yee
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=========================================================================
Date: Wed, 24 Jun 1998 18:10:04 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
My Nguyen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: My Nguyen <[log in to unmask]>
Subject: CP642 vs Micron 32mm carrier tape
MIME-Version: 1.0
Content-Type: text/plain
We are currently dealing with a serious problem while running 32mm carrier
tape on CP642. The components are 8x2 SDRAM TSOP44. For every 5000 DRAM,
we used to have 30-50 of them missing due to miss-pick (or other problems
which we have not figured out yet). These components either being cut by
the cutter plate or trashed away to the trash-box and end up we lost them.
Do any one have the same problem and know how to fix them? Because when we
call Micron guys, they said that if only one customer complain things that
they never heard, then it is not sufficient enough for them to change their
vendor...
Please advise!!!
My Nguyen
Viking Components Inc.
Rancho Santa Margarita, CA 92688
(714) 643 7255 @374
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=========================================================================
Date: Wed, 24 Jun 1998 22:22:04 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: CP642 vs Micron 32mm carrier tape
X-To: [log in to unmask]
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Content-transfer-encoding: 7bit
In a message dated 6/24/98 6:24:19 PM Pacific Daylight Time,
[log in to unmask] writes:
> We are currently dealing with a serious problem while running 32mm carrier
> tape on CP642. The components are 8x2 SDRAM TSOP44. For every 5000 DRAM,
> we used to have 30-50 of them missing due to miss-pick (or other problems
> which we have not figured out yet). These components either being cut by
> the cutter plate or trashed away to the trash-box and end up we lost them.
>
> Do any one have the same problem and know how to fix them? Because when we
> call Micron guys, they said that if only one customer complain things that
> they never heard, then it is not sufficient enough for them to change their
> vendor...
>
> Please advise!!!
>
> My Nguyen
> Viking Components Inc.
> Rancho Santa Margarita, CA 92688
> (714) 643 7255 @374
>
Hello My,
When you say you're missing 30-50 of them per reel, are you getting those
numbers from doing the math on how many SIMM's or Modules you should have
built based on the number of components that were given to you, or are those
the numbers coming from the MCS when you look at the management data? The
reason I ask that is because if your operators are loading the feeders and not
advancing the first part of the reel up to the pick-up point, you'll get over-
inflated mispicks being logged while the machine is indexing the feeder with
all those empty pockets until a part is presented that the machine can pick.
Another thing that you can check if you already haven't, is the sharpness
of the cutter blades at the waste tape cutter. If they're not making a clean
cut, the tape will sometimes "furl-up" and not guide into the cutter area very
well. This causes the tape from being advanced properly and many times causes
the feeder to become mis-indexed throwing everything a half-pitch off...that's
when you hear the _KA-CHUNK_ of the blades slicing and a dicing them DRAM's
in half...better than a Ginsu knife I would say!! (GRIN) I'd just about bet
that if you say you're seeing disected DRAM's in your waste tape box, then
it's been cutting DRAM's like that fer a while, and them blades won't stay
sharp for long doing that...
Another area to check is that sometimes I've found that some tape and
reel houses will use masking tape to secure the end of the tape on to the
center hub of the reel when winding it all up on the reel, instead of using
the little slot at the center hub to stuff the end of tape into. Sure, masking
tape works good to keep the end on the reel when you're winding it up, but
when you've got it on the machine and you're coming to the end of the reel,
the tape adhesive can sometimes be so strong that it won't release the tape at
the end, which again causes the feeder to mis-index and put the pick-up a half
a pitch off...KA-CHUNK!! Whenever I've found that, I watch the feeder pretty
close and when it gets down towards the end, I'll pause the machine and loosen
that masking tape up, or rip it off so when the feeder indexes, it doesn't
have the added force of pulling the parts AND the masking tape from the center
hub.
One last, area to check, is that I've had operators change the stop-
blocks that set the pitch in the feeders without telling anybody, and come to
find out that it was the wrong pitch for the component...but if that happens,
you'll be missing more than just 50 parts out of 5,000...normally, it'll pick
one part, and throw the next one away, pick one part, waste the next one, and
so on, and so forth...
-Steve Gregory-
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Date: Thu, 25 Jun 1998 04:44:00 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
SMITH RUSSELL MSM PO US <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: SMITH RUSSELL MSM PO US <[log in to unmask]>
Subject: Re: Cleaning Process after Electroless copper
X-To: Jacob Ransborg <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain
Try using a hot DI rinse with a ph of no less than 4 for a final rinse,
cut the last h2so4 dip down to 3% and monitor the turnovers in the bath
you should be able to get a very nice bright pink surface where you
don't need any surface treatment before subsequent processing.
Russ
----------
From: Jacob Ransborg
To: [log in to unmask]
Subject: [TN] Cleaning Process after Electroless copper
Date: Thursday, June 18, 1998 1:04AM
Hi technetters
I would like to hear if anybody have experience wtith a cleaning process
of
PCB-boards after plating with electroless copper. Does anybody brush the
boards or use a chemical treatment etc.
Regards
Jacob Ransborg
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Date: Thu, 25 Jun 1998 11:19:18 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Benedicto Cruz <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
Comments: Authenticated sender is <bcruz@[192.1.1.215]>
From: Benedicto Cruz <[log in to unmask]>
Subject: see items stated
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Hi!
I would like to ask for an effective stencil aperture design for
fine-pitch ICs. We are encountering some solder bridging on these
ICs. Also, there are solder balls present beside these components.
Do you have any stencil design guidelines that you could share with
us to improve our Screen Print Process?
Also, Are you familiar with intrusive reflow? Can anyone share some
informaiton about this?
We also have a product that uses a MELF SMD resistor. The problem
that we are encountering is that this component rolls during solder
paste curing. So when it comes out, the component is already
misaligned. Do you have any suggestions to control this without using
any fixtures?
Thanks.
Regards.
Jon Cruz
Electronic Assemblies Inc.
Manila, Philippines
e-mail: [log in to unmask]
Tel #: 823-7317/7593885
Fax #: 7538629
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Date: Thu, 25 Jun 1998 08:06:20 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Gabriela Bogdan <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gabriela Bogdan <[log in to unmask]>
Subject: solder mask between pads part2
MIME-Version: 1.0
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Hi. TechNetters!
Thank you all for your reply!
As you see, everybody has his reasons to apply it or not.
I would like to extend my question to those who specify electroless
AU/NI on the smt pads.
Depending on artwork and plating process control of different PCB
vendors, we have seen
shadow plating on the base material and solder mask ONLY on the 16 mil
-which is the smallest we have right now.
1.When shadow plating extends so much, is it possible that it
contributes to shorts ?
2.Without the dam, there is no shadow plating, but will we expect
difficulties in our assembly
process?
3.Do we play safe by changing the artwork for 16mil pitch GOLD FINISH?
Thank you,
Gaby
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Date: Thu, 25 Jun 1998 08:15:35 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Johannes Sivula <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Johannes Sivula <[log in to unmask]>
Subject: alternatives for pth
---------------------- Forwarded by Johannes Sivula/MARTIS on 06/25/98
09:17 AM ---------------------------
(Embedded
image moved [log in to unmask]
to file: 06/24/98 09:12 AM
PIC08161.PCX)
To: [log in to unmask]
cc: (bcc: Johannes Sivula/MARTIS)
Subject: alternatives for pth
Hello,
I work for Xerox in Europe. We produce power supplies and are
interested in alternatives for plated through holes. I understand that
there is an alternative called "easyhole" produced by a company in
spain. There is a nickel connection between the upper and bottomside
of the PCB. This nickel is then HAL-ed to give a good soldering
result. Do you know about it, any comments or remarks? any alternatives?
regards, Mart hillebrandt.([log in to unmask])
Project manager Xerox Fred Zegers Process engineer Xerox.
(UUEncoded file named: PIC08161.PCX follows)
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end
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=========================================================================
Date: Thu, 25 Jun 1998 10:17:47 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Johannes Sivula <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Johannes Sivula <[log in to unmask]>
Subject: Polyimide See Thru Stencils for Printing Solder Paste
Following mail was posted by Russ M on June 23, 1998 at 11:27:37: to
http://www.smtnet.com/smt_forum/smt_mail.html
Has anyone seen/used these yet? They seem to have lower
coefficient of friction
for release of paste and less wear and tear as well as
conforming to the board better
(plastic has better memory than stainless). Also there is no mesh
so a larger
image can be put in a smaller stencil size. But, the best is that
you can see through
the stencil for manual and semi-automatic printer alignment and
reduce set up and changeover times.
Anyone familiar with these?
How long do they last?
---------------------------------------------------------------------------
----------------------------------------------------------
Any comments ?
brs, Johannes
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Date: Thu, 25 Jun 1998 08:09:33 +-300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Dudi Banitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dudi Banitt <[log in to unmask]>
Subject: Re: defect marking
MIME-Version: 1.0
Content-Type: multipart/mixed; boundary="---- =_NextPart_000_01BDA030.6ECF5DC0"
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Content-Transfer-Encoding: quoted-printable
Dave
You can use the same markers used in AOI for marking the boards, it =
seems they do the job and are pretty well removable.
David Banitt
----------
From: Dave Pick -"process engineer"[SMTP:[log in to unmask]]
Sent: =E9=E5=ED =E7=EE=E9=F9=E9, =E9=E5=F0=E9 25, 1998 03:10
To: [log in to unmask]
Subject: [TN] defect marking
I am looking for a temporary way to mark defects on a PCB assembly =
(other than
the red arrows that everyone uses). The boards will go back through a =
water
wash, so I was thinking a water soluable, non-conductive ink would be =
nice. Are
there any recommendations?
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AHAKhR+yGGEkwdUDYHcjcmEFQGUeYFwQxwIgEnAfcXMpLkzQIlfXJXADEAMgZyPwYgDQMjDjH7AD
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aTHRZfElcAhgbCDw/mIScAMAMqBh4AcQHnZewt8ScABwI8AYYAWgbQeAJKClYNBpAiBzP1Z8I2zP
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giZmciFbkRFwaUGP8X164HBb0QVAZ8EBkCwBSBtjwCPwUx8wW/BtdXqeeluAYNEE8ArAaHV99wEF
sTg0Ny01MDk4LTk3KSAy4H+QLjP8MTKGr5fPmN+Z73CYmz+/Vx9YL1k/LAEKhReBAKDAAAAAAwAQ
EAAAAAADABEQAAAAAEAABzAg5uY+95+9AUAACDAg5uY+95+9AR4APQABAAAABQAAAFJFOiAAAAAA
O/A=
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=========================================================================
Date: Thu, 25 Jun 1998 12:08:07 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Eltek Ltd. - Process Engineering" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Eltek Ltd. - Process Engineering" <[log in to unmask]>
Subject: Re: Solder mask between fine pitch pads
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
At 13:07 24/06/98 -0700, you wrote:
>Gabriela Bogdan wrote:
>>
>> Hi, TechNetters!
>> Could you please share with me your experience about pro and con's
>> regarding solder mask
>> between fine pitch-16mil- pads in relation to the finish of the PCB pads
>> ?
>> Not being greedy, I'll save the next question for after some answers.
>> Thank you,
>> Gaby
>>
Gaby ,
Untill now you got answers from assembly peoples and not from manufacturing
area .
Limitations on solder mask between fine pitches are coming mainly from image
transfer :
1 ) resolution of photoimagible solder mask : depends on solder mask itself
, exposure system and artwork . Generally ,( depends on type of soldermask
used ) , soldermask is lower than pads , so there is always gape between
soldermask and the artwork ( contrary to circuitry photoresist , that is in
contact with artwork ) .
2 ) registration problems : circuitry registration is according to drilled
holes , soldermask according to circuitry . Add to this type of artwork :
first generation or diazo and coresponding dimensional stability of the
artwork .
3 ) adhesion of " soldermask dam " to dielectic base depends also on width
of the " dam " . Neglecticing of this point will lead to " washing out " of
soldermask in developing stage ,during solder ( HASL ) application or even
during assembly .
These points should be known to each PCB manufacturer , otherwise he will
supply PCB without " dams " or with " dams " on SMT pads .
Regards
Edward
Edward Szpruch
Eltek Ltd - Israel
Tel 972 3 9395050
Fax 972 3 9309581
E-mail : [log in to unmask]
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=========================================================================
Date: Thu, 25 Jun 1998 10:54:31 +0100
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Keith Baverstock <[log in to unmask]>
Subject: Soldermask flaking in immersion gold process
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-Transfer-Encoding: 7bit
Can anyone help...
It is well known that LPI soldermask can be problematic when put through
immersion nickel/gold process.
What 'fixes' are being used?
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Date: Thu, 25 Jun 1998 12:45:16 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
=?iso-8859-1?Q?Jesper_Kj=E6rnulf_Konge?= <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: =?iso-8859-1?Q?Jesper_Kj=E6rnulf_Konge?= <[log in to unmask]>
Subject: Nitrogen in the wavesolderingproces
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_01AD_01BDA037.1A771860"
This is a multi-part message in MIME format.
------=_NextPart_000_01AD_01BDA037.1A771860
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
At our factory we are going to have a new waesolderingmachine with =
nitrogensupport. But our director dosen't think that we need the =
nitrogen because it has no effect compared to the price that we have to =
pay. But in me department we dosen't aggree.
I would like to hear about your experience with nitrogen so that we =
can tell our director that it isn't just us that thinks that nitrogen =
soldering is good. And if anyone has a meaning about the Seho MWS-8200 =
PWR i would like to hear that too.
With Regards=20
Jesper Konge
Danica Supply A/S
Denmark
Mail : [log in to unmask]
------=_NextPart_000_01AD_01BDA037.1A771860
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD W3 HTML//EN">
<HTML>
<HEAD>
<META content=3Dtext/html;charset=3Diso-8859-1 =
http-equiv=3DContent-Type>
<META content=3D'"MSHTML 4.71.2016.0"' name=3DGENERATOR>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2> At our factory we are going to =
have a new=20
waesolderingmachine with nitrogensupport. But our director dosen't think =
that we=20
need the nitrogen because it has no effect compared to the price that we =
have to=20
pay. But in me department we dosen't aggree.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2> I would like to hear about your =
experience=20
with nitrogen so that we can tell our director that it isn't just us =
that thinks=20
that nitrogen soldering is good. And if anyone has a meaning about the=20
<EM><STRONG>Seho MWS-8200 PWR</STRONG></EM> i would like to hear that=20
too.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>With Regards </FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT><FONT color=3D#000000 =
face=3DArial size=3D2>Jesper=20
Konge</FONT></DIV>
<DIV><FONT color=3D#000000 face=3DArial size=3D2></FONT><FONT =
face=3DArial size=3D2>Danica=20
Supply A/S</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Denmark</FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Mail : <A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A></FONT=
></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV></BODY></HTML>
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Date: Thu, 25 Jun 1998 08:42:06 -0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Collins, Graham" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Collins, Graham" <[log in to unmask]>
Subject: Re: Measling/Crazing
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Ralph, Ken
The other thing to consider is that as the base material stress relieves /
subsides, the fastener is no longer at the spec'd torque.
The process I prefer to use for this sort of application is to put the
fastener on hand tight, wave solder, and then torque after wave. One can
avoid the haloing and have the fastener at the required torque this way.
regards,
Graham Collins
Process Engineer
Litton Systems Canada, Halifax Facility
-----Original Message-----
From: Ralph Hersey [mailto:[log in to unmask]]
Sent: Wednesday, June 24, 1998 8:49 PM
To: [log in to unmask]
Subject: Re: [TN] Measling/Crazing
Hi Ken--
Chafin, Ken G. wrote:
> We have a FR-4 board (11" by 8" by 0.093") on which is mounted a large
> sink beneath two power transistors. When the screws which secure the
> transistors to the heat sink and to the board are torqued to 5
> inch-pounds, significant measling beneath the heat sink (visible from
> solder side) occurs when the board is flow soldered. When the torque is
> reduced to 3 inch-pounds the measling disappears.
>
> Does the above information suggest there is a problem here beyond a
> simple process problem which is addressed by reducing the torque from 5
> inch-pounds (which the drawing specifies) to 3 inch-pounds? (For the
> record, I don't know if this should be called measling or crazing--both
> the mechanical and thermal stress are required to produce the
> phenomenon.
>
> It seems odd that the relatively small amount of torque change could
> have such a dramatic effect--if the material is within specification
> limits and the flow solder process is close to optimal.
>
Per the current IPC-T-50, and IPC-A-600 terms and definitions, the condition
you have would most
probably be "Haloing" and not "Crazing" or "Measling".
"Measles" only occur at the weave intersections of the glass-fabric
reinforcement material and
are limited to the size of the intersection.
"Crazing" most frequently occurs due to mechanically induced stress and is
somewhat "round" in
shape, crazing can also be thermally induced and is generally located
between component lands
(see IPC-A-600 D (not the E) page 6).
"Haloing" by definition is "Mechanically-induced fracturing of delamination,
on or below the
surface of a base material, that is usually exhibited by a light area around
holes or other
machined features." (per IPC-T-50).
By you description, most probably, the product has a "whitish-like" or other
light colored (with
respect to the color of the base material) in a radial pattern around the
fastener.
In my previous (work) life, we experienced the same effect, either after
flow soldering or after
product was used. This was due to heat transfer from the cooling sink or
power semiconductor
through the fastener into the base material. The heat increased the
stress/strains in the base
material around the fastener as well as changes the mechanical and other
properties of the resin
system.
At the greater fastener torque, the insulative base material is under
significant compressive
stress, when the heat from the flow soldering process is conducted into the
base material, the
base material will stress relieve. As the resin (epoxy) softens due to
temperature, the glass
fiber bundles will redistribute (tend to flatten out) due to the fastener's
compressive stress,
and coupled with the reduced modulus of the resin. The resin will attempt
to expand
isometrically, it can't due to the fastener, therefore there will be some
radial displacement of
the resin away from the fastener. All this material movement results in
shear stresses/strains
at the glass fiber/resin interface. The result is a change in the
refractive index of light in
the base material due to the separation -- classic haloing.
At the lower fastener torque, the base material compression won't be quite
as much, and is below
the threshold for causing haloing.
Reliability concern -- in general there should be no problems, use the
IPC-A-600E's acceptance
criteria if there are no other requirements.
CAUTION -- EXCEPT if the fastener torque is being used to maintain either
electrical continuity
or heat transfer between the members being mechanically joined. (In the
application this might
be true -- the fasteners may be used to mount a power semiconductor to a
heat sink, and the
printed board; and the fastener is also being used to maintain electrical
conductivity between
the semiconductors case and conductive patterns.
It is very poor design practice to use any plastic materials for any
mechanical connections that
are required for either electrical or heat transfer applications, unless a
spring washer is used
to ensure there is sufficient compliance in the joint members. A
"Bellville" or other "spring
washer" will ensure the desired fastener tension is maintained due to
thermal
expansion/contractions, and plastic flow of base materials under the
operating conditions and for
the life expectancy of the product.
If the design is using the mechanical fasteners for electrical and/or
thermal design
consideration, there will be a latent failure problem whether you have
haloing or not.
Ralph Hersey
Ralph Hersey & Associates
3885 Mills Way
Livermore, CA 94550-3319
PHN/FAX: 925.454.9805
e-mail: [log in to unmask]
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=========================================================================
Date: Thu, 25 Jun 1998 07:01:28 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMonagle, Michael R." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMonagle, Michael R." <[log in to unmask]>
Subject: Re: defect marking
X-To: "Dave Pick -\"process engineer\"" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Metron Optics (619-755-4477) makes a squeeze type marking pen that
dispenses a small colored dot. It comes in solvent and aqueous wash
versions.
> -----Original Message-----
> From: Dave Pick -"process engineer" [SMTP:[log in to unmask]]
> Sent: Wednesday, June 24, 1998 7:10 PM
> To: [log in to unmask]
> Subject: [TN] defect marking
>
> I am looking for a temporary way to mark defects on a PCB assembly
> (other than
> the red arrows that everyone uses). The boards will go back through a
> water
> wash, so I was thinking a water soluable, non-conductive ink would be
> nice. Are
> there any recommendations?
>
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> ################################################################
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=========================================================================
Date: Thu, 25 Jun 1998 07:29:38 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Coleman, Rob" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Coleman, Rob" <[log in to unmask]>
Subject: Re: Automated Taping Machine
X-To: tgyee <[log in to unmask]>
We have been using a Western Magnum Tapemaster Mark IV automated taping
machine with great success.
-----Original Message-----
From: tgyee <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Wednesday, June 24, 1998 8:11 PM
Subject: [TN] Automated Taping Machine
> Hi All,
> I am in search of an automated taping machine. It is to be used to
> tape the gold tips part of the pcb in processes which we don't want
> the tips to be exposed. If anyone have any sources please let me know.
> Thank you.
>
> Regards
> TG Yee
>
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=========================================================================
Date: Thu, 25 Jun 1998 07:33:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Coleman, Rob" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Coleman, Rob" <[log in to unmask]>
Subject: Re: Soldermask flaking in immersion gold process
X-To: [log in to unmask]
Most LPI suppliers now provide different catalyst that are more chemically
resistant to immersion gold process. Contact your supplier for specific
catalyst.
-----Original Message-----
From: Keith Baverstock <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Thursday, June 25, 1998 5:05 AM
Subject: [TN] Soldermask flaking in immersion gold process
>Can anyone help...
>
>It is well known that LPI soldermask can be problematic when put through
>immersion nickel/gold process.
>
>What 'fixes' are being used?
>
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=========================================================================
Date: Thu, 25 Jun 1998 09:10:38 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Nitrogen in the wavesolderingproces
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
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Hi Jesper -
I thought you had inexpensive nitrogen (relative to the rest of the world) in
Denmark.
Regardless, though I am not a big fan of inerting the reflow process, it is a
different matter in wavesoldering. I would think you could recover the cost
of the nitrogen through your savings in reduction of dross alone. And it does
improve the surface tension of the solder to the interconnects. Soltec has
some excellent papers on the subject as does Electrovert. Contact them if
Seho can't give you some adequate data.
Phil Zarrow
ITM, Inc.
Durham, NH USA
www.ITM-SMT.com
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=========================================================================
Date: Thu, 25 Jun 1998 09:10:37 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: intrusive reflow and all
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Hi Jon -
If you check out my website (www.ITM-SMT.com) under "Articles", you will see
an article I did on Reflow of Through-hole (Intrusive Reflow). Hope this
helps.
Regarding design guidelines for fine-pitch - I recommend Vern Solberg's design
guideline book as well as Jim Blankenhorn's (from SMTPlus). But if you have a
solderball problem, there can be a dozen causes other than the stencil
aperture. Improper reflow profile, bad solder paste, are among the myriad of
causes of solder balls. Bridging is the same - check out the stencil design
but be more concerned about the solder paste and printing process and printer
parameters.
With the MELF, there is an aperture design that is somewhat "U" shaped that
cradles the MELF in the solder paste. Your stencil designer should know about
this.
Hope this helps.
Phil Zarrow
ITM, Inc.
Durham, NH USA
www.ITM-SMT.com
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=========================================================================
Date: Thu, 25 Jun 1998 09:25:01 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Bob Walker <[log in to unmask]>
Subject: PWB Layer Stack-up
Hi All,
I have a question concerning the layer stack-up of a board that I am
designing for an engineer who is concerned about the voltage isolation
provided by the pre-preg material between the layers. The design is for a
power supply board that will be 4 layers/0.094" thick with 2 oz. copper
on all layers and will contain max voltages of 240 VAC. It also must meet
certain CE agency guidelines. He feels that the pre-preg material doesn't
provide the voltage isolation needed that FR-4 provides. So to maintain
certain high voltage clearances, he wants to fabricate the board with 2
double-sided copper clad laminates and use pre-preg between layers 2 & 3.
Some other sources tell me that pre-preg contains the same
characteristics of FR-4 when cured and thus the cost of the board would
be less if 1 double-sided copper clad laminate was used with foil on each
of the outside layers and pre-preg being used between layers 1 & 2 and 3
& 4. Is this true and can anyone supply me with technical info comparing
FR-4 to pre-preg materials and also help me in understanding the most
cost effective way to fabricate this board. He would also like to use
more than 2 oz. copper, but I'm told that 2 oz. is more common than 3
oz., so we are making every effort to use 2 oz. unless someone can tell
me of a process that is available that will not add too much cost to the
board and provide a higher copper content. Any help would be greatly
apprreciated.
Regards,
Bob Walker
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Date: Thu, 25 Jun 1998 09:42:44 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re2000A
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Hi Kenny:
- You are correct in your understanding of the application of Mil-Std-2000A.
Since you are obligated to produce hardware i/a/w 2000A it would be best to
identify the solder balls as a "Defect." Then, take the defect into. to an
MRB, and (with your customer present) conclude in the MRB that the sentence in
par. 4.4 which says "Table 1 defects shall not be dispositioned "use as is.""
should not be applied to this defect. If the conditions are as you described,
there would seem to be no logical reason to proceed with a repair. Once upon
a time (back when Mil-Std Category A's roamed the world) there was a person to
whom you could appeal such things based on technical merit, unfortunately that
condition no longer exists and you need to work something out with your
customer.
Hope the above helps some, if not - contact me direct and we can discuss
alternatives.
Jim Moffitt, Moffitt Enterprises
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Date: Thu, 25 Jun 1998 23:04:29 +0900
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jae-heun Joung <[log in to unmask]>
Subject: materials ?
MIME-Version: 1.0
Content-Type: text/plain; charset=EUC-KR; name="mail.txt"
Content-Transfer-Encoding: quoted-printable
Hi All,
I am designing concerned about build-up board.
We are making every effort to use micro via.
Can anyone supply me with MATERIALS, that is good for registration.
that is available that will not add too much cost to the
board and provide a good registration.
Any help would be greatly apprreciated.
BEST REGARDS,
JJH
[log in to unmask]
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Date: Thu, 25 Jun 1998 10:10:14 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Blanchet, Richard" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Blanchet, Richard" <[log in to unmask]>
Subject: Re: Fab: plug vias
MIME-Version: 1.0
Content-Type: text/plain
LPI
Richard Blanchet
Process Engineer, screening
Viasystems Canada Inc.
tel.: (514) 694-8900, ext. 4189
fax: (514) 694-9776
[log in to unmask]
> -----Original Message-----
> From: Afri Singh [SMTP:[log in to unmask]]
> Sent: 23 juin, 1998 18:49
> To: TechNet E-Mail Forum.; Blanchet, Richard
> Subject: Re: [TN] Fab: plug vias
>
> Is this thermal,UV or LPI ink ?
>
> On Tue, 23 Jun 1998, Blanchet, Richard wrote:
>
> > Hello,
> >
> > If the solder mask in the vias has been cured (full plug), is there
> any
> > way to remove it without damaging the boards ? There's no solder
> mask
> > on the surface beside in the vias. Thanks.
> >
> >
> > Richard Blanchet
> > Process Engineer, screening
> > Viasystems Canada Inc.
> > tel.: (514) 694-8900, ext. 4189
> > fax: (514) 694-9776
> > [log in to unmask]
> >
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> additional information.
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> >
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Date: Thu, 25 Jun 1998 10:16:36 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ed Holton <[log in to unmask]>
Subject: Re: Nitrogen in the wavesolderingproces
X-To: [log in to unmask]
Mime-Version: 1.0
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I have installed five SEHO full tunnel wave solder machines in the past
three years, four of these systems replaced older (at least 10 years) open
air Electrovert machines. Both systems are dual wave. I have found that
the dross savings basically pay for the cost of the nitrogen.
Approximately 2/3 of the solder purchased (by wt) was sent out as dross (by
wt) and we used the Alpha Hi-Flo solder. (Please note, the use of company
names on equipment or solder is not an endorsement, names are mentioned
only ensure that all details are understood).
One of the cost savings you will realize are reduced maintenance time.
With the open air machine, you have to de-dross every day. With the Seho
machines, depending on use, you have to de-dross much less, i.e. once per
week to twice per month, plus, the amount of dross generated is less, you
do not get the thick layer of dross in the N2 machine that you do in the
open air machine. Before I bought the first SEHO machine, I spoke to a
user who had yet to fill a 5 gal pail with dross, and they were running 1.5
shifts over a 1 year time frame. An intangible cost, but a factor to
consider, is the less you have to work on the machine, i.e. take apart
nozzles, lower the solder pot, etc, the less opportunity for variables to
change, thus a more repeatable process.
Other benefits of the nitrogen: Nitrogen opens up the process window,
especially in a no-clean process! Defect rates dropped when we switched to
nitrogen (but then again, there was also a ten year leap in machine
models). Wetting appears to be better, less flux is needed. For example,
the spray fluxer was turned off accidentally and single sided boards were
built all morning before someone noticed the fluxer was off. The soldering
on these boards looked great!
Nitrogen may also permit you to use a different grade of solder. With open
air systems, I have always used the Alpha Hi-Flo to reduce the dross as
much as possible. With my latest full tunnel machine, I have switched to
Alpha Vaculloy, a significant cost reduction in solder price, and have
noticed no significant increases in dross between the Hi-Flo and Vaculloy
when used in the full tunnel system, however, I only have 6 months of
comparison thus far. ( Only use pure solder, watch out for those bargain
brands!!!)
The air flow in the closed tunnel machines is less than the older models I
replaced. I am now able to vent the wave solder systems in the plant, thru
a filtration unit. This is also possible with newer models of other
vendors. By venting inside the factory, you now have significant cost
reductions in the factory air, less make up air required, less air to
"condition" to maintain at temp. and humidity. I have also noticed that
during the winter, the operators find the air coming from the fume
extractor exhaust is a dandy hand warmer!!!
So, from a cost analysis view (in my opinion and research):
The reduced dross pays for the nitrogen(1:1 swap)
Improved quality of process
Less maintenance time
Process repeatability improved because of fewer changes to the machine
during the process
Reduced amount of flux used
Lower solder cost by using a different grade of solder
As an added note: I now have a pallet style wave solder machine in place,
the previous four were all finger conveyors with an adjustable rail. To
clean the solder pot/solder nozzles of the finger conveyor machines, you
have to lower the solder pot. With the pallet conveyor system, I can
remove the nozzles from inside the machine, I do not need to lower the
solder pot. One less variable to consider, adjusting the wave height
because the solder pot did not go back to its original height! The
maintenance time on these systems is much less than I have experienced on
other wave solder machines in the past.
ADDITIONAL INFORMATION!!!
Matte finish solder mask vs gloss finish solder mask and solder balls!
I use a no clean process, nitrogen and gloss finish solder mask and had
solder balls (very small) I could not get rid of the solder balls, despite
varying the amount of flux, preheat etc. I even had solder balls with
no-flux! When we switched to a matte finish solder mask, the solder balls
disappeared. Both styles of boards were run thru, side by side, in the
same pallet, and the difference in solder balls was amazing. No solder
balls at all with the matte finish!
Ed Holton
Manufacturing Engineer
Hella Electronics
734-414-0944
[log in to unmask] on 06/25/98 06:45:16 AM
Please respond to [log in to unmask]; Please respond to
[log in to unmask]
To: [log in to unmask]
cc: (bcc: Ed Holton/Hella North America Inc.)
Subject: [TN] Nitrogen in the wavesolderingproces
At our factory we are going to have a new waesolderingmachine with
nitrogensupport. But our director dosen't think that we need the nitrogen
because it has no effect compared to the price that we have to pay. But
in me department we dosen't aggree.
I would like to hear about your experience with nitrogen so that we can
tell our director that it isn't just us that thinks that nitrogen
soldering is good. And if anyone has a meaning about the Seho MWS-8200
PWR i would like to hear that too.
With Regards
Jesper Konge
Danica Supply A/S
Denmark
Mail : [log in to unmask]
<!DOCTYPE HTML PUBLIC "-//W3C//DTD W3 HTML//EN">
<HTML>
<HEAD>
<META content=text/html;charset=iso-8859-1 http-equiv=Content-Type>
<META content='"MSHTML 4.71.2016.0"' name=GENERATOR>
</HEAD>
<BODY bgColor=#ffffff>
<DIV><FONT face=Arial size=2> At our factory we are going to have a
new waesolderingmachine with nitrogensupport. But our director dosen't
think that we need the nitrogen because it has no effect compared to the
price that we have to
pay. But in me department we dosen't aggree.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2> I would like to hear about your
experience with nitrogen so that we can tell our director that it isn't
just us that thinks that nitrogen soldering is good. And if anyone has a
meaning about the <EM><STRONG>Seho MWS-8200 PWR</STRONG></EM> i would like
to hear that
too.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>With Regards </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2></FONT><FONT color=#000000 face=Arial
size=2>Jesper
Konge</FONT></DIV>
<DIV><FONT color=#000000 face=Arial size=2></FONT><FONT face=Arial
size=2>Danica
Supply A/S</FONT></DIV>
<DIV><FONT face=Arial size=2>Denmark</FONT> </DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Mail : <A
href="mailto:[log in to unmask]
">[log in to unmask]</A></FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV></BODY></HTML>
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=========================================================================
Date: Thu, 25 Jun 1998 09:28:55 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Gonnerman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Gonnerman <[log in to unmask]>
Subject: Re: intrusive reflow and all
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
We sell the Solberg and Blankenhorn books that Phil mentions. Contact me
at the SMTA for more information.
-David
At 09:10 AM 6/25/98 EDT, you wrote:
>Hi Jon -
>If you check out my website (www.ITM-SMT.com) under "Articles", you will see
>an article I did on Reflow of Through-hole (Intrusive Reflow). Hope this
>helps.
>Regarding design guidelines for fine-pitch - I recommend Vern Solberg's
design
>guideline book as well as Jim Blankenhorn's (from SMTPlus). But if you
have a
>solderball problem, there can be a dozen causes other than the stencil
>aperture. Improper reflow profile, bad solder paste, are among the myriad of
>causes of solder balls. Bridging is the same - check out the stencil design
>but be more concerned about the solder paste and printing process and printer
>parameters.
>With the MELF, there is an aperture design that is somewhat "U" shaped that
>cradles the MELF in the solder paste. Your stencil designer should know
about
>this.
>Hope this helps.
>
>Phil Zarrow
>ITM, Inc.
>Durham, NH USA
>www.ITM-SMT.com
>
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>
>
David Gonnerman
Director of Publications
Plan now to attend:
Surface Mount International (San Jose, CA; 8/23-8/27;
http://www.surfacemount.com)
Electronics Assembly Expo (Providence, RI; 10/24-10/29; http://www.ipc.org)
SURFACE MOUNT TECHNOLOGY ASSOCIATION
Enabling members to achieve success
in surface mount and companion technologies
through education, training and access to knowledge.
5200 Willson Road, Suite 215, Edina, MN 55424-1343
612-920-7682 F 612-926-1819
[log in to unmask] www.smta.org
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Date: Thu, 25 Jun 1998 10:34:31 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Rupert, Martha L." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Rupert, Martha L." <[log in to unmask]>
Subject: Re: see items stated
X-To: Benedicto Cruz <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hello Jon,
I would like to address your question concerning intrusive reflow. To make
sure we're talking about the same thing, intrusive reflow is "the soldering
of leaded components in plated through holes using a surface mount reflow
process".
I will limit my comments as it pertains to connectors because that is what I
am familiar with. There are many different styles of connectors used in the
industry and not all of them should be "true surface mount" products
(example, large I/O's, high current carrying, etc). This being the case,
these same connectors may remain as "through hole" designs and still be
processed through surface mount reflow.
The first requirement is that the connector housing material be "high
temperature", that is, compatible with the temperature extremes of the
reflow process. This information should be readily available from your
connector supplier and will most likely vary from product to product. You
will encounter polymers such as PPA, SPS, PCT, LCP and HTN which are
available from many materials suppliers under various trade names. If
you're using a convection reflow process, then pretty much any "high
temperature" polymer will be acceptable. Years ago when IR and focused IR
units were prevalent, color was a concern because some of these connectors
are very large (compared to other devices) and are usually black and,
therefore, they make very good heat sinks. This is not the case with
convection reflow.
The second requirement is for an "acceptable" plated through hole to
component lead cross section ratio. "Acceptable" will depend on your
requirements for a final solder joint (i.e. IPC-A-610A). Typically, good
candidates for the intrusive reflow process will have square or circular
cross sections (i.e. 0.5-0.65mm square/diameter) vs a "blade" (i.e. 0.5 x
0.25mm). (These types of leads will be placed in a 1mm diameter plated
through hole. It will be very difficult to deposit enough solder paste for
the blade style contact to achieve complete hole fill on a final solder
joint.) Remember, you will be using a stencil thickness that has been
chosen because of other fine pitch products on the board. Because of that,
a solder deposit on only the surface of the board will not be near enough
paste (your deposit needs to be approximately twice the final solder volume
requirement) and you will need to deposit paste into the plated through hole
as well. The majority of the volume of paste deposited will be in the
plated through hole. (Stepped stencils are an option, but you will lose
valuable board real estate surrounding your connector in order to account
for the transition areas.)
The number of rows in the connector is an issue as well. One and two row
products are more acceptable vs three, four and five rows. Again, the
solder deposit is the limiting factor. The portion of the deposit on the
surface of the board may exceed the contact centerline spacing on the
connector. (The paste does not have to be centered over the plated through
hole, therefore, two row product will still work.)
The aspect ratio of the plated through hole to board thickness will play a
role in determining the solder paste deposit. If you have a small diameter
hole (i.e. 0.8mm) in a thick substrate (i.e. 2.36mm) you will not be able to
get enough paste into the plated through hole. The solder pastes in use
today have such high viscosities (fine pitch requirement) that one pass of
the squeegee will not have enough "oomph" to fill the plated through hole.
Once the leaded component is placed on the board, the portion (or cross
section) of the lead extending into the plated through hole will displace
the solder paste. This paste will not "fall off" the lead but will "wick
back up" the lead and become part of the final solder joint.
I apologize for the lengthy response, but if you wish to discuss this
further, please contact me offline. I do have some papers I would be happy
to share with you on work I've done with some connectors.
Regards,
Martha Rupert
AMP Incorporated
Phone: 717-592-4458
Fax: 717-592-3180
Email: [log in to unmask]
> -----Original Message-----
> From: Benedicto Cruz [SMTP:[log in to unmask]]
> Sent: Thursday, June 25, 1998 7:19 AM
> To: [log in to unmask]
> Subject: [TN] see items stated
>
> Hi!
>
> I would like to ask for an effective stencil aperture design for
> fine-pitch ICs. We are encountering some solder bridging on these
> ICs. Also, there are solder balls present beside these components.
> Do you have any stencil design guidelines that you could share with
> us to improve our Screen Print Process?
>
> Also, Are you familiar with intrusive reflow? Can anyone share some
> informaiton about this?
>
> We also have a product that uses a MELF SMD resistor. The problem
> that we are encountering is that this component rolls during solder
> paste curing. So when it comes out, the component is already
> misaligned. Do you have any suggestions to control this without using
> any fixtures?
>
> Thanks.
>
> Regards.
> Jon Cruz
> Electronic Assemblies Inc.
> Manila, Philippines
> e-mail: [log in to unmask]
> Tel #: 823-7317/7593885
> Fax #: 7538629
>
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Date: Thu, 25 Jun 1998 09:23:52 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David D Hillman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David D Hillman <[log in to unmask]>
Subject: Re: Chip Termination Finish
X-To: Rob Schetty <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hi Rob - and there are a multitude of reference sources that show solder
dipped terminations are better than tin/lead plated terminations! If you
were needed coplanarity then a plated termination would be better than a
dipped termination. If you want solderability then (IMHO) a dipped
termination would be better than a plated termination. There is an IPC
technical report (IPC-TR-465-3) that the 002/003 committees completed that
shows some very interesting data of how a tin/lead plated finish ranks with
other alternative finishes (e.g. gold) in terms of steam aging resistance.
My experiences have shown that dipped (or fused) finishes had better
oxidation resistance than plated finishes but the TR-465-3 report
illustrates how a plated finish can be very robust. Storage conditions,
flux choice, and soldering process are other factors which can impact which
finish would be preferred. Good topic for the TechNet - which finish do you
prefer and why : dipped or plated.
Dave Hillman
Rockwell Collins
[log in to unmask]
Rob Schetty <[log in to unmask]> on 06/24/98 07:02:18 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Rob Schetty <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
Subject: Re: [TN] Chip Termination Finish
There are a multitude of reference sources showing that tin-lead plated
terminations are much better than solder dipped.
Rob Schetty
LeaRonal Inc
Freeport, NY USA
-----Original Message-----
From: Tom Lambert <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Wednesday, June 24, 1998 1:16 PM
Subject: [TN] Chip Termination Finish
>Hi Folks : I just know many of you out there have knowledge re
termination
>finish of chip parts to pass along. Specifically - is "hot solder dip"
any
>better/worse than "solder plate" ?? Thanx.
>
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Date: Thu, 25 Jun 1998 15:59:15 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Eddie Brunker <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Eddie Brunker <[log in to unmask]>
Subject: Re: intrusive reflow and all
X-To: David Gonnerman <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Now this is direct selling!!!
Why are we reccommending some books to this man anyway, why don't we just
help him out with the info. he needs. Isn't that what this forum is all about?
At 09:28 25/06/98 -0500, you wrote:
>We sell the Solberg and Blankenhorn books that Phil mentions. Contact me
>at the SMTA for more information.
>
>-David
>
>At 09:10 AM 6/25/98 EDT, you wrote:
>>Hi Jon -
>>If you check out my website (www.ITM-SMT.com) under "Articles", you will see
>>an article I did on Reflow of Through-hole (Intrusive Reflow). Hope this
>>helps.
>>Regarding design guidelines for fine-pitch - I recommend Vern Solberg's
>design
>>guideline book as well as Jim Blankenhorn's (from SMTPlus). But if you
>have a
>>solderball problem, there can be a dozen causes other than the stencil
>>aperture. Improper reflow profile, bad solder paste, are among the myriad of
>>causes of solder balls. Bridging is the same - check out the stencil design
>>but be more concerned about the solder paste and printing process and printer
>>parameters.
>>With the MELF, there is an aperture design that is somewhat "U" shaped that
>>cradles the MELF in the solder paste. Your stencil designer should know
>about
>>this.
>>Hope this helps.
>>
>>Phil Zarrow
>>ITM, Inc.
>>Durham, NH USA
>>www.ITM-SMT.com
>>
>>################################################################
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>847-509-9700 ext.312
>>################################################################
>>
>>
>
>David Gonnerman
>Director of Publications
>
>Plan now to attend:
>Surface Mount International (San Jose, CA; 8/23-8/27;
>http://www.surfacemount.com)
>Electronics Assembly Expo (Providence, RI; 10/24-10/29; http://www.ipc.org)
>
>SURFACE MOUNT TECHNOLOGY ASSOCIATION
> Enabling members to achieve success
> in surface mount and companion technologies
> through education, training and access to knowledge.
>
>5200 Willson Road, Suite 215, Edina, MN 55424-1343
> 612-920-7682 F 612-926-1819
> [log in to unmask] www.smta.org
>
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=========================================================================
Date: Thu, 25 Jun 1998 08:15:49 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
John Parsons <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: John Parsons <[log in to unmask]>
Organization: Circuit Graphics Ltd.
Subject: Re: PWB Layer Stack-up
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7BIT
Bob,
FR4 prepreg has the same characteristics as FR4 laminate in this
respect. Contact your board vendor for the exact specs of the
material they use but the Electrical Strength will probably be around
1000-1100 volts/mil.
Regards
John Parsons
Circuit Graphics Ltd.
> Hi All,
>
> I have a question concerning the layer stack-up of a board that I am
> designing for an engineer who is concerned about the voltage isolation
> provided by the pre-preg material between the layers. The design is for a
> power supply board that will be 4 layers/0.094" thick with 2 oz. copper
> on all layers and will contain max voltages of 240 VAC. It also must meet
> certain CE agency guidelines. He feels that the pre-preg material doesn't
> provide the voltage isolation needed that FR-4 provides. So to maintain
> certain high voltage clearances, he wants to fabricate the board with 2
> double-sided copper clad laminates and use pre-preg between layers 2 & 3.
> Some other sources tell me that pre-preg contains the same
> characteristics of FR-4 when cured and thus the cost of the board would
> be less if 1 double-sided copper clad laminate was used with foil on each
> of the outside layers and pre-preg being used between layers 1 & 2 and 3
> & 4. Is this true and can anyone supply me with technical info comparing
> FR-4 to pre-preg materials and also help me in understanding the most
> cost effective way to fabricate this board. He would also like to use
> more than 2 oz. copper, but I'm told that 2 oz. is more common than 3
> oz., so we are making every effort to use 2 oz. unless someone can tell
> me of a process that is available that will not add too much cost to the
> board and provide a higher copper content. Any help would be greatly
> apprreciated.
>
> Regards,
> Bob Walker
>
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>
>
>
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=========================================================================
Date: Thu, 25 Jun 1998 08:23:27 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
John Parsons <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: John Parsons <[log in to unmask]>
Organization: Circuit Graphics Ltd.
Subject: Re: Polyimide See Thru Stencils for Printing Solder Paste
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7BIT
This type os stencil is available from:
KJ Marketing Services
115-30th St.
Toronto, Ontario, M8W 3C1
Phone: (416) 252-1061
Fax: (416) 253-1687
email: [log in to unmask]
Web Site: www.kjmarketing.com
Regards
John Parsons
Circuit Graphics Ltd.
> Following mail was posted by Russ M on June 23, 1998 at 11:27:37: to
> http://www.smtnet.com/smt_forum/smt_mail.html
>
> Has anyone seen/used these yet? They seem to have lower
> coefficient of friction
> for release of paste and less wear and tear as well as
> conforming to the board better
> (plastic has better memory than stainless). Also there is no mesh
> so a larger
> image can be put in a smaller stencil size. But, the best is that
> you can see through
> the stencil for manual and semi-automatic printer alignment and
> reduce set up and changeover times.
> Anyone familiar with these?
> How long do they last?
> ---------------------------------------------------------------------------
> ----------------------------------------------------------
> Any comments ?
> brs, Johannes
>
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> ################################################################
>
>
>
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=========================================================================
Date: Thu, 25 Jun 1998 11:39:09 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: defect marking
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
On 25, June, the question was asked:
>> I am looking for a temporary way to mark defects on a PCB assembly (other
than the >> red arrows that everyone uses). The boards will go back through a
water wash, so I >> was thinking a water soluable, non-conductive ink would
be nice. Are there any >> recommendations?
Good day there!
Yes, Marshall's (www.marshall.com) carries some markers from Tech Spray
that are called solder-fault markers (PN# 1850-O for orange ones, 1850-W for
white ones), and they're listed at $5.05 each, they contain 10ml of the
marking agent that is said to be non-stringing, quick drying, and can be
cleaned either with warm water or solvent. The agent also contains a black
light indicator so if you really want to be sure you don't miss anything you
can use a black light to make things jump out at you...
-Steve Gregory-
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=========================================================================
Date: Thu, 25 Jun 1998 16:52:35 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Eddie Brunker <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Eddie Brunker <[log in to unmask]>
Subject: Re: see items stated
X-To: Benedicto Cruz <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Hi,
Please tell me some of the pad dimensions on your fine pitch devices.
Please tell us which flux/paste you are using.
Please tell us what thickness of stencil you are using. (Tell us what
material and cut)
If you are using 20 thou (mil) pitch, then I reccommend printing 10 thou
strips of paste. Keep them the full length of the pads. Many people try to
reduce the apertures in the length aswell as the width to prevent bridging,
but it's not neccessary.
So an example of pad dimensions for a device might be 12 X 70 thou. Print 10
X 70 thou strips.
On 25 thou pitch, the pad dimensions might be 14 x 70 thou, print 12 X 70 thou.
or the pad dimensions might be 16 X 70 thou, print 14 or 12 X
70 thou, obviously 12 will have reduced risk of bridging.
The stencil thickness should be 6 thou, we use 7 thou thick but maybee your
paste might not suit this. Obviously 8 thou thick is too much for fine pitch.
A reason for bridging might be aspects to do with your paste/flux. Perhaps
the level of activity is too low. Please tell us what you are using.
Manila must have a high relative humidity, perhaps the temperature and
humidity in your production area is not working well with your paste. A
paste which works well with your climatic conditions might need to be
chosen. Please tell us what temp. and relative humidity you have in the area.
Please tell us what oven you have too.
Regards
Eddie Brunker
Tadpole Technology
Cambridge, UK
+44 1223 278200
e-mail [log in to unmask]
At 11:19 25/06/98 +0000, you wrote:
>Hi!
>
>I would like to ask for an effective stencil aperture design for
>fine-pitch ICs. We are encountering some solder bridging on these
>ICs. Also, there are solder balls present beside these components.
>Do you have any stencil design guidelines that you could share with
>us to improve our Screen Print Process?
>
>Also, Are you familiar with intrusive reflow? Can anyone share some
>informaiton about this?
>
>We also have a product that uses a MELF SMD resistor. The problem
>that we are encountering is that this component rolls during solder
>paste curing. So when it comes out, the component is already
>misaligned. Do you have any suggestions to control this without using
>any fixtures?
>
>Thanks.
>
>Regards.
>Jon Cruz
>Electronic Assemblies Inc.
>Manila, Philippines
>e-mail: [log in to unmask]
>Tel #: 823-7317/7593885
>Fax #: 7538629
>
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>################################################################
>
>
>
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=========================================================================
Date: Thu, 25 Jun 1998 11:29:12 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Yves Trudell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Yves Trudell <[log in to unmask]>
Subject: Re: ASSY: BGA sanity check
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
FYI all, Bev Christian is a HE, not a SHE.
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Wednesday, June 24, 1998 7:01 PM
> To: [log in to unmask]
> Subject: [TN] ASSY: BGA sanity check
>
> Regarding populating both sides of the board with BGAs, I think Bev
> Christian
> summed it up pretty well. If you meet the parameters she mentioned, you
> should be fine with most PBGAs. The formula I use for calculating what
> will
> stay in place when re-reflowed is the sum of the lead (or collapsed
> sphere)
> surface area (all interconnects on the device) divided by the weight of
> the
> component in grams. If it comes out to less than 30 grams/ sq in, the
> component will stay on as there is ample surface tension. (Note, most
> ceramic
> BGAs or CGAs exceed this ratio).
>
> You sure don't need "differential heating" and you can do it on ANY reflow
> oven (not just an ETS whoopee-flow or whatever) that, as Bev mentioned,
> has a
> smooth running, edge conveyor
> HOWEVER........
> As Jerry Cupples wisely insinuates - beware when you do populate both
> sides
> with these. Remember to allow room for removal and replacement (Design
> for
> Repairability 101) ! We don't live in a perfect world, you know.
>
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=========================================================================
Date: Thu, 25 Jun 1998 12:30:36 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Lustig, Steven K.." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Lustig, Steven K.." <[log in to unmask]>
Subject: water soluble spacers
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Can anyone recommend a source for water soluble spacers (the type that
you put underneath PTH parts to provide stand-off and then wash away in
the water wash)?
Thanks.
-Steve
Steven K. Lustig
Process Engineer
EMS Technologies, Inc.
Norcross, GA
(770) 263-9200 x4714
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=========================================================================
Date: Thu, 25 Jun 1998 11:17:50 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Hempton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Hempton <[log in to unmask]>
Subject: Re: intrusive reflow and all
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit
Ed,
I have 37 articles, a few power-point presentations, and 9 different
spreadsheets I use for calculating intrusive reflow stuff. Now, we
could either spend half of our day at the fax machine, or give a quick
reference to some good and readily available resources that provide
good starter material.
You were correct when you stated the forum is about helping each
other, but let's keep it as painless as possible.
BTW, I have Jim Blankenhorn's book, and it comes with excel
spreadsheets.Regards!
______________________________ Forward Header __________________________________
Subject: Re: [TN] intrusive reflow and all
Author: Eddie Brunker <[log in to unmask]> at Internet
Date: 6/25/98 3:59 PM
Now this is direct selling!!!
Why are we reccommending some books to this man anyway, why don't we just
help him out with the info. he needs. Isn't that what this forum is all about?
At 09:28 25/06/98 -0500, you wrote:
>We sell the Solberg and Blankenhorn books that Phil mentions. Contact me
>at the SMTA for more information.
>
>-David
>
>At 09:10 AM 6/25/98 EDT, you wrote:
>>Hi Jon -
>>If you check out my website (www.ITM-SMT.com) under "Articles", you will see
>>an article I did on Reflow of Through-hole (Intrusive Reflow). Hope this
>>helps.
>>Regarding design guidelines for fine-pitch - I recommend Vern Solberg's
>design
>>guideline book as well as Jim Blankenhorn's (from SMTPlus). But if you
>have a
>>solderball problem, there can be a dozen causes other than the stencil
>>aperture. Improper reflow profile, bad solder paste, are among the myriad of
>>causes of solder balls. Bridging is the same - check out the stencil design
>>but be more concerned about the solder paste and printing process and printer
>>parameters.
>>With the MELF, there is an aperture design that is somewhat "U" shaped that
>>cradles the MELF in the solder paste. Your stencil designer should know
>about
>>this.
>>Hope this helps.
>>
>>Phil Zarrow
>>ITM, Inc.
>>Durham, NH USA
>>www.ITM-SMT.com
>>
>>################################################################
>>TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
>>################################################################
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>>################################################################
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>information.
>>For technical support contact Hugo Scaramuzza at [log in to unmask] or
>847-509-9700 ext.312
>>################################################################
>>
>>
>
>David Gonnerman
>Director of Publications
>
>Plan now to attend:
>Surface Mount International (San Jose, CA; 8/23-8/27;
>http://www.surfacemount.com)
>Electronics Assembly Expo (Providence, RI; 10/24-10/29; http://www.ipc.org)
>
>SURFACE MOUNT TECHNOLOGY ASSOCIATION
> Enabling members to achieve success
> in surface mount and companion technologies
> through education, training and access to knowledge.
>
>5200 Willson Road, Suite 215, Edina, MN 55424-1343
> 612-920-7682 F 612-926-1819
> [log in to unmask] www.smta.org
>
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=========================================================================
Date: Thu, 25 Jun 1998 11:44:36 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMonagle, Michael R." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMonagle, Michael R." <[log in to unmask]>
Subject: Re: water soluble spacers
X-To: "Lustig, Steven K.." <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Bivar makes Diss-O-Pad water soluble spacers, along with a full line of
plastic/nylon spacers.
www.bivar.com
> -----Original Message-----
> From: Lustig, Steven K.. [SMTP:[log in to unmask]]
> Sent: Thursday, June 25, 1998 11:31 AM
> To: [log in to unmask]
> Subject: [TN] water soluble spacers
>
> Can anyone recommend a source for water soluble spacers (the type that
> you put underneath PTH parts to provide stand-off and then wash away
> in
> the water wash)?
>
> Thanks.
>
> -Steve
>
> Steven K. Lustig
> Process Engineer
> EMS Technologies, Inc.
> Norcross, GA
> (770) 263-9200 x4714
> [log in to unmask]
>
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Date: Thu, 25 Jun 1998 12:56:23 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: water soluble spacers
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
In a message dated 6/25/98 9:34:31 AM Pacific Daylight Time, [log in to unmask]
writes:
>
> you put underneath PTH parts to provide stand-off and then wash away in
> the water wash)?
>
> Thanks.
>
> -Steve
>
Hi there Steve!
(Cool name by the way....GRIN) COM KYL carries them (1-800-538-1578)
they're from a company called Bivar...COM KYL has both washable and permanent
ones. You gotta call them to find out prices and check to see if they carry
the size you want...
-Steve Gregory-
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Date: Thu, 25 Jun 1998 13:02:00 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Edward J. Valentine" <[log in to unmask]>
Subject: Re: defect marking
X-To: "Dave Pick -\"process engineer\"" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Dave Pick -"process engineer" wrote:
>
> I am looking for a temporary way to mark defects on a PCB assembly (other than
> the red arrows that everyone uses). The boards will go back through a water
> wash, so I was thinking a water soluable, non-conductive ink would be nice. Are
> there any recommendations?
>
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Dave - Try contacting Metron Optics in Solana Beach, CA for marking pens
that have both removable and permanent fluorescent amrking inks.
Telephone: (619) 755-4477, Fax: (619) 755-4752
Ed Valentine/
--
ProTronics, Inc.
861 Old Knight Road
Knightdale, NC 27545
Phone: (919) 217-0007, Fax: (919) 217-0050
http://www.protronics-inc.com
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Date: Thu, 25 Jun 1998 11:57:35 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMonagle, Michael R." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMonagle, Michael R." <[log in to unmask]>
Subject: Re: intrusive reflow and all
X-To: Jeff Hempton <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hey Jeff, how about posting the spreadsheet files for download? I can
never have enough tools for this kind of stuff....
> -----Original Message-----
> From: Jeff Hempton [SMTP:[log in to unmask]]
> Sent: Thursday, June 25, 1998 11:18 AM
> To: [log in to unmask]
> Subject: Re: [TN] intrusive reflow and all
>
> Ed,
> I have 37 articles, a few power-point presentations, and 9
> different
> spreadsheets I use for calculating intrusive reflow stuff. Now,
> we
> could either spend half of our day at the fax machine, or give a
> quick
> reference to some good and readily available resources that
> provide
> good starter material.
> You were correct when you stated the forum is about helping
> each
> other, but let's keep it as painless as possible.
> BTW, I have Jim Blankenhorn's book, and it comes with excel
> spreadsheets.Regards!
>
>
> ______________________________ Forward Header
> __________________________________
> Subject: Re: [TN] intrusive reflow and all
> Author: Eddie Brunker <[log in to unmask]> at Internet
> Date: 6/25/98 3:59 PM
>
>
> Now this is direct selling!!!
>
> Why are we reccommending some books to this man anyway, why don't we
> just
> help him out with the info. he needs. Isn't that what this forum is
> all about?
>
>
> At 09:28 25/06/98 -0500, you wrote:
> >We sell the Solberg and Blankenhorn books that Phil mentions.
> Contact me
> >at the SMTA for more information.
> >
> >-David
> >
> >At 09:10 AM 6/25/98 EDT, you wrote:
> >>Hi Jon -
> >>If you check out my website (www.ITM-SMT.com) under "Articles", you
> will see
> >>an article I did on Reflow of Through-hole (Intrusive Reflow). Hope
> this
> >>helps.
> >>Regarding design guidelines for fine-pitch - I recommend Vern
> Solberg's
> >design
> >>guideline book as well as Jim Blankenhorn's (from SMTPlus). But if
> you
> >have a
> >>solderball problem, there can be a dozen causes other than the
> stencil
> >>aperture. Improper reflow profile, bad solder paste, are among the
> myriad of
> >>causes of solder balls. Bridging is the same - check out the
> stencil design
> >>but be more concerned about the solder paste and printing process
> and printer
> >>parameters.
> >>With the MELF, there is an aperture design that is somewhat "U"
> shaped that
> >>cradles the MELF in the solder paste. Your stencil designer should
> know
> >about
> >>this.
> >>Hope this helps.
> >>
> >>Phil Zarrow
> >>ITM, Inc.
> >>Durham, NH USA
> >>www.ITM-SMT.com
> >>
> >>################################################################
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> >>################################################################
> >>
> >>
> >
> >David Gonnerman
> >Director of Publications
> >
> >Plan now to attend:
> >Surface Mount International (San Jose, CA; 8/23-8/27;
> >http://www.surfacemount.com)
> >Electronics Assembly Expo (Providence, RI; 10/24-10/29;
> http://www.ipc.org)
> >
> >SURFACE MOUNT TECHNOLOGY ASSOCIATION
> > Enabling members to achieve success
> > in surface mount and companion technologies
> > through education, training and access to knowledge.
> >
> >5200 Willson Road, Suite 215, Edina, MN 55424-1343
> > 612-920-7682 F 612-926-1819
> > [log in to unmask] www.smta.org
> >
> >################################################################
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> >
> >
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=========================================================================
Date: Thu, 25 Jun 1998 19:19:37 GMT
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Peter Swanson <[log in to unmask]>
Subject: Re: Low-melt solder alloys for desoldering
In message <[log in to unmask]> [log in to unmask] writes:
> I would like your opinions and experiences using low-melt solder alloys for
> rework of smd. The mixture contains tin, lead, and bismuth. What
> potential problems are associated with this combination?
It's an interesting concept, one which we have been considering.
The process involves reflowing a LMP (low melting point) solder into the
existing solder joints, using a soldering iron or hot air pencil (and
optionally using some under board heating). The LMP solder mixes with the
existing stuff to form a mixture which stays molten at a much lower temperature
than standard 63/37, and therefore stays molten much longer, even when you
remove the heat source; so, you can take off even a large QFP device
having just used a soldering iron or hot air pencil.
I see pros:
1) Very inexpensive on the equipment side, no capital investment needed
2) Can be done anywhere (in the field)
I see cons:
1) Material (which is a tin/lead/bismuth/indium type combination) is expensive,
so not really a process for people doing lots of rework
2) It is vital that the LMP solder and mixtures be removed from the pads
before a new component is placed and soldered, otherwise your joint could
reflow at a low (maybe operating!) temperature
3) Won't work for BGAs and other array devices
Para 2 is what worries me; no matter how well you wick off the LMP
solder from the pads, I think you will still have a (thin) layer of bismuth-
bearing intermetallic left on the pad. When a new joint is made with
conventional solder, the bismuth will stay at that interface (not being very
mobile). Bismuth being brittle, I reckon the new joint is much more likely to
fatigue crack at the joint/pad interface.
So, reliability suspect? I dunno, no data, just theory. Maybe the approach is
valid for the hobbyist or the occasional job in a low-tech consumer product
(Class 1). Other inputs appreciated.
Some info from a company who have commercialised this process can be
found at http://chipquikinc.com (I offer this for your interest, not as an
advertisement - sheesh, some people are sensitive!).
Peter
--
:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
Peter Swanson Oxfordshire, England
INTERTRONICS
[log in to unmask] http://www.cygnetuk.demon.co.uk
Suppliers of materials and consumables to the electronics & related industries
:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
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Date: Thu, 25 Jun 1998 11:55:24 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Robert Jordan <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Robert Jordan <[log in to unmask]>
Subject: Copper Invar Copper
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Good Afternoon!
What is Copper Invar Copper?
Why is it used?
Are there any processing concerns differing from conventional copper?
How does it compare cost wise to conventional copper?
Thanks in advance,
Bob Jordan
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Date: Thu, 25 Jun 1998 15:03:45 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
superflx <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: superflx <[log in to unmask]>
Subject: Re: Chip Termination Finish
X-To: Tom Lambert <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Tom,
There are differences between plate and hot dip soldering. Hot dip provides a better coverage of
the base with less opportunity for oxide development because of the uniformity of the coating and
less porosity than plating. Additionally, it gives a better cosmetic finish that is shinier than
plated.
Of course, we are flux manufacturers and biased, but our feelings are also reflected by companies
that used to plate and have switched to soldering.
Phil
Tom Lambert wrote:
> Hi Folks : I just know many of you out there have knowledge re termination
> finish of chip parts to pass along. Specifically - is "hot solder dip" any
> better/worse than "solder plate" ?? Thanx.
>
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=========================================================================
Date: Thu, 25 Jun 1998 15:19:30 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
superflx <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: superflx <[log in to unmask]>
Subject: Re: Nitrogen in the wavesolderingproces
X-To: Jesper Kjærnulf Konge <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="------------0AB9D0BBDB160DA067B1AB19"
--------------0AB9D0BBDB160DA067B1AB19
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Content-Transfer-Encoding: quoted-printable
X-MIME-Autoconverted: from 8bit to quoted-printable by junior.apk.net id PAA22247
If you use a No-Clean flux with clean, fresh components and new HAL or
OSP boards, the nitrogen will add, marginally, to the process. If you
use a water-soluble flux, the nitrogen does not add anything as the flux
will overcome any oxidation problems.
Our experiuence has been that Nitrogen doesn't necessarily add anything
to the soldering process, but helps reduce drossing of solder. If
reducing dross can help save money relative to the cost of nitrogen,
then its a worthwhile investment.
Phil
Jesper Kj=E6rnulf Konge wrote:
> At our factory we are going to have a new waesolderingmachine with
> nitrogensupport. But our director dosen't think that we need the
> nitrogen because it has no effect compared to the price that we have
> to pay. But in me department we dosen't aggree. I would like to hear
> about your experience with nitrogen so that we can tell our director
> that it isn't just us that thinks that nitrogen soldering is good. And
> if anyone has a meaning about the Seho MWS-8200 PWR i would like to
> hear that too. With Regards Jesper KongeDanica Supply A/SDenmark Mail
> : [log in to unmask]
--------------0AB9D0BBDB160DA067B1AB19
Content-Type: text/html; charset=us-ascii
Content-Transfer-Encoding: 7bit
<HTML>
<BODY BGCOLOR="#FFFFFF">
If you use a No-Clean flux with clean, fresh components and new HAL or
OSP boards, the nitrogen will add, marginally, to the process. If
you use a water-soluble flux, the nitrogen does not add anything as the
flux will overcome any oxidation problems.
<P>Our experiuence has been that Nitrogen doesn't necessarily add anything
to the soldering process, but helps reduce drossing of solder. If
reducing dross can help save money relative to the cost of nitrogen, then
its a worthwhile investment.
<P>Phil
<P>Jesper Kjærnulf Konge wrote:
<BLOCKQUOTE TYPE=CITE> <FONT FACE="Arial"><FONT SIZE=-1> At
our factory we are going to have a new waesolderingmachine with nitrogensupport.
But our director dosen't think that we need the nitrogen because it has
no effect compared to the price that we have to pay. But in me department
we dosen't aggree.</FONT></FONT> <FONT FACE="Arial"><FONT SIZE=-1>
I would like to hear about your experience with nitrogen so that we can
tell our director that it isn't just us that thinks that nitrogen soldering
is good. And if anyone has a meaning about the <B><I>Seho MWS-8200 PWR</I></B>
i would like to hear that too.</FONT></FONT> <FONT FACE="Arial"><FONT SIZE=-1>With
Regards</FONT></FONT> <FONT FACE="Arial"><FONT COLOR="#000000"><FONT SIZE=-1>Jesper
Konge</FONT></FONT></FONT><FONT FACE="Arial"><FONT SIZE=-1>Danica Supply
A/S</FONT></FONT><FONT FACE="Arial"><FONT SIZE=-1>Denmark</FONT></FONT> <FONT FACE="Arial"><FONT SIZE=-1>Mail
: <A HREF="mailto:[log in to unmask]">[log in to unmask]</A></FONT></FONT> </BLOCKQUOTE>
</BODY>
</HTML>
--------------0AB9D0BBDB160DA067B1AB19--
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=========================================================================
Date: Thu, 25 Jun 1998 15:31:01 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
TOSTEVIN_BC <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: TOSTEVIN_BC <[log in to unmask]>
Subject: tantalum caps
We've been doing some investigative work into tantalum capacitor
failures. Some portion of the failures has been traceable to defects
within a vendor's lotcode. Other failures are undoubtedly caused by
well-meaning, but incorrect hand placement of missing components.
However, there is a third group of failed parts, where the capacitor
was installed backwards, but for which no rework or operator
intervention is indicated in the card's production history. This
leads to several questions.
1. Is anyone aware of studies or data, which attempted to determine
a DPM for reversed tantalum capacitors, as received on the tape & reel
from the component manufacturer? The vendors would have you believe
that the DPM is zero, but we all know, nothing is perfect.
2. What are some of the inspection / test methods, and equipment
that you're using (or not using as the case may be), to ensure that
these parts are installed correctly on the final assemblies?
3) What about through-hole caps, where the polarity markings are
less visible on the side of the part than on the top of smt caps?
Bruce Tostevin
Benchmark Electronics
Hudson, NH
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=========================================================================
Date: Thu, 25 Jun 1998 15:46:23 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: intrusive reflow and all
X-To: [log in to unmask]
Mime-Version: 1.0
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Hey Jeff -
Better yet, compile the files into a book. Maybe Eddie will even buy it.
Sorry Eddie - but Jeff said it for me, too. We're not selling books here -
but why re-invent the wheel. Blankenhorn and Solberg are among the best
authorities in SMT design.
Phil Z
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Date: Thu, 25 Jun 1998 14:44:12 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Cobey Schmidt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Cobey Schmidt <[log in to unmask]>
Subject: Re: tantalum caps
X-To: TOSTEVIN_BC <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
So far, we have had to resort to having the
Tester/Assemblers physical inspect each item with a tantalum cap, using
the silkscreen as a guide. So far, so good, though we have had a couple
of small fires when the product goes under test. (Not within the last
year though.)
I have not seen any studies, or had problems of any sort
with through-hole versions.
Cobey Schmidt
VisionTek
1175 lakeside Drive
Gurnee, IL 60031
[log in to unmask]
<mailto:[log in to unmask]>
(847) 360-7566 voice
(847) 360-7443 fax
-----Original Message-----
From: TOSTEVIN_BC
[SMTP:[log in to unmask]]
Sent: Thursday, June 25, 1998 2:31 PM
To: [log in to unmask]
Subject: [TN] tantalum caps
We've been doing some investigative work
into tantalum capacitor
failures. Some portion of the failures has
been traceable to defects
within a vendor's lotcode. Other failures
are undoubtedly caused by
well-meaning, but incorrect hand placement
of missing components.
However, there is a third group of failed
parts, where the capacitor
was installed backwards, but for which no
rework or operator
intervention is indicated in the card's
production history. This
leads to several questions.
1. Is anyone aware of studies or data,
which attempted to determine
a DPM for reversed tantalum capacitors, as
received on the tape & reel
from the component manufacturer? The
vendors would have you believe
that the DPM is zero, but we all know,
nothing is perfect.
2. What are some of the inspection / test
methods, and equipment
that you're using (or not using as the case
may be), to ensure that
these parts are installed correctly on the
final assemblies?
3) What about through-hole caps, where
the polarity markings are
less visible on the side of the part than
on the top of smt caps?
Bruce Tostevin
Benchmark Electronics
Hudson, NH
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=========================================================================
Date: Thu, 25 Jun 1998 21:01:30 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Fred Johnson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Fred Johnson <[log in to unmask]>
Subject: Copper Invar Copper -Reply
Mime-Version: 1.0
Content-Type: text/plain
Very simplistic answers to your questions:
1) Invar is a primarily iron-nickel alloy. CIC is invar with copper on both
sides. CIC comes in a variety of thicknesses of both the copper layers
and the invar layer.
2) It is used as a heatsink material, and useful for controlling the X-Y
movement of the PWB. As you know, the CTE of copper alone is very
different from the epoxy-glass; the invar has a lower amount of
movement. Other materials can be used for internal heatsinks, but they
often have much higher CTEs than invar (aluminum for example).
3) There are many different processing methods required (at least from
a PWB fab viewpoint). For example, it is difficult to drill through this very
hard material. The sensitizing process is quite different than
conventional epoxy-glass, as any copper in a sulfuric acid solution will
deposit a copper smut on the exposed invar-you can imagine how this
affects the microetch step. Ferric chloride microetches are frequently
required.
4) It's expensive by itself, and the increase in processing
pain-in-the-hind end factors increase board cost by quite a bit. There
are a few places that have a lot of experience in fabricating with the
stuff, but nobody I've ever seen builds a lot of it. Can't remember where
people buy it from, tho.
FJ
>>> Robert Jordan <[log in to unmask]> 13:55 25 June 1998
>>>
Good Afternoon!
What is Copper Invar Copper?
Why is it used?
Are there any processing concerns differing from conventional copper?
How does it compare cost wise to conventional copper?
Thanks in advance,
Bob Jordan
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=========================================================================
Date: Thu, 25 Jun 1998 16:07:38 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Jason M. Smith>" <[log in to unmask]>
Subject: Re: dross in the solder pot
X-To: [log in to unmask], [log in to unmask],
[log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Experts, I am currently getting alot of failures at my functional tester.
At my post solder station, I am noticing strings of dross across the pins
of connectors. We are having to dedross the pot daily....for a no-clean
process and inerted atmosphering, I think this is a bit extreme. Once, an
operator managed to accidently put stencil cleaner in the flux....could
this cause a reaction unable to be corrected without dumping the pot and
cause excess dross. I initially thought we had too much exhaust drawing
all nitrogen away from the wave. Our flux manufacturer did analyis and has
determined that it's not the residues left which is causing my bridges at
functional. Is a type 'C' solder analysis going to tell me anything of
significance to my problem from any of your experiences? Any
suggestions????
Jason Smith
Process Materials Engineer
Lexmark Electronics
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=========================================================================
Date: Thu, 25 Jun 1998 14:04:04 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Shin, Simon" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Shin, Simon" <[log in to unmask]>
Subject: Re: Nitrogen in the wavesolderingproces
X-To: superflx <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Hi all,
I have a few questions like to get the answer from the expertises:
1. Nitrogen being used on the wave process, what kind of process
improvement do we achieve? I heard people said that they have better
joint, better reflow.....
2. If it helps to reduce drossing of solder, how much solder do we save
monthly? How much dross produce/reduce each month? (Use % for
calculation).
3. How much nitrogen consumption in a month? (Let's say the machine =
runs
2 shifts in 22 days/month).
How can I measure/justify of using nitrogen in the process in terms of
quality and savings?
Your answer would be a great help for me.
Thanks
Simon Shin
> ----------
> From: superflx[SMTP:[log in to unmask]]
> Sent: Thursday, June 25, 1998 1:19 PM
> To: [log in to unmask]
> Subject: Re: [TN] Nitrogen in the wavesolderingproces
>=20
> If you use a No-Clean flux with clean, fresh components and new HAL =
or
> OSP boards, the nitrogen will add, marginally, to the process.=A0 If =
you
> use a water-soluble flux, the nitrogen does not add anything as the
> flux will overcome any oxidation problems.=20
> Our experiuence has been that Nitrogen doesn't necessarily add
> anything to the soldering process, but helps reduce drossing of
> solder.=A0 If reducing dross can help save money relative to the cost =
of
> nitrogen, then its a worthwhile investment.=20
> Phil=20
> Jesper Kj=E6rnulf Konge wrote:=20
> =A0=A0 At our factory we are going to have a new waesolderingmachine
> with nitrogensupport. But our director dosen't think that we need the
> nitrogen because it has no effect compared to the price that we have
> to pay. But in me department we dosen't aggree.=A0=A0 I would like to =
hear
> about your experience with nitrogen so that we can tell our director
> that it isn't just us that thinks that nitrogen soldering is good. =
And
> if anyone has a meaning about the Seho MWS-8200 PWR i would like to
> hear that too.=A0With Regards=A0Jesper KongeDanica Supply =
A/SDenmark=A0Mail
> : [log in to unmask] <mailto:[log in to unmask]> =A0=A0
> =A0=20
>=20
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=========================================================================
Date: Thu, 25 Jun 1998 13:46:59 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "SEM Lab, Inc." <[log in to unmask]>
Organization: SEM Lab, Inc.
Subject: Re: Gold plating of PWB's
X-To: Tim Frigon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Tim,
Soldering to gold can be precarious due to the formation of Au-Sn and Au-Pb intermetallic
compounds (IMC). Since some of these compounds consume a lot of Sn (e.g. AuSn4) a large volume
fraction of IMC can form with a relatively small amount of gold. I'd recommend a careful
analysis of just how much gold is disolved into the solder on these boards.
Regarding SN62 vs SN63 for gold. The silver is believed to use up some of the solvent capacity
of the molten solder and therefore slow down the gold dissolution process.
I've never heard that SN63 vs SN62 performed any differently with respect to disturbed solder
joints. Could you please elaborate on this?
Thanks,
Ed
--
SEM Lab, Inc.
Scanning Electron Microscopy and Failure Analysis
Snohomish, WA
(425)335-4400
http://www.sem-lab.com
Tim Frigon wrote:
> I have recently gone to work with a company who is doing SMA assembly to
> PWB's which have gold plated traces and pads. This is a historical concept
> as we have both ceramic and PWB substrates. In some products, there is
> direct wirebonding to the pads, and hence some thick gold plating is
> required. However, if there is no wirebonding to the board, is there any
> other reason this would be preferable to conventional lead/tin plating? I
> would like to change the solder process from using a 2% silver solder used
> as a result of the gold plating to a conventional Sn63 eutectic solder as a
> guard against disturbed connections. Secondarily, what is the chemical
> action which makes the 2% silver solder more effective on gold plating?
>
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=========================================================================
Date: Thu, 25 Jun 1998 13:26:45 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "SEM Lab, Inc." <[log in to unmask]>
Organization: SEM Lab, Inc.
Subject: Re: Gold Coated Solder
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Bill,
I have recently seen a number of instances where gold-tin intermetallic compound (IMC) was on the
surface of solder joints but not in the bulk solder. I believe the reason is that the density of
the solid IMC is less than the molten tin-lead and there the IMC floats to the surface prior to
solidification.
Ed Hare
--
SEM Lab, Inc.
Scanning Electron Microscopy and Failure Analysis
Snohomish, WA
(425)335-4400
http://www.sem-lab.com
Bill Fabry wrote:
> Deat "Techies":
>
> I have a "GOLDEN" opportunity for the experts to shine. I have in my possession
> some SMT assemblies built on gold flash fabs that exhibit gold residing on the
> surface of the fillet, rather than being dissolved in the solder. The fillet is
> fully formed with no graininess or other visual anomilies. The phenomenon
> occurs on ONE end of a MELF diode, not on both ends. To answer the obvious
> question, it is NOT dependant on the diode polarity; it happens on either end
> but on one end only.
>
> I have digitally captured a couple of photos of the phenomenon. If you need
> pictorial representation, please e-mail me directly and I can attach it to a
> return e-mail.
>
> As you will see, the gold remains on the surface of the fillet, rather than
> being dissolved in the fillet. A slight scraping of the fillet surface will
> uncover the base solder with NO visual evidence of gold inside. Other
> terminations on other components do NOT exhibit this phenomenon. The assembly
> subcontractor is using standard NO-CLEAN solder paste (OMG Americas 500ADV
> NO-CLEAN 63SN). Unsoldered parts show a tin/lead termination, indicating that
> the gold has possibly migrated over the entire termination.
>
> My question: What mechanism is at work to keep the gold from totally dissolving
> into the Sn/Pb paste after it leaves the fab during reflow?
>
> Thanks for the help.
>
> Bill Fabry, Sr. Manufacturing Engineer
> Plantronics, Inc.
> 345 Encinal Street
> Santa Cruz, Ca. 95060
> (408) 458-7555
>
> [log in to unmask]
>
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=========================================================================
Date: Thu, 25 Jun 1998 16:29:45 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMonagle, Michael R." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMonagle, Michael R." <[log in to unmask]>
Subject: Poor Solderability on TSOPs
MIME-Version: 1.0
Content-Type: text/plain
I am looking for a little enlightenment with an issue that we have been
seeing. We have SMT assemblies with poor solderability on TSOP and
mini-QFP type devices. The solder appears to have incomplete reflow
and/or grainyness to the joints. Everything else on the board such as
chips, j-leads and standard QFPs look good, shiny and well wetted. We
are using fresh aqueous paste (Alpha WS609) and a fairly standard
profile. Is there some inverse relationship between component/lead mass
and thermal absorption that I am missing here? Any inputs would be
greatly appreciated.
Mike McMonagle
Process Engineering Supervisor
K*Tec Electronics
Mike McMonagle
PCA Process Engineering Supervisor
K*Tec Electronics
1111 Gillingham Lane
Sugar Land, TX 77478
281-243-5639 Phone
281-527-1726 Pager
281-243-5539 Fax
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=========================================================================
Date: Thu, 25 Jun 1998 15:37:52 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Scott Martin <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Scott Martin <[log in to unmask]>
Subject: Re: Poor Solderability on TSOPs
Board finish? Let me guess.... Entek?
-----Original Message-----
From: McMonagle, Michael R. [mailto:[log in to unmask]]
Sent: Thursday,June 25,1998 3:30 PM
To: [log in to unmask]
Subject: [TN] Poor Solderability on TSOPs
I am looking for a little enlightenment with an issue that we have been
seeing. We have SMT assemblies with poor solderability on TSOP and
mini-QFP type devices. The solder appears to have incomplete reflow
and/or grainyness to the joints. Everything else on the board such as
chips, j-leads and standard QFPs look good, shiny and well wetted. We
are using fresh aqueous paste (Alpha WS609) and a fairly standard
profile. Is there some inverse relationship between component/lead mass
and thermal absorption that I am missing here? Any inputs would be
greatly appreciated.
Mike McMonagle
Process Engineering Supervisor
K*Tec Electronics
Mike McMonagle
PCA Process Engineering Supervisor
K*Tec Electronics
1111 Gillingham Lane
Sugar Land, TX 77478
281-243-5639 Phone
281-527-1726 Pager
281-243-5539 Fax
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=========================================================================
Date: Thu, 25 Jun 1998 14:38:42 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, ETS <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: ETS <[log in to unmask]>
Subject: Re: ASSY: BGA sanity check
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
To the ITM Team,
Gee you sure are critical and quick to jump to conclusions. I wonder where
our industry would be if people choose NOT to try new things because of
criticism like yours. Perhaps you should stick to comments where you have
first hand experience.
I have to ask, do you have any first hand experience with "differential
heating" or an ETS CUREFLOW System? I bet the real story is that you sell a
competing reflow oven that is not as flexible as the CUREFLOW (aka Whoopee
Flow).
Now, why don't you tell us how to solder the BGA to the bottom side if the
surface tension will not hold during second reflow?
BS
PS- I never said that the ETS system is the only oven that could solder
bottom side BGA's.
>Regarding populating both sides of the board with BGAs, I think Bev Christian
>summed it up pretty well. If you meet the parameters she mentioned, you
>should be fine with most PBGAs. The formula I use for calculating what will
>stay in place when re-reflowed is the sum of the lead (or collapsed sphere)
>surface area (all interconnects on the device) divided by the weight of the
>component in grams. If it comes out to less than 30 grams/ sq in, the
>component will stay on as there is ample surface tension. (Note, most ceramic
>BGAs or CGAs exceed this ratio).
>
>You sure don't need "differential heating" and you can do it on ANY reflow
>oven (not just an ETS whoopee-flow or whatever) that, as Bev mentioned, has a
>smooth running, edge conveyor
>HOWEVER........
>As Jerry Cupples wisely insinuates - beware when you do populate both sides
>with these. Remember to allow room for removal and replacement (Design for
>Repairability 101) ! We don't live in a perfect world, you know.
>
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>
>
>
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=========================================================================
Date: Thu, 25 Jun 1998 14:38:46 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, ETS <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: ETS <[log in to unmask]>
Subject: Re: ASSY: BGA sanity check
X-To: Paul Klasek <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Dear Paul,
Nice of you to challenge my knowledge rather than form quick opinions based
on guesses.
To answer your questions:
Temperatures listed were zone temps not board temps. The reason for these
zone temps are based on using a profile that includes a soak zone at 160C.
First two zones are going to give you a rise rate of approximately 1.6
degrees per second, rising from 23 C to 160 C (NOTE- the assembly is not in
zone 1 long enough to reach same temperature as the zone so there is not a
dip in the board temp) Then we hold at 160 C (or whatever the solder paste
manufacturers recommended soak temp is). After this the board temp rises to
approx. 215C as a peak temp. NOTE- different ovens have different numbers of
zones and different zone lengths. Our zones are 20" in length, the system
referred to has a total of 6 vertical zones.
Of course we offer cooling. The CUREFLOW (AKA Whoopee Flow) has 2 cooling
zones totalling 50 inches in length. The first 20" are a combination of
closed loop water cooling (which is also a part of the FLUX GRABBER, flux
condensation and filtration system) and forced air cooling. The last 30
inches is forced air cooling only. Cooldown rates are somewhat dependant
upon conveyor speed so I won't quote a number. Sorry I did not make that
clear the first time.
Please note that this profile recommendation is for solder pastes requiring
a soak at 160. Some pastes will require different soak temps and other
pastes can use the Tent style profile. In this case zone temps would be zone
1 - 120, zone 2 - 140, zone 3 - 160, zone 4 - 180, zone 5 200, zone 6 245
(of course this is based on a particular solder paste, zone temps would vary
depending on which no-clean you are using).
As far as top to bottom side temp delta's, how big would you like it? And
where would you like to measure it? I have run tests on a bare board as well
as a populated board. On a very thin bare board I measured a top to bottom
differential of 35 C with top side temperatures at 215 C +/- 1. When using
the same profile on a bare board I found that the same 35 degree board
surface differential became a huge difference when measured on the component
leads of a QFP located on the bottom of the board. Now measuring top board
surface temperature to bottom side component leads the delta was greater
than 50 C (easily more than enough to prevent second reflow of bottom
components). This delta could have been increase had I increased the speed
of our tangential RHA blower wheels. For this test I ran them at 1755 RPM's
and could have increased to as much as 2070 RPM.
I would be happy to discuss further if you like.
Sincerely,
Brian Stumm
ETS, LLC
3939 N. Freya St.
Spokane, WA 99207
509-483-0900 (voice)
509-483-0331 (fax)
[log in to unmask] (e-mail)
PS - what zone temps do you use on your Indium? The chiller you mention, are
you referring to actual refridgerated air or ambient forced air?
>Hi Brian
>Agree, the chiller you engage only when pushing limits , depends on top
>load componentry .
>Brian , enlighten me :
>165, 175, 160 (dip?) , 160(why?), 185, 245, ?(no cooling?) .
>Somehow my Indium profile looks different .
>What is the reason for dwell on 160 2x, and how do you cool ?
>With ALL bottom zones blowing ambient ; the separation is nice indeed .
>Can you get me an info on what ( in 'C's ) is achievable ?
>
>thanks
>Paul Klasek
>http://www.resmed.com
>
>> ----------
>> From: ETS[SMTP:[log in to unmask]]
>> Sent: Thursday, 25 June 1998 2:10
>> To: [log in to unmask]
>> Subject: Re: [TN] ASSY: BGA sanity check
>>
>> Dear Jerry,
>>
>> As a reflow manufacturer of course I want to brag but I also do not
>> blame
>> you for your hesitation. The weight of most BGA's outwieghts the
>> surface
>> tension of the solder paste. However, as Mr. Klasek pointed out,
>> reflow CAN
>> be avoided on the bottom side of the board. I am sure that you have
>> heard
>> before that once solder has been reflowed once the melting point of
>> that
>> solder increases to a higher temperature. This is where I have to
>> differ
>> with Mr. Klasek, we have not found chillers to be necessary. After
>> reflowing
>> the BGA's on the top side and inverting the board, we run the assembly
>> through an ETS CUREFLOW that has both top and bottom convection
>> heating. We
>> use a profile that uses standard temperatures on all 6 top zones
>> (165C,
>> 175C, 160C, 160C, 185C, 245C) and then set all bottom zones to ambient
>> temperature (or room temperature). This creates differential heating
>> on the
>> assembly by heating the top side of the board and cooling the bottom
>> side
>> of the assembly. This creates a big enough temperature delta to keep
>> the
>> bottom side components from reflowing a second time.
>>
>> Of course this method requires two passes through the reflow oven
>> whereas if
>> all the BGA's where on the top of the board you might be able to
>> solder both
>> sides with a single pass through reflow.
>>
>> If you would like to discuss this further I can be contacted at
>> [log in to unmask]
>>
>> Sincerely,
>>
>> Brian Stumm
>>
>>
>>
>>
>>
>> >Hello, TechNet....
>> >
>> >Soldering (inline convection furnace) BGA's on both sides of a board
>> is
>> >beyond my own experience, but it seems to violate a principle (at
>> least an
>> >imaginary one) related to the controlled collapse, or perhaps liquids
>> under
>> >tension.
>> >
>> >For a board design using 3 commercial BGA packages (PBGA 256,
>> eutectic
>> >balls on 1.27 mm pitch), am I obstinately blocking the path of
>> progress by
>> >requesting that this package style be confined to only one surface of
>> a new
>> >board design?
>> >
>> >If you are doing this today and it is a piece of cake, go ahead and
>> brag;
>> >but I would prefer to hear that caution is well advised, i.e. tales
>> of
>> >misery, shame and corporate disaster resulting from such mistakes.
>> ;-)
>> >
>> >
>> >cheers,
>> >
>> >
>> >
>> >
>> >Jerry Cupples
>> >Interphase Corporation
>> >Dallas, TX USA
>> >http://www.iphase.com
>> >
>> >################################################################
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=========================================================================
Date: Thu, 25 Jun 1998 16:47:42 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMonagle, Michael R." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMonagle, Michael R." <[log in to unmask]>
Subject: Re: Poor Solderability on TSOPs
X-To: Scott Martin <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Scott,
Don't know board finish, have to check with vendor. What's up
with Entek that I should know, you tease....
> -----Original Message-----
> From: Scott Martin [SMTP:[log in to unmask]]
> Sent: Thursday, June 25, 1998 4:38 PM
> To: [log in to unmask]
> Subject: Re: [TN] Poor Solderability on TSOPs
>
> Board finish? Let me guess.... Entek?
>
> -----Original Message-----
> From: McMonagle, Michael R. [mailto:[log in to unmask]]
> Sent: Thursday,June 25,1998 3:30 PM
> To: [log in to unmask]
> Subject: [TN] Poor Solderability on TSOPs
>
>
> I am looking for a little enlightenment with an issue that we have
> been
> seeing. We have SMT assemblies with poor solderability on TSOP and
> mini-QFP type devices. The solder appears to have incomplete reflow
> and/or grainyness to the joints. Everything else on the board such as
> chips, j-leads and standard QFPs look good, shiny and well wetted. We
> are using fresh aqueous paste (Alpha WS609) and a fairly standard
> profile. Is there some inverse relationship between component/lead
> mass
> and thermal absorption that I am missing here? Any inputs would be
> greatly appreciated.
>
> Mike McMonagle
> Process Engineering Supervisor
> K*Tec Electronics
>
> Mike McMonagle
> PCA Process Engineering Supervisor
> K*Tec Electronics
> 1111 Gillingham Lane
> Sugar Land, TX 77478
> 281-243-5639 Phone
> 281-527-1726 Pager
> 281-243-5539 Fax
>
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=========================================================================
Date: Thu, 25 Jun 1998 14:42:03 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, ETS <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: ETS <[log in to unmask]>
Subject: Re: intrusive reflow and all
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Hey Phil,
A little testy today aren't we? Perhaps you should switch to decaf.
Brian
>Hey Jeff -
>Better yet, compile the files into a book. Maybe Eddie will even buy it.
>Sorry Eddie - but Jeff said it for me, too. We're not selling books here -
>but why re-invent the wheel. Blankenhorn and Solberg are among the best
>authorities in SMT design.
>Phil Z
>
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>
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=========================================================================
Date: Thu, 25 Jun 1998 16:41:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jayne Benson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jayne Benson <[log in to unmask]>
Subject: oil well drilling pad material specs
MIME-Version: 1.0
Content-Type: text/plain
Does anyone know of any oil well drill pad material specs? I'm trying to
get rid of some fly ash and was wondering what the industry standard was on
the materials used to make drill pads. Please write back if you have any
suggestions!
Thanks-
Jayne Benson
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=========================================================================
Date: Thu, 25 Jun 1998 17:46:00 -0400
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Date: Thu, 25 Jun 1998 17:19:12 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Charles Barker <[log in to unmask]>
Subject: Re: see items stated
X-To: Benedicto Cruz <[log in to unmask]>
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi Jon,
If you can keep the stencil opening narrower than the pad width, you will
have less bridging and solder balls. You should not make the stencil width
too small, however, or you will not get good paste release. (Stencil
opening to stencil thickness should be equal to or more than 1.5:1, e.g.,
.009 opening is smallest usable for a .006 thick stencil.)
Another source of solder balls and, sometimes, bridging would be paste on
the bottom of your stencil. If you don't have a good seal between the
stencil and the pads, the paste will "bloom" on the bottom because of the
vacuum being pulled.
I believe you have received very good info on the intrusive reflow and the
MELF pad design (a "U" shaped pad). Some years ago I made a test board of
different shapes, sizes, and spacings of pads for MELFs. You can see real
quick, what works best. We wound up using a "U" shaped pad, but I don't
recall the dimentions today.
Good luck,
Charlie Barker
Sr. Manufacturing Engineer
Input/Output, Inc.
Stafford, Texas
[log in to unmask]
281-552-3328 Voice
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Benedicto Cruz <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Charles Barker/US/I-O INC)
Subject: [TN] see items stated
Hi!
I would like to ask for an effective stencil aperture design for
fine-pitch ICs. We are encountering some solder bridging on these
ICs. Also, there are solder balls present beside these components.
Do you have any stencil design guidelines that you could share with
us to improve our Screen Print Process?
Also, Are you familiar with intrusive reflow? Can anyone share some
informaiton about this?
We also have a product that uses a MELF SMD resistor. The problem
that we are encountering is that this component rolls during solder
paste curing. So when it comes out, the component is already
misaligned. Do you have any suggestions to control this without using
any fixtures?
Thanks.
Regards.
Jon Cruz
Electronic Assemblies Inc.
Manila, Philippines
e-mail: [log in to unmask]
Tel #: 823-7317/7593885
Fax #: 7538629
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Date: Thu, 25 Jun 1998 18:29:05 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "(George Milad)" <[log in to unmask]>
Subject: Re: Reliability Risk related Electroless Nickel/immersion gold
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Ken,
Gold may not be applied directly on copper in the electrolytic or immersion
plating mode. Gold diffuses into the copper readily. Nickel is a diffusion
barrier and is nessecary to maintain solderability.
Occaisionally the Ni may skip a pad during processing, if the electroless Ni
process is not running in spec. This will result in the "copper colored pad".
This is not be an acceptable defect.
George Milad
LeaRonal Inc
Tel(516)868-8800
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Date: Thu, 25 Jun 1998 18:42:55 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: intrusive reflow and all
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Brian -
Wow, you found me out! I'll come clean. I used to be a writer for the
Seinfeld show but now, with the show off the air, I go around making up
information about SMT and reflow.
Okay, I'll get off the caffeinated coffee if you'll stop plugging your ovens
on the Technet. Talk about testy, my oh my.
With all due respect to you, the solutions you propose are valid and worth
trying. I frankly think you should keep things generic and not mention the
name and model of your oven in capital letters at every opportunity. And I
never said that it was the only way (read it again, slowly). However, I did
say that differential heating is unnecessary in this application. Sorry to
take the wind out of your convection, but it is.
No I do not work for a reflow manufacturer. I did at one time work for
Vitronics as Reflow Product Manager for 7 years. By coincidence, did a bit
reflow, too. A lot of reflow and a lot of applications, as a matter of fact.
And yes, we did experiment with differential heating. And yes, I did a number
of applications with BGAs and what I described worked as I described it -
without differential heating. I did additional work during my years with
GSS/Array Technology with BGA and intrusive reflow. So gosh - I guess I do
have some first hand experience with SMT and reflow and I might actually know
what I'm talking about (maybe). Sorry to disappoint you.
One line of thought that arose from the work I did in this area is that in
many cases, not only is differential heating not required, but raises
questions regarding stresses on the substrate laminate. Think about it, if
you are creating a 30 - 40 deg C difference between two portions of the
laminate, typically .063" apart, what is this doing in terms of stress? Now
here's an experiment for ETS (or someone else to undertake)!
In my work as a consultant (oh god, one of those) I regularly am called upon
by both end users and equipment manufacturers to benchmark test their
eqiupment for them. Over the years I have tested most of the major offerings
from HELLER, ELECTROVERT, ERSA, RESEARCH, VITRONICS, SOLTEC, BTU, SMTECH and
CONCEPTRONIC (touche'). Many of these manufacturers have also developed
differential heating -some work better than others. I respect the fact that
these companies and ETS have spent big bucks in R&D to develop this
capability. I question if it is really needed. Most likley, it is an attempt
to create a market differentiator for a product area that is viewed by the
industry at large as a commodity. This is sad as well, because as you know
from your experience with ovens, not all reflow ovens are created equal. The
process may likely be viewed as a commodity but the equipment should be less
so.
Keep on experimenting Brian and keep on inputting into the Technet. But please
keep it generic (or we'll have to sic Capn' Jack on you). I'm going to have
that cup of decaf now, thanks.
Phil Zarrow
ITM, Inc.
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=========================================================================
Date: Thu, 25 Jun 1998 18:49:59 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "(George Milad)" <[log in to unmask]>
Subject: Re: Poor Solderability on TSOPs
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Check the incoming TSOPs, if they are made from Alloy 42 you may need to
adjust your reflow parameters to higher temperatures to accomodate this
finish.
George Milad
LeaRonal Inc
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=========================================================================
Date: Fri, 26 Jun 1998 11:02:41 +1200
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Justin Braime <[log in to unmask]>
Subject: Re: dross in the solder pot
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
Content-Transfer-Encoding: 7bit
Jason,
Have you sent a solder sample from your pot away for analysis recently? It
may confirm/deny the existence of impurities in the pot.
Justin Braime - Process Engineer
Alpine Electronics of New Zealand Ltd
----------
> From: <Jason M. Smith> <[log in to unmask]>
> To: [log in to unmask]
> Subject: Re: [TN] dross in the solder pot
> Date: Friday, 26 June 1998 08:07
>
> Experts, I am currently getting alot of failures at my functional tester.
> At my post solder station, I am noticing strings of dross across the pins
> of connectors. We are having to dedross the pot daily....for a no-clean
> process and inerted atmosphering, I think this is a bit extreme. Once,
an
> operator managed to accidently put stencil cleaner in the flux....could
> this cause a reaction unable to be corrected without dumping the pot and
> cause excess dross. I initially thought we had too much exhaust drawing
> all nitrogen away from the wave. Our flux manufacturer did analyis and
has
> determined that it's not the residues left which is causing my bridges at
> functional. Is a type 'C' solder analysis going to tell me anything of
> significance to my problem from any of your experiences? Any
> suggestions????
>
> Jason Smith
> Process Materials Engineer
> Lexmark Electronics
>
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Date: Thu, 25 Jun 1998 19:20:29 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: see items stated
X-To: [log in to unmask]
Mime-Version: 1.0
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In a message dated 6/25/98 3:25:43 PM Pacific Daylight Time, Charles_Barker@I-
O.COM writes:
> I believe you have received very good info on the intrusive reflow and the
> MELF pad design (a "U" shaped pad). Some years ago I made a test board of
> different shapes, sizes, and spacings of pads for MELFs. You can see real
> quick, what works best. We wound up using a "U" shaped pad, but I don't
> recall the dimentions today.
>
> Good luck,
>
> Charlie Barker
> Sr. Manufacturing Engineer
> Input/Output, Inc.
> Stafford, Texas
> [log in to unmask]
> 281-552-3328 Voice
>
Hello All...
Charlie, I'm kinda' curious...yours is the second or third response I've
read saying that those "U" shaped pads work the best for MELF's. Maybe it's
just me, but every time I've had em' on boards I've built, they've not worked
any better than regular ol' square pads. In fact, sometimes the U-shaped pads
have caused a problem. What would happen is that the melf would wet only on
one side of the termination at opposing corners (yeah, I know melfs don't have
corners, but you know what I mean...) and the thing would be cock-eyed across
the pads...it would be 100% on the pads, but with a diagonal skew to it...and
when that happened, there was no fillet on one side of the termination because
there was no pad along that edge, as that's where the U-shaped cut-out
was...do ya' kinda' picture what I'm trying to explain?
I'm not trying to be argumentative here, but I really don't understand
what having a U-shaped cut-out on the pads where there's no solder paste
printed, have over a square pad where there IS some nice tacky solder paste
printed, to keep a melf from rolling around on ya'...
It's been quite a while ago, but I built this video switching board for a
company called Utah Scientific...it was a analog board and had a bunch of what
I guess were called channels on it. Basically, it was a pattern of SOT's,
resistors, capacitors, and melfs, that repeated itself a bunch of times across
the board...there must have been 1,200 components on that lil' bugger...it
would sit in a CP-4 for about 7-8 minutes, no kiddin'!
But out of the 1,200 components, there probably was 50-60 melfs and they had
square pads, and I never once had a problem with them rolling on me...
-Steve Gregory-
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=========================================================================
Date: Thu, 25 Jun 1998 17:22:36 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Douglas Mckean <[log in to unmask]>
Organization: Auspex Systems
Subject: Re: tantalum caps
MIME-Version: 1.0
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I'd be very interested in hearing of anyone's
experience with polarized caps that survive
reverse polarity in circuit with power applied
over a long period of time. We have done a
test with a SMT style cap that just sits there
for a while doing nothing. I'm familiar with
reversed caps blowing up within a short period
of time. These are different. 5 volt level
but tons of current if demanded.
Any ideas? We are talking to the cap mfr,
but it's not getting anywhere ...
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=========================================================================
Date: Fri, 26 Jun 1998 09:54:52 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Eddie Brunker <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Eddie Brunker <[log in to unmask]>
Subject: Intrusive reflow and all
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Phil Z,
Like your comment about not creating a differential between the two sides of
the assembly. I'm with you all the way on that.
Sorry for putting down your book suggestion.
Keep up the good work.
Regards
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=========================================================================
Date: Fri, 26 Jun 1998 02:19:02 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Fred Axon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Fred Axon <[log in to unmask]>
Subject: Soldermask flaking in immersion gold process -Reply -Reply
X-To: [log in to unmask]
X-cc: [log in to unmask],
[log in to unmask],
[log in to unmask], [log in to unmask]
Keith, further to our discussion, I would like to confirm the action items:
The reason for failure is due to insufficient soldermask thickness over
conductors. During my last visit, plating thickness control was
discussed.
To improve the current situation please do the following:
1) Mesh size use a 38 T screen for boards that require NiAu.
2) Compare the results / process consistency by evaluating a partial
cure process.
Cure boards for 30 minutes at 150C, plate, and then cure for another 30
minutes.
With regard to plating process control, you may want to discuss this with
Barry, conductor heights in the range of 85 / +100 microns are difficult to
reliably encapsulate.
I have spoken to Tony Hunt, he will contact you shortly. In the meantime if
you would like to discuss further please give me a call.
Regards
Fred
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=========================================================================
Date: Fri, 26 Jun 1998 08:15:27 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Karl Sweitzer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Karl Sweitzer <[log in to unmask]>
Organization: Image Acquisition Systems http://www.kodak.com/cgsHome/ias.shtml
Subject: Re: Copper Invar Copper
X-To: Robert Jordan <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Robert,
Copper Invar Copper (CIC) is a Texas Industries "foil" product for
multi layer boards that was designed to give the resulting board a low
CTE (coefficient of thermal expansion). The copper is metallurgically
roll bonded to both sides of a foil layer of Invar (a nickel iron
alloy that has very low CTE). Invar also has low thermal conductivity
(much lower than copper). Arlon (among others (not necessarily an
endorsement :)) makes a laminate core material using CIC. Resulting
board CTE using CIC and polyimide are 9-12 ppm-C (compared to 16-18
ppm-C for standard polyimide GI(J,L,N) boards). Talk to your board
vendors about processing concerns and cost.
--
Karl Sweitzer voice: 716.47.77546
Eastman Kodak Company pager: 716.25.33681
800 Lee Road fax: 716.47.77293
Rochester, NY 14650-3118 mailto:[log in to unmask]
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=========================================================================
Date: Fri, 26 Jun 1998 07:09:17 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: dross in the solder pot
X-To: [log in to unmask]
Mime-Version: 1.0
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This may be an obvious question, but does your board get a significant
amount of flux before going through the process? Is it the whole board
that gets these strings of dross or is it the leading edge or the trailing
edge of the board? Does your solder sit idle before it is being used? I
have seen in the past if I miss the leading edge of the board or the
trailing edge with flux, I see these same results. My waves run at a
resting speed until there is a board coming through. If there is too much
oxygen in the tunnel, a layer of dross will form.
Rob Williams
"<Jason M. Smith>" <[log in to unmask]> on 06/25/98 03:07:38 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to [log in to unmask]
To: [log in to unmask]
cc: (bcc: Rob Williams/Westell/EIT)
Subject: Re: [TN] dross in the solder pot
Experts, I am currently getting alot of failures at my functional tester.
At my post solder station, I am noticing strings of dross across the pins
of connectors. We are having to dedross the pot daily....for a no-clean
process and inerted atmosphering, I think this is a bit extreme. Once, an
operator managed to accidently put stencil cleaner in the flux....could
this cause a reaction unable to be corrected without dumping the pot and
cause excess dross. I initially thought we had too much exhaust drawing
all nitrogen away from the wave. Our flux manufacturer did analyis and has
determined that it's not the residues left which is causing my bridges at
functional. Is a type 'C' solder analysis going to tell me anything of
significance to my problem from any of your experiences? Any
suggestions????
Jason Smith
Process Materials Engineer
Lexmark Electronics
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=========================================================================
Date: Fri, 26 Jun 1998 08:35:18 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ed Holton <[log in to unmask]>
Subject: Re: dross in the solder pot
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Have you checked what the O2 level is at your solder pot? You are
absolutely right, if you have an inerted system, you should not have this
issue, nor should you have to de-dross daily, but not knowing whose machine
you are using or what your volume is, the frequency of de-drossing is
different. Dross is chiefly produced by the burning of oxides. More dross
is generated running in open air than in nitrogen, eliminate the oxygen and
you eliminate (mostly) the dross. If you are de-drossing the pot nightly
you have too much oxygen in your system. An O2 monitor at the wave area
should tell you what is happening (Note: not with the contour wave,
because the N2 blanket is not complete until after the board is over the
wave and trapping the N2, the O2 monitor will only work with a full tunnel
system)
Here is my hypothesis, based on something I have seen:
The conditions: increased levels of O2 in the tunnel
The second wave only spills over the front, not over the back
(this is common in some inerted wave systems). The back
gate is set high so solder does not spill over the back(factory setting).
The second wave has a standby mode, only runs at full speed when
the board is present.
What happens: the smooth wave gets a thin layer of dross (or a skin) over
the surface of the solder while it sits in standby mode waiting for the
next board, due to the increased amount of O2 in the system. When the wave
activates, solder spills over the front. Some of the dross "skin" moves
with the solder as it falls over the front, but not all. As the board
passes over the wave and exits, the component leads (especially connectors)
grab this "skin" of dross and drag it off the pot, and voila! you have the
solder short! What is not happening, that is normal with most open air
system, is that as the board passes over the smooth wave, the leading edge
of the board acts like a plow and pushes any dross that accumulated on the
smooth wave over the back gate. My inerted machines have the back gate
raised on the smooth wave so the solder will only fall over the front.
(some wave solder manufacturers have the A wave instead of the smooth wave,
that basically negates the above issue)
The flux issue shouldn't be the problem, though in this situation, in open
air, insufficient flux will also lead to bridging. The stuff that was
mixed in with the flux, I would think has been burned off by now and should
not contaminate the solder pot
Ed Holton
Hella Electronics
[log in to unmask] on 06/25/98 04:07:38 PM
Please respond to [log in to unmask]; Please respond to [log in to unmask]
To: [log in to unmask]
cc: (bcc: Ed Holton/Hella North America Inc.)
Subject: Re: [TN] dross in the solder pot
Experts, I am currently getting alot of failures at my functional tester.
At my post solder station, I am noticing strings of dross across the pins
of connectors. We are having to dedross the pot daily....for a no-clean
process and inerted atmosphering, I think this is a bit extreme. Once, an
operator managed to accidently put stencil cleaner in the flux....could
this cause a reaction unable to be corrected without dumping the pot and
cause excess dross. I initially thought we had too much exhaust drawing
all nitrogen away from the wave. Our flux manufacturer did analyis and has
determined that it's not the residues left which is causing my bridges at
functional. Is a type 'C' solder analysis going to tell me anything of
significance to my problem from any of your experiences? Any
suggestions????
Jason Smith
Process Materials Engineer
Lexmark Electronics
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=========================================================================
Date: Fri, 26 Jun 1998 13:27:10 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Chris Hunt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Chris Hunt <[log in to unmask]>
Subject: Re: Copper Invar Copper
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII; X-MAPIextension=".TXT"
Content-Transfer-Encoding: 7bit
Karl
Is there a contact at TI for the CIC material ?
Chris Hunt
NPL
>>Reply to your message of 26/06/98 13:15
>Robert,
>
>Copper Invar Copper (CIC) is a Texas Industries "foil" product for
>multi layer boards that was designed to give the resulting board a low
>CTE (coefficient of thermal expansion). The copper is metallurgically
>roll bonded to both sides of a foil layer of Invar (a nickel iron
>alloy that has very low CTE). Invar also has low thermal conductivity
>(much lower than copper). Arlon (among others (not necessarily an
>endorsement :)) makes a laminate core material using CIC. Resulting
>board CTE using CIC and polyimide are 9-12 ppm-C (compared to 16-18
>ppm-C for standard polyimide GI(J,L,N) boards). Talk to your board
>vendors about processing concerns and cost.
>--
>Karl Sweitzer voice: 716.47.77546
>Eastman Kodak Company pager: 716.25.33681
>800 Lee Road fax: 716.47.77293
>Rochester, NY 14650-3118 mailto:[log in to unmask]
>
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>
>
>>End of message
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=========================================================================
Date: Fri, 26 Jun 1998 08:48:52 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Aric parr <[log in to unmask]>
Subject: Re: dross in the solder pot
Check your flux deposition and spray pattern.
I periodically see this with insufficient flux, when the fluxer needs
maintenance, or if all the flux burns off in the chip wave.
Use fax paper on the bottom of a PCB to analyze your spray pattern for
spray issues.
ARIC PARR
Sr. Manufacturing Engineer
Eaton Corp
1400 S. Livernois
P. O. Box 5020
Rochester Hills, Mi 48308-5020
[log in to unmask]
248 608 7780
Fax: 248 656 2242
-------------
Original Text
From: C=US/A=INTERNET/DDA=ID/TechNet(a)IPC.ORG, on 6/25/98 4:19 PM:
To: Aric Parr@01635@Lectron_RH,
EatonWHQ@CorpMail@WHQCleveOH[C=US/A=INTERNET/DDA=ID/TechNet(a)IPC.ORG]
Experts, I am currently getting alot of failures at my functional tester.
At my post solder station, I am noticing strings of dross across the pins
of connectors. We are having to dedross the pot daily....for a no-clean
process and inerted atmosphering, I think this is a bit extreme. Once, an
operator managed to accidently put stencil cleaner in the flux....could
this cause a reaction unable to be corrected without dumping the pot and
cause excess dross. I initially thought we had too much exhaust drawing
all nitrogen away from the wave. Our flux manufacturer did analyis and has
determined that it's not the residues left which is causing my bridges at
functional. Is a type 'C' solder analysis going to tell me anything of
significance to my problem from any of your experiences? Any
suggestions????
Jason Smith
Process Materials Engineer
Lexmark Electronics
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=========================================================================
Date: Fri, 26 Jun 1998 09:15:44 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ed Holton <[log in to unmask]>
Subject: Re: dross in the solder pot
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
This works great with an alcohol based flux, because the thermal fax paper
is sensitive to alcohol. I have not had success with this with the water
based flux, the thermal paper did not absorb the water and the results were
inconclusive, because the flux just beaded up!
[log in to unmask] on 06/26/98 08:48:52 AM
Please respond to [log in to unmask]; Please respond to [log in to unmask]
To: [log in to unmask]
cc: (bcc: Ed Holton/Hella North America Inc.)
Subject: Re: [TN] dross in the solder pot
Check your flux deposition and spray pattern.
I periodically see this with insufficient flux, when the fluxer needs
maintenance, or if all the flux burns off in the chip wave.
Use fax paper on the bottom of a PCB to analyze your spray pattern for
spray issues.
ARIC PARR
Sr. Manufacturing Engineer
Eaton Corp
1400 S. Livernois
P. O. Box 5020
Rochester Hills, Mi 48308-5020
[log in to unmask]
248 608 7780
Fax: 248 656 2242
-------------
Original Text
From: C=US/A=INTERNET/DDA=ID/TechNet(a)IPC.ORG, on 6/25/98 4:19 PM:
To: Aric Parr@01635@Lectron_RH,
EatonWHQ@CorpMail@WHQCleveOH[C=US/A=INTERNET/DDA=ID/TechNet(a)IPC.ORG]
Experts, I am currently getting alot of failures at my functional tester.
At my post solder station, I am noticing strings of dross across the pins
of connectors. We are having to dedross the pot daily....for a no-clean
process and inerted atmosphering, I think this is a bit extreme. Once, an
operator managed to accidently put stencil cleaner in the flux....could
this cause a reaction unable to be corrected without dumping the pot and
cause excess dross. I initially thought we had too much exhaust drawing
all nitrogen away from the wave. Our flux manufacturer did analyis and has
determined that it's not the residues left which is causing my bridges at
functional. Is a type 'C' solder analysis going to tell me anything of
significance to my problem from any of your experiences? Any
suggestions????
Jason Smith
Process Materials Engineer
Lexmark Electronics
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For technical support contact Hugo Scaramuzza at [log in to unmask] or
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=========================================================================
Date: Fri, 26 Jun 1998 09:51:07 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brett Goldstein <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
Comments: Authenticated sender is <[log in to unmask]>
From: Brett Goldstein <[log in to unmask]>
Subject: Pinholes in reflowed SMT
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7BIT
I wonder if anyone out there can help me with this problem. We've
been observing multiple pinholes in the solder joints of SMT
components (0603 and 0805 resistors and caps) that were reflowed in a
batch reflow oven. These parts are being reflowed on ceramic
hybrids. The process flow is to print solder paste on the hybrids,
reflow the solder paste, apply some paste flux, place the components,
and then reflow the hybrids again. (We use this process because we
may manufacture 100 or so of the ceramic substrates at once, but then
place components on only a few per day.) Any idea why we getting
these pinholes?
Thanks for your help.
Brett Goldstein
EVI, Inc.
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=========================================================================
Date: Fri, 26 Jun 1998 09:08:03 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Hempton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Hempton <[log in to unmask]>
Subject: Re: See items stated (melfs)
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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Stephen, Steve and Charlie,
Hey, remember where the definition of MELF derives from....
"Most End-up Lying on the Floor"
(sorry, but it IS Friday, lighten-up!)
Seriously, we have always used common square pads and had very little
problem. And it is the same old story, paste and profile play a part.
Regards!
Jeff Hempton
United Technology Electronic Controls
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=========================================================================
Date: Fri, 26 Jun 1998 07:52:16 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Juanita Zeinstra <[log in to unmask]>
Subject: Re[2]: [TN] Poor Solderability on TSOPs
X-To: George Milad <[log in to unmask]>
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or hand solder -- that seems to work because of higher temperatures
______________________________ Reply Separator _________________________________
Subject: Re: [TN] Poor Solderability on TSOPs
Author: "(George Milad)" <[log in to unmask]> at SMTPpost
Date: 6/25/98 6:49 PM
Check the incoming TSOPs, if they are made from Alloy 42 you may need to
adjust your reflow parameters to higher temperatures to accomodate this
finish.
George Milad
LeaRonal Inc
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Date: Fri, 26 Jun 1998 09:46:00 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Gonnerman <[log in to unmask]>
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From: David Gonnerman <[log in to unmask]>
Subject: Whew!
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My computer started smoking - I'm glad that wasn't directed at me!
-David
David Gonnerman
Director of Publications
Plan now to attend:
Surface Mount International (San Jose, CA; 8/23-8/27;
http://www.surfacemount.com)
Electronics Assembly Expo (Providence, RI; 10/24-10/29; http://www.ipc.org)
SURFACE MOUNT TECHNOLOGY ASSOCIATION
Enabling members to achieve success
in surface mount and companion technologies
through education, training and access to knowledge.
5200 Willson Road, Suite 215, Edina, MN 55424-1343
612-920-7682 F 612-926-1819
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Date: Fri, 26 Jun 1998 10:41:41 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Alan Kreplick <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Alan Kreplick <[log in to unmask]>
Subject: Thru-hole Reliability
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I have a board that is .250" thick with 34 layers with 1 and 2 oz. copper. I
have been able to achieve a 25-50% hole fill both by hand and wave soldering.
The only component that is being soldered are sixty-four tantalum capacitors
(assembled with a partial clinch).
We normally follow IPC's 75% hole fill guideline.
Is the solder connection reliable both electrically and mechanically (we build
ATE products that do not require thermal cycles or vibration tests)?
Is 25-50% of .250 (.062"-.125") hole fill more reliable than a 75% hole fill on
a .060" board (.045 hole fill)? I've used this argument to say that it is more
reliable even though it does not meet the 75% hole fill criteria.
Thanks for any help,
Al Kreplick
Sr. Mfg. Eng.
Teradyne, Inc.
617-422-3726
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Date: Fri, 26 Jun 1998 11:12:58 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kuczynski Michael <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kuczynski Michael <[log in to unmask]>
Subject: Teardropping BGA's
X-cc: [log in to unmask]
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Is anybody out there using "teardropping" on their BGA's footprints ?
Any pro's/con's to doing this would be appreciated.
Thanks In Advance,
Michael Kuczynski 201-393-2122 (Phone)
Allied Signal 201-393-6688 (Fax)
688 Rt46E E/K4
Teterboro NJ 07608
[log in to unmask]
[log in to unmask]
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Date: Fri, 26 Jun 1998 11:20:44 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Rudy Sedlak>" <[log in to unmask]>
Subject: Re: Fab: plug vias
X-To: [log in to unmask]
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In a message dated 98-06-25 10:18:12 EDT, you write:
<< > If the solder mask in the vias has been cured (full plug), is there
> any
> > way to remove it without damaging the boards ? There's no solder
> mask
> > on the surface beside in the vias. Thanks.
> > >>
Richard:
A number of vendors to the PCB industry make strippers that stripped full
cured LPI, they do not do it fast, and there can be, but is not always, some
attack on the buttercoat. We have seen that inexpensive laminate is more
suceptible (sp?) to attack than the costlier stuff (What a surprise!).
If you want more info on one of the better ones available, contact me directly
please.
Rudy Sedlak
RD Chemical Company
Mountain View CA
phone: 650-962-8004
fax 650-962-0370
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Date: Fri, 26 Jun 1998 10:27:21 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Don Vischulis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: PWB Layer Stack-up
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Bob,
I agree with John on the FR4 properties, but keep in mind that those figures are for voltages
applied perpindicular to laminations (between layers). The breakdown voltage parallel to
laminations (on the same layer) is on the order of 45 volts per mil. Both figures do not have a
safety factor applied.
If you apply a factor of 3 or 4 (assume that failure occurs at 1/3 to 1/4 of the above values) and
design around the peak voltage rather than the RMS voltage, everything should work out.
Don Vischulis
ITO Industries
John Parsons wrote:
> Bob,
>
> FR4 prepreg has the same characteristics as FR4 laminate in this
> respect. Contact your board vendor for the exact specs of the
> material they use but the Electrical Strength will probably be around
> 1000-1100 volts/mil.
>
> Regards
>
> John Parsons
> Circuit Graphics Ltd.
>
> > Hi All,
> >
> > I have a question concerning the layer stack-up of a board that I am
> > designing for an engineer who is concerned about the voltage isolation
> > provided by the pre-preg material between the layers. The design is for a
> > power supply board that will be 4 layers/0.094" thick with 2 oz. copper
> > on all layers and will contain max voltages of 240 VAC. It also must meet
> > certain CE agency guidelines. He feels that the pre-preg material doesn't
> > provide the voltage isolation needed that FR-4 provides. So to maintain
> > certain high voltage clearances, he wants to fabricate the board with 2
> > double-sided copper clad laminates and use pre-preg between layers 2 & 3.
> > Some other sources tell me that pre-preg contains the same
> > characteristics of FR-4 when cured and thus the cost of the board would
> > be less if 1 double-sided copper clad laminate was used with foil on each
> > of the outside layers and pre-preg being used between layers 1 & 2 and 3
> > & 4. Is this true and can anyone supply me with technical info comparing
> > FR-4 to pre-preg materials and also help me in understanding the most
> > cost effective way to fabricate this board. He would also like to use
> > more than 2 oz. copper, but I'm told that 2 oz. is more common than 3
> > oz., so we are making every effort to use 2 oz. unless someone can tell
> > me of a process that is available that will not add too much cost to the
> > board and provide a higher copper content. Any help would be greatly
> > apprreciated.
> >
> > Regards,
> > Bob Walker
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=========================================================================
Date: Fri, 26 Jun 1998 11:28:28 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ed Holton <[log in to unmask]>
Subject: Re: Nitrogen in the wavesolderingproces
X-To: [log in to unmask]
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I have found that the nitrogen helps open up the process window of the wave
solder process, particularly with the use of no-clean flux. Reference my
previous reply to another message concerning my feelings and the benfits of
nitrogen. Another reply stated that if solderability of the boards and
components was good, and you used the proper flux, that nitrogen was not
needed, in theory I agree, and at my facility the shelf life of my
components and boards is very short. In theory, if everything is
solderable, you do not need flux. But this is the real world, and we need
to be able to accomodate that reel of components that sat somewhere for 6
months, and may have solderability problems. Plus, when you are attempting
to reach six sigma levels of quality (I know, not possible with the wave
operation, but I am at 4 sigma now!), you want to take advantage of
everything you can. What is the cost of quality? Thus, I continue to use
nitrogen to enhance my process. Anyway, the nitrogen helps with the
soldering, changing the way solder flows, etc. What it did, was get rid of
the random defects, so any wave solder defects that occured were easily
identifiable as design defects. Nitrogen also fixed some solder defects
that occured due to questionable pad designs.
How much solder will you save with nitrogen? Cannot give a hard and fast
answer, depends on amount of time in production and a few other factors.
When I did my cost analysis, I was conservative. I knew how much solder
we bought per year and how much dross we created per year. I decided the
difference was how much solder was used in production (stayed on the
board). I made a one to one correlation then between the dross and
remaining solder purchesed. Reduce the dross and we would have to buy less
solder. Presently, we were de-drossing once per day. I decided that with
the nitrogen system, the solder pot would have to be de-drossed once per
week. I extrapolated and decided that one days worth of dross with my
existing machine would equal one weeks worth of dross with my nitrogen
machine. This was backed up by info from SEHO, Electrovert, and existing
users. Eliminate 4/5 of the dross and you eliminate 4/5 of the solder
purchased that generated the dross. The math can be done from there.
Don't forget you are now buying less solder, have less dross to
reclaim(hazardous waste) and to include the cost savings due to reduced
maintenance time. Before I am attacked by others for my assumptions, I had
very little data to work with, luckily I was conservative in my numbers and
the actual cost savings were greater than expected. I too would be
interested in what others have found. While it is not a direct
correlation, I found that the savings due to dross reduction pay for the
nitrogen used in the system. Thus your cost savings is due to improved
quality, reduced maint. time, and a more robust process.
Consumption of nitrogen can be determined by the machine. Each vendor will
tell you how much N2 the system will use, measured in cubic feet per minute
(or its metric equivalent)
Other cost savings have been addressed in other responses. if you have any
questions, please call
Ed Holton
Hella Electronics
734-414-0944
[log in to unmask] on 06/25/98 04:04:04 PM
Please respond to [log in to unmask]; Please respond to [log in to unmask]
To: [log in to unmask]
cc: (bcc: Ed Holton/Hella North America Inc.)
Subject: Re: [TN] Nitrogen in the wavesolderingproces
Hi all,
I have a few questions like to get the answer from the expertises:
1. Nitrogen being used on the wave process, what kind of process
improvement do we achieve? I heard people said that they have better
joint, better reflow.....
2. If it helps to reduce drossing of solder, how much solder do we save
monthly? How much dross produce/reduce each month? (Use % for
calculation).
3. How much nitrogen consumption in a month? (Let's say the machine runs
2 shifts in 22 days/month).
How can I measure/justify of using nitrogen in the process in terms of
quality and savings?
Your answer would be a great help for me.
Thanks
Simon Shin
> ----------
> From: superflx[SMTP:[log in to unmask]]
> Sent: Thursday, June 25, 1998 1:19 PM
> To: [log in to unmask]
> Subject: Re: [TN] Nitrogen in the wavesolderingproces
>
> If you use a No-Clean flux with clean, fresh components and new HAL or
> OSP boards, the nitrogen will add, marginally, to the process.? If you
> use a water-soluble flux, the nitrogen does not add anything as the
> flux will overcome any oxidation problems.
> Our experiuence has been that Nitrogen doesn't necessarily add
> anything to the soldering process, but helps reduce drossing of
> solder.? If reducing dross can help save money relative to the cost of
> nitrogen, then its a worthwhile investment.
> Phil
> Jesper Kj?rnulf Konge wrote:
> ?? At our factory we are going to have a new waesolderingmachine
> with nitrogensupport. But our director dosen't think that we need the
> nitrogen because it has no effect compared to the price that we have
> to pay. But in me department we dosen't aggree.?? I would like to hear
> about your experience with nitrogen so that we can tell our director
> that it isn't just us that thinks that nitrogen soldering is good. And
> if anyone has a meaning about the Seho MWS-8200 PWR i would like to
> hear that too.?With Regards?Jesper KongeDanica Supply A/SDenmark?Mail
> : [log in to unmask] <mailto:[log in to unmask]>
>
>
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=========================================================================
Date: Fri, 26 Jun 1998 11:40:30 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Hempton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Hempton <[log in to unmask]>
Subject: Pinholes in reflowed SMT
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Brett,
There is some of your processing info missing that would help give you
a better answer.
1) Do you clean, and with what, after the hybrids are reflowed the first time?
2) Are you printing a thickfilm conductor or is this a thinfilm solderable on
ceramic. What type of conductor is it (i.e., Pt/Ag, Pt/Pd/Ag, etc??)?
3) What thickness is your ceramic?
4) Have you profiled?? Those ceramics soak a heck of a lot of heat, ya know.
I have had some similar problems with a Pt/Pd/Au thickfilm conductor that was
printed over dielectric. The material was sensitive to shelf life, since the
platinum seemed to "oxidize" somewhat, but N2 storage helped.
Also, I remember having similar problems when we were co-firing thickfilm
dielectrics and solderable conductors...the material that was burning off the
dielectric during firing was detrimental to the solderability of the conductor.
Again, more process info could probably provide some better answers.
Good Luck.
Jeff Hempton
United Technologies Electronic Controls
______________________________ Forward Header __________________________________
Subject: [TN] Pinholes in reflowed SMT
Author: Brett Goldstein <[log in to unmask]> at Internet
Date: 6/26/98 9:51 AM
I wonder if anyone out there can help me with this problem. We've
been observing multiple pinholes in the solder joints of SMT
components (0603 and 0805 resistors and caps) that were reflowed in a
batch reflow oven. These parts are being reflowed on ceramic
hybrids. The process flow is to print solder paste on the hybrids,
reflow the solder paste, apply some paste flux, place the components,
and then reflow the hybrids again. (We use this process because we
may manufacture 100 or so of the ceramic substrates at once, but then
place components on only a few per day.) Any idea why we getting
these pinholes?
Thanks for your help.
Brett Goldstein
EVI, Inc.
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=========================================================================
Date: Fri, 26 Jun 1998 09:32:43 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
bob metcalf <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: bob metcalf <[log in to unmask]>
Subject: Soldermask flaking in immersion gold process -Reply
X-To: [log in to unmask]
X-cc: [log in to unmask], [log in to unmask],
[log in to unmask]
Mr Baverstock, Morton Electronic Materials have a patented process for
LPI application for use in electroless Ni Au. We have had a great deal of
success using this process. If you would like to give me a call, I would be
happy to discuss the details with you.
Bob Metcalf
Morton Electronic Materials USA
714-730-8356
>>> Keith Baverstock <[log in to unmask]> 06/25/98 02:54am >>>
Can anyone help...
It is well known that LPI soldermask can be problematic when put through
immersion nickel/gold process.
What 'fixes' are being used?
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=========================================================================
Date: Fri, 26 Jun 1998 09:47:10 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Wally Doeling (wallyd)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Wally Doeling (wallyd)" <[log in to unmask]>
Subject: Re: Thru-hole Reliability
X-To: Alan Kreplick <Alan_Kreplick@NOTES.TERADYNE.COM>
We have been using the 75% rule on a .155" thick board for two years
of production with excellent results!
This has been used on connectors and DC-DC's, hundreds of connections
per board.
No problems in the field...
[log in to unmask]
-----Original Message-----
From: Alan Kreplick [SMTP:[log in to unmask]]
Sent: Friday, June 26, 1998 7:42 AM
To: [log in to unmask]
Subject: [TN] Thru-hole Reliability
I have a board that is .250" thick with 34 layers with 1 and 2 oz.
copper. I
have been able to achieve a 25-50% hole fill both by hand and wave
soldering.
The only component that is being soldered are sixty-four tantalum
capacitors
(assembled with a partial clinch).
We normally follow IPC's 75% hole fill guideline.
Is the solder connection reliable both electrically and mechanically
(we build
ATE products that do not require thermal cycles or vibration tests)?
Is 25-50% of .250 (.062"-.125") hole fill more reliable than a 75%
hole fill on
a .060" board (.045 hole fill)? I've used this argument to say that
it is more
reliable even though it does not meet the 75% hole fill criteria.
Thanks for any help,
Al Kreplick
Sr. Mfg. Eng.
Teradyne, Inc.
617-422-3726
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=========================================================================
Date: Fri, 26 Jun 1998 12:22:23 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMonagle, Michael R." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMonagle, Michael R." <[log in to unmask]>
Subject: Re: Thru-hole Reliability
X-To: Alan Kreplick <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
If you have already done everything you can with wave parameters such as
preheat/speed/dwell/flux activity you now have a quandry with quality
assurance and possibly end users. You may want to approach it from the
same way you would prove integrity of an intrusive reflow/pin in paste
connection. If you cannot achieve acceptable volume per industry spec,
you need to assure quality/engineering/customer of a robust
physical/electrical connection. Begin by cross sectioning a variety of
connections on a few boards to get real average expected volume
measurements under your existing process and to show
consistency/repeatability. It will also show that the joint, though
minimal, has no hidden voids which would further reduce volume. You can
then take non-cross sectioned joints from the same boards and perform
pull testing to demonstrate physical integrity. Pull testing will
normally prove that either the pin breaks before the joint, or the whole
barrel will come out of the board with the pin. Rarely (I have never
seen) will the solder joint itself fail. Best of luck....
> -----Original Message-----
> From: Alan Kreplick [SMTP:[log in to unmask]]
> Sent: Friday, June 26, 1998 9:42 AM
> To: [log in to unmask]
> Subject: [TN] Thru-hole Reliability
>
> I have a board that is .250" thick with 34 layers with 1 and 2 oz.
> copper. I
> have been able to achieve a 25-50% hole fill both by hand and wave
> soldering.
> The only component that is being soldered are sixty-four tantalum
> capacitors
> (assembled with a partial clinch).
>
> We normally follow IPC's 75% hole fill guideline.
>
> Is the solder connection reliable both electrically and mechanically
> (we build
> ATE products that do not require thermal cycles or vibration tests)?
>
> Is 25-50% of .250 (.062"-.125") hole fill more reliable than a 75%
> hole fill on
> a .060" board (.045 hole fill)? I've used this argument to say that
> it is more
> reliable even though it does not meet the 75% hole fill criteria.
>
>
> Thanks for any help,
>
>
> Al Kreplick
> Sr. Mfg. Eng.
> Teradyne, Inc.
> 617-422-3726
>
> ################################################################
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=========================================================================
Date: Fri, 26 Jun 1998 14:52:20 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Hurst, Joe" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Hurst, Joe" <[log in to unmask]>
Subject: Re: oil well drilling pad material specs
X-To: Jayne Benson <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Jayne
Sorry if I'm wrong, but was this meant to be sent on April 1st. ;)
Regards
Joe Hurst
> -----Original Message-----
> From: Jayne Benson [SMTP:[log in to unmask]]
> Sent: Thursday, June 25, 1998 5:41 PM
> To: [log in to unmask]
> Subject: [TN] oil well drilling pad material specs
>
> Does anyone know of any oil well drill pad material specs? I'm trying to
> get rid of some fly ash and was wondering what the industry standard was
> on
> the materials used to make drill pads. Please write back if you have any
> suggestions!
>
> Thanks-
> Jayne Benson
>
> ################################################################
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=========================================================================
Date: Fri, 26 Jun 1998 12:49:26 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Vaughan, Ralph H" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Vaughan, Ralph H" <[log in to unmask]>
Subject: Re: Thru-hole Reliability
X-To: "McMonagle, Michael R." <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Al,
I agree with other comments that it shouldn't be too difficult to
demonstrate joint reliability with destructive testing, but if your
customers are like some I know, they my think that the letter of the
spec is the only definition of acceptability. If so, we have improved
heavy board solderability by pre-heating to around 200'F just before
placing on the solder conveyor. This is not very handy 'cause the part
is so hot, but it may get you over the hump.
Ralph Vaughan
Boeing-Atlanta
> ----------
> From: McMonagle, Michael R.[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;McMonagle, Michael R.
> Sent: Friday, June 26, 1998 1:22 PM
> To: [log in to unmask]
> Subject: Re: [TN] Thru-hole Reliability
>
> If you have already done everything you can with wave parameters such
> as
> preheat/speed/dwell/flux activity you now have a quandry with quality
> assurance and possibly end users. You may want to approach it from the
> same way you would prove integrity of an intrusive reflow/pin in paste
> connection. If you cannot achieve acceptable volume per industry spec,
> you need to assure quality/engineering/customer of a robust
> physical/electrical connection. Begin by cross sectioning a variety of
> connections on a few boards to get real average expected volume
> measurements under your existing process and to show
> consistency/repeatability. It will also show that the joint, though
> minimal, has no hidden voids which would further reduce volume. You
> can
> then take non-cross sectioned joints from the same boards and perform
> pull testing to demonstrate physical integrity. Pull testing will
> normally prove that either the pin breaks before the joint, or the
> whole
> barrel will come out of the board with the pin. Rarely (I have never
> seen) will the solder joint itself fail. Best of luck....
>
> > -----Original Message-----
> > From: Alan Kreplick [SMTP:[log in to unmask]]
> > Sent: Friday, June 26, 1998 9:42 AM
> > To: [log in to unmask]
> > Subject: [TN] Thru-hole Reliability
> >
> > I have a board that is .250" thick with 34 layers with 1 and 2 oz.
> > copper. I
> > have been able to achieve a 25-50% hole fill both by hand and wave
> > soldering.
> > The only component that is being soldered are sixty-four tantalum
> > capacitors
> > (assembled with a partial clinch).
> >
> > We normally follow IPC's 75% hole fill guideline.
> >
> > Is the solder connection reliable both electrically and mechanically
> > (we build
> > ATE products that do not require thermal cycles or vibration tests)?
> >
> > Is 25-50% of .250 (.062"-.125") hole fill more reliable than a 75%
> > hole fill on
> > a .060" board (.045 hole fill)? I've used this argument to say that
> > it is more
> > reliable even though it does not meet the 75% hole fill criteria.
> >
> >
> > Thanks for any help,
> >
> >
> > Al Kreplick
> > Sr. Mfg. Eng.
> > Teradyne, Inc.
> > 617-422-3726
> >
> > ################################################################
> > TechNet E-Mail Forum provided as a free service by IPC using
> LISTSERV
> > 1.8c
> > ################################################################
> > To subscribe/unsubscribe, send a message to [log in to unmask] with
> > following text in the body:
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> > additional information.
> > For technical support contact Hugo Scaramuzza at [log in to unmask] or
> > 847-509-9700 ext.312
> > ################################################################
>
> ################################################################
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> For technical support contact Hugo Scaramuzza at [log in to unmask] or
> 847-509-9700 ext.312
> ################################################################
>
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=========================================================================
Date: Fri, 26 Jun 1998 16:12:55 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: Thru-hole Reliability
X-To: [log in to unmask]
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Hi Al,
For most applications, the 75% rule is overkill; there are tens of thousands
of single-sided PCBs [= 0% fill] in under-the-hood automotive applications
[the worst loading environment for the mosr commonapplications] that, unless
there are some other dumb design features, last the life of the car.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask]
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=========================================================================
Date: Fri, 26 Jun 1998 17:12:08 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Yves Trudell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Yves Trudell <[log in to unmask]>
Subject: Re: Thru-hole Reliability
X-To: "Vaughan, Ralph H" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
MIME-version: 1.0
Content-type: text/plain; charset="iso-8859-1"
One note to add. I was faced with the same type of issue a few years back
with 50% vertical fill. I left the company before any of the product failed
in the field ;-)
But seriously, the biggest issue that I wrestled with at that time was the
thought of pcb defects that are "covered up" by good vertical hole fill,
such as cracked barrels. A cracked barrel that is filled with solder may
never cause a problem, but one that is void of solder at the location of the
crack can result in intermittent connection between two layers... resulting
in field failure. I personally never came across such a failure, but I was
told (by a reputable source) that it has happened.
Good luck
> -----Original Message-----
> From: Vaughan, Ralph H [SMTP:[log in to unmask]]
> Sent: Friday, June 26, 1998 1:49 PM
> To: [log in to unmask]
> Subject: Re: [TN] Thru-hole Reliability
>
> Al,
>
> I agree with other comments that it shouldn't be too difficult to
> demonstrate joint reliability with destructive testing, but if your
> customers are like some I know, they my think that the letter of the
> spec is the only definition of acceptability. If so, we have improved
> heavy board solderability by pre-heating to around 200'F just before
> placing on the solder conveyor. This is not very handy 'cause the part
> is so hot, but it may get you over the hump.
>
> Ralph Vaughan
> Boeing-Atlanta
>
> > ----------
> > From: McMonagle, Michael R.[SMTP:[log in to unmask]]
> > Reply To: TechNet E-Mail Forum.;McMonagle, Michael R.
> > Sent: Friday, June 26, 1998 1:22 PM
> > To: [log in to unmask]
> > Subject: Re: [TN] Thru-hole Reliability
> >
> > If you have already done everything you can with wave parameters such
> > as
> > preheat/speed/dwell/flux activity you now have a quandry with quality
> > assurance and possibly end users. You may want to approach it from the
> > same way you would prove integrity of an intrusive reflow/pin in paste
> > connection. If you cannot achieve acceptable volume per industry spec,
> > you need to assure quality/engineering/customer of a robust
> > physical/electrical connection. Begin by cross sectioning a variety of
> > connections on a few boards to get real average expected volume
> > measurements under your existing process and to show
> > consistency/repeatability. It will also show that the joint, though
> > minimal, has no hidden voids which would further reduce volume. You
> > can
> > then take non-cross sectioned joints from the same boards and perform
> > pull testing to demonstrate physical integrity. Pull testing will
> > normally prove that either the pin breaks before the joint, or the
> > whole
> > barrel will come out of the board with the pin. Rarely (I have never
> > seen) will the solder joint itself fail. Best of luck....
> >
> > > -----Original Message-----
> > > From: Alan Kreplick [SMTP:[log in to unmask]]
> > > Sent: Friday, June 26, 1998 9:42 AM
> > > To: [log in to unmask]
> > > Subject: [TN] Thru-hole Reliability
> > >
> > > I have a board that is .250" thick with 34 layers with 1 and 2 oz.
> > > copper. I
> > > have been able to achieve a 25-50% hole fill both by hand and wave
> > > soldering.
> > > The only component that is being soldered are sixty-four tantalum
> > > capacitors
> > > (assembled with a partial clinch).
> > >
> > > We normally follow IPC's 75% hole fill guideline.
> > >
> > > Is the solder connection reliable both electrically and mechanically
> > > (we build
> > > ATE products that do not require thermal cycles or vibration tests)?
> > >
> > > Is 25-50% of .250 (.062"-.125") hole fill more reliable than a 75%
> > > hole fill on
> > > a .060" board (.045 hole fill)? I've used this argument to say that
> > > it is more
> > > reliable even though it does not meet the 75% hole fill criteria.
> > >
> > >
> > > Thanks for any help,
> > >
> > >
> > > Al Kreplick
> > > Sr. Mfg. Eng.
> > > Teradyne, Inc.
> > > 617-422-3726
> > >
> > > ################################################################
> > > TechNet E-Mail Forum provided as a free service by IPC using
> > LISTSERV
> > > 1.8c
> > > ################################################################
> > > To subscribe/unsubscribe, send a message to [log in to unmask] with
> > > following text in the body:
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> > > Please visit IPC web site (http://jefry.ipc.org/forum.htm) for
> > > additional information.
> > > For technical support contact Hugo Scaramuzza at [log in to unmask] or
> > > 847-509-9700 ext.312
> > > ################################################################
> >
> > ################################################################
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> > additional information.
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> > 847-509-9700 ext.312
> > ################################################################
> >
>
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=========================================================================
Date: Fri, 26 Jun 1998 14:21:16 PST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Greetings,
I'm interested in finding an Excellon to Gerber translator. Or some
means to do the same. What I am trying to accomplish is pads only
information from a Protel design database w/o stripping traces.
Idea's?
Thanks, Rich
[log in to unmask]
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=========================================================================
Date: Fri, 26 Jun 1998 14:55:08 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Subject: Re: Teardropping BGA's
X-To: Kuczynski Michael <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
What is "Teardropping"? Please explain it with the pro's and con's.
re,
ken patel
At 11:12 AM 6/26/98 -0400, Kuczynski Michael wrote:
>Is anybody out there using "teardropping" on their BGA's footprints ?
>
>Any pro's/con's to doing this would be appreciated.
>
>Thanks In Advance,
>
>Michael Kuczynski 201-393-2122 (Phone)
>Allied Signal 201-393-6688 (Fax)
>688 Rt46E E/K4
>Teterboro NJ 07608
>[log in to unmask]
>[log in to unmask]
>
>################################################################
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847-509-9700 ext.312
>################################################################
>
>
______________________________________________________
Ken Patel Phone: (408) 490-6804
1708 McCarthy Blvd. Fax: (408) 490-6859
Milpitas, CA 95035 Beeper: (888) 769-1808
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=========================================================================
Date: Fri, 26 Jun 1998 19:41:06 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Anderson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Anderson <[log in to unmask]>
Subject: Re: Teardropping BGA's
X-To: Ken Patel <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Ken:
Teardropping is a procedure used to increase PWB manufacturability by creating extra pad material
to prevent drill breakout from the pad due to possible misregistration and layer thermal
stretching between any specific routing layer and the nc drill layer.
We don't include teardropping in part footprints, at least not yet. As far as specifying
teardropping for BGA footprints IMHO I see no advantage as the size of the BGAs available today
don't cover a large enough area for misregistration and layer thermal stretching to be an issue.
Furthermore, teardropping is typically done as a post processing enhancement. I believe adding
teardrops at the outset may limit routing resources to the point that a BGA may become unroutable
to some degree. Do it at the end if at all.
Patel wrote:
> What is "Teardropping"? Please explain it with the pro's and con's.
>
> re,
> ken patel
>
> At 11:12 AM 6/26/98 -0400, Kuczynski Michael wrote:
> >Is anybody out there using "teardropping" on their BGA's footprints ?
> >
> >Any pro's/con's to doing this would be appreciated.
> >
> >Thanks In Advance,
> >
> >Michael Kuczynski 201-393-2122 (Phone)
> >Allied Signal 201-393-6688 (Fax)
> >688 Rt46E E/K4
> >Teterboro NJ 07608
> >[log in to unmask]
> >[log in to unmask]
> >
> >################################################################
> >TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
> >################################################################
> >To subscribe/unsubscribe, send a message to [log in to unmask] with following
> text in the body:
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> information.
> >For technical support contact Hugo Scaramuzza at [log in to unmask] or
> 847-509-9700 ext.312
> >################################################################
> >
> >
> ______________________________________________________
> Ken Patel Phone: (408) 490-6804
> 1708 McCarthy Blvd. Fax: (408) 490-6859
> Milpitas, CA 95035 Beeper: (888) 769-1808
>
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--
Have a Golden Day,
Paul Anderson
[log in to unmask]
http://www.amherst.com/
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=========================================================================
Date: Fri, 26 Jun 1998 17:32:17 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Joseph Fjelstad <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Joseph Fjelstad <[log in to unmask]>
Subject: Re: Teardropping BGA's
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
One reason for a tear drop or filleted land for BGAs is to help transition
the stress on the trace as it enters the pad allowing a wider entry point
for land defined BGA pads. The technique is commonly used to protect trace
to land interconnects in flex circuits.
>Patel wrote:
>
>> What is "Teardropping"? Please explain it with the pro's and con's.
>>
>> re,
>> ken patel
>>
>> At 11:12 AM 6/26/98 -0400, Kuczynski Michael wrote:
>> >Is anybody out there using "teardropping" on their BGA's footprints ?
>> >
>> >Any pro's/con's to doing this would be appreciated.
>> >
>> >Thanks In Advance,
>> >
>> >Michael Kuczynski 201-393-2122 (Phone)
>> >Allied Signal 201-393-6688 (Fax)
>> >688 Rt46E E/K4
>> >Teterboro NJ 07608
>> >[log in to unmask]
>> >[log in to unmask]
>> >
>> >################################################################
>> >TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c
>> >################################################################
>> >To subscribe/unsubscribe, send a message to [log in to unmask] with
following
>> text in the body:
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>> >################################################################
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>> information.
>> >For technical support contact Hugo Scaramuzza at [log in to unmask] or
>> 847-509-9700 ext.312
>> >################################################################
>> >
>> >
>> ______________________________________________________
>> Ken Patel Phone: (408) 490-6804
>> 1708 McCarthy Blvd. Fax: (408) 490-6859
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>
>
>
>--
> Have a Golden Day,
>
>Paul Anderson
>[log in to unmask]
>http://www.amherst.com/
>
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=========================================================================
Date: Fri, 26 Jun 1998 18:13:04 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Bavaro <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Bavaro <[log in to unmask]>
Subject: Reliability rating
Mime-Version: 1.0
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boundary="============_-1313212504==_ma============"
--============_-1313212504==_ma============
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I recently came across a group of board design engineers who insist that
press fit connectors are more reliable than thru hole soldered connectors.
Given all of the assemblies wavesoldered out in the field that haven't
failed, I have a hard time giving press fit a higher reliability rating.
Does anyone have conclusive data that documents this?
I realize that this assumes a board and process which meets all of the
required specs and the materials are all of acceptable quality.
A second question I have is what happens when the board is changed from
HASL to OSP.
Does the press fit hole size have to change, and does the OSP act like a
lubricant the same way that the solder in the hole has?
All comments are welcomed.
Phillip A. Bavaro
QUALCO/\/\/\/\ Incorporated
Senior Manufacturing Engineer
[log in to unmask]
Tel (619) 658-2542
Fax (619) 658-1584
--============_-1313212504==_ma============
Content-Type: text/enriched; charset="us-ascii"
I recently came across a group of board design engineers who insist
that press fit connectors are more reliable than thru hole soldered
connectors.
Given all of the assemblies wavesoldered out in the field that haven't
failed, I have a hard time giving press fit a higher reliability
rating.
<bold>Does anyone have conclusive data that documents this?
</bold>I realize that this assumes a board and process which meets all
of the required specs and the materials are all of acceptable quality.
A second question I have is what happens when the board is changed from
HASL to OSP.
<bold>Does the press fit hole size have to change, and does the OSP act
like a lubricant the same way that the solder in the hole has?
All comments are welcomed.</bold>
Phillip A. Bavaro
<fontfamily><param>Arial</param><color><param>0000,0000,FFFF</param>QUALCO</color></fontfamily><color><param>0000,0000,FFFF</param><bold><bigger>/\/\/\/\ </bigger></bold>Incorporated
</color>Senior Manufacturing Engineer
[log in to unmask]
Tel (619) 658-2542
Fax (619) 658-1584
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=========================================================================
Date: Sat, 27 Jun 1998 08:47:04 +0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Noppadol S." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Noppadol S." <[log in to unmask]>
Subject: Re: Solder problem
X-To: Ricky Javier <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
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Dear Mr.Ricky,
I have only a little experience to shear the idea with you.
Your problem state on
- Convex solder fillet on the IC lead.
- Grainy on the solder joint.
- Solder does not form a complete fillet on the pad.
There are a few guidelines to verify.
1. The oxidation or incomplete plating on the IC lead, it can interrupt
the solder flowing.
2. Type of IC lead, the solder paste's recommended reflow spec is only the
guideline for manufacturing. Actually, different type of IC or PCB it need
the different reflow profile. For examples;
2.1 Copper lead : require max temp at 210-220 degreeC.
2.2 Alloy42 lead : require max temp at 225-230 degreeC.
2.3 FR4 PCB with Tin/Lead plating : require time above melting point
= 30-60 sec.
2.4 FR4 PCB with gold plating : require time above
melting point = 45-75 sec.
etc. For your getting idea only, there are a lot of factor such as
gold plate thickness, thin gold plating require max temp lower than thick
gold plating.
3. Check your TC wire fixing. The size of TC wire coating is important and
sensitive to temp change especially the small joint such as the IC's. If
possible your profile board should be calibrated, 0 degreeC and 100 degreeC
by use the calibrated temp meter and the reading should not has a
plus/minus 5 degreeC tolerance.
4. Oxidation or contamination on the pad. If your problem state on the
second side assembly only, your gold plating may be the soft gold that its
property has light change after pass some high heat, I don't know what is
it but I call it is gold oxidation.
I hope above message can give you some idea to solve you problem.
With best regards,
Noppadol S.
At 15:23 3/6/98 +0000, you wrote:
> Hello everyone !
>
>We are experiencing here some solder quality problem after our solder
>reflow process. The quality of the solderability of components
>spcecifically the QFP IC's was not that good. The formation of the
>solder fillet was convex on the IC leads which sometimes looks to be
>grainy and sometimes it looks to be that the solder paste has
>suddenly stop from flowing to its desired area. We already checked
>the profile parameters of our reflow process and it is within the
>specs limit of the solder paste that we are using. Do you think that
>the thawing time of the solder paste have something to do with this
>kind of problem ? Thank you in advance to anyone that could give a
>solution to this problem.
>
>Regards,
>Ricky
>Electronics Assemblies, Inc. Phils.
>
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=========================================================================
Date: Sat, 27 Jun 1998 10:32:32 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"S.L.N.MURTHY" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "S.L.N.MURTHY" <[log in to unmask]>
X-To: [log in to unmask]
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Dear Mr. Raghavendra
Protel generatedonly the pad master from the design database. You can select
this option only while generating the GERBER you have to goto options when
the photoplotter menu and use the pad master block. Tick generate and
selectfor which layeres you need the pad master. It will generate
automatically.
Alternatively, you can use the CAM 350 software from M/s. Advanced CAM
Technologies or VIEWMATE from M/s Lavenir Technologies. Both offer
conversion from Excellon to PAD master. If you have any problem, please send
me the Excellon file, I will send you back the PAD master file having
different pad codes for different drill data.
May I know, what is the purpose of this conversion ?
Regards
Murthy S.L.N
ECAD Technologies Pvt.Ltd.
373/1a, 11th Cross, 2nd Block,
Jayanagar,
BANGALORE 560 011
INDIA
PH: 91 80 664 5587 / 663 2779 /644 179
FAX: 91 80 663 0738
-----Original Message-----
From: [log in to unmask] <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Friday, June 26, 1998 2:39 PM
> Greetings,
>
> I'm interested in finding an Excellon to Gerber translator. Or some
> means to do the same. What I am trying to accomplish is pads only
> information from a Protel design database w/o stripping traces.
>
> Idea's?
>
> Thanks, Rich
>
> [log in to unmask]
>
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=========================================================================
Date: Sat, 27 Jun 1998 18:04:10 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Klasek <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Klasek <[log in to unmask]>
Subject: Re: dross in the solder pot
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Jason ,
just to add the little possible to Ed's ;
ages ago we came across the same strings you described :
When we disassembled the pump and the tunnel , we found a lot of dross
drawn & balled on the pump impeller , when we chipped it all off ;
scrubbed , blasted , etc. > the strings disappeared = the hidden dross
"reservoir" on impeller has been "depleted" . I'd put my bet on the
maintenance , considering the extra drossing stress you have to tackle .
Paul Klasek
http://www.resmed.com
PS
Sorry Ed ; didn't catch Jason's original
> ----------
> From: Ed Holton[SMTP:[log in to unmask]]
> Sent: Friday, 26 June 1998 22:35
> To: [log in to unmask]
> Subject: Re: [TN] dross in the solder pot
>
> Have you checked what the O2 level is at your solder pot? You are
> absolutely right, if you have an inerted system, you should not have
> this
> issue, nor should you have to de-dross daily, but not knowing whose
> machine
> you are using or what your volume is, the frequency of de-drossing is
> different. Dross is chiefly produced by the burning of oxides. More
> dross
> is generated running in open air than in nitrogen, eliminate the
> oxygen and
> you eliminate (mostly) the dross. If you are de-drossing the pot
> nightly
> you have too much oxygen in your system. An O2 monitor at the wave
> area
> should tell you what is happening (Note: not with the contour wave,
> because the N2 blanket is not complete until after the board is over
> the
> wave and trapping the N2, the O2 monitor will only work with a full
> tunnel
> system)
>
> Here is my hypothesis, based on something I have seen:
> The conditions: increased levels of O2 in the tunnel
> The second wave only spills over the front, not over the
> back
> (this is common in some inerted wave systems). The
> back
> gate is set high so solder does not spill over the back(factory
> setting).
> The second wave has a standby mode, only runs at full speed
> when
> the board is present.
>
> What happens: the smooth wave gets a thin layer of dross (or a skin)
> over
> the surface of the solder while it sits in standby mode waiting for
> the
> next board, due to the increased amount of O2 in the system. When the
> wave
> activates, solder spills over the front. Some of the dross "skin"
> moves
> with the solder as it falls over the front, but not all. As the board
> passes over the wave and exits, the component leads (especially
> connectors)
> grab this "skin" of dross and drag it off the pot, and voila! you have
> the
> solder short! What is not happening, that is normal with most open
> air
> system, is that as the board passes over the smooth wave, the leading
> edge
> of the board acts like a plow and pushes any dross that accumulated on
> the
> smooth wave over the back gate. My inerted machines have the back
> gate
> raised on the smooth wave so the solder will only fall over the front.
> (some wave solder manufacturers have the A wave instead of the smooth
> wave,
> that basically negates the above issue)
>
> The flux issue shouldn't be the problem, though in this situation, in
> open
> air, insufficient flux will also lead to bridging. The stuff that was
> mixed in with the flux, I would think has been burned off by now and
> should
> not contaminate the solder pot
>
> Ed Holton
> Hella Electronics
>
>
>
>
> [log in to unmask] on 06/25/98 04:07:38 PM
>
> Please respond to [log in to unmask]; Please respond to
> [log in to unmask]
>
> To: [log in to unmask]
> cc: (bcc: Ed Holton/Hella North America Inc.)
> Subject: Re: [TN] dross in the solder pot
>
>
>
>
> Experts, I am currently getting alot of failures at my functional
> tester.
> At my post solder station, I am noticing strings of dross across the
> pins
> of connectors. We are having to dedross the pot daily....for a
> no-clean
> process and inerted atmosphering, I think this is a bit extreme.
> Once, an
> operator managed to accidently put stencil cleaner in the
> flux....could
> this cause a reaction unable to be corrected without dumping the pot
> and
> cause excess dross. I initially thought we had too much exhaust
> drawing
> all nitrogen away from the wave. Our flux manufacturer did analyis
> and has
> determined that it's not the residues left which is causing my bridges
> at
> functional. Is a type 'C' solder analysis going to tell me anything
> of
> significance to my problem from any of your experiences? Any
> suggestions????
>
> Jason Smith
> Process Materials Engineer
> Lexmark Electronics
>
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=========================================================================
Date: Sat, 27 Jun 1998 19:12:29 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Klasek <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Klasek <[log in to unmask]>
Subject: Re: intrusive reflow and all
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
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Yeepee ; "some" answers, finally .
Hey Phil : spot on ( this time ) ,[ despite having one of those AKA
wonders with fridge inside ( ersa hotflow )] .
No problems with FR4 stress on 30'C ; keep you posted if we crack a
track or two .
I just tried to be nice (for a change) and throw Brian a bite ; didn't
think he would be an exhibitionist worthy Jack's attention .
When you boost up your neurons (Phil); anybody , please :
what is , and the advantages of this dwell type pastes (no clean only) =
?
I use just the standard missionary profiles > up & down , where does =
the
dwell apply ? Satellites ? Submarines ?=20
Thanks a lot=20
Paul Klasek
http://www.resmed.com
PS
If anybody would have any reflection on P&P bulk feeders ; I would
appreciate them .
Thanks again=20
> ----------
> From: [log in to unmask][SMTP:[log in to unmask]]
> Sent: Friday, 26 June 1998 8:42
> To: [log in to unmask]
> Subject: Re: [TN] intrusive reflow and all
>=20
> Brian -
>=20
> Wow, you found me out! I'll come clean. I used to be a writer for =
the
> Seinfeld show but now, with the show off the air, I go around making
> up
> information about SMT and reflow.
>=20
> Okay, I'll get off the caffeinated coffee if you'll stop plugging =
your
> ovens
> on the Technet. Talk about testy, my oh my.
>=20
> With all due respect to you, the solutions you propose are valid and
> worth
> trying. I frankly think you should keep things generic and not =
mention
> the
> name and model of your oven in capital letters at every opportunity.
> And I
> never said that it was the only way (read it again, slowly). =
However,
> I did
> say that differential heating is unnecessary in this application.
> Sorry to
> take the wind out of your convection, but it is.
>=20
> No I do not work for a reflow manufacturer. I did at one time work
> for
> Vitronics as Reflow Product Manager for 7 years. By coincidence, did
> a bit
> reflow, too. A lot of reflow and a lot of applications, as a matter
> of fact.
> And yes, we did experiment with differential heating. And yes, I did
> a number
> of applications with BGAs and what I described worked as I described
> it -
> without differential heating. I did additional work during my years
> with
> GSS/Array Technology with BGA and intrusive reflow. So gosh - I =
guess
> I do
> have some first hand experience with SMT and reflow and I might
> actually know
> what I'm talking about (maybe). Sorry to disappoint you.
>=20
> One line of thought that arose from the work I did in this area is
> that in
> many cases, not only is differential heating not required, but raises
> questions regarding stresses on the substrate laminate. Think about
> it, if
> you are creating a 30 - 40 deg C difference between two portions of
> the
> laminate, typically .063" apart, what is this doing in terms of
> stress? Now
> here's an experiment for ETS (or someone else to undertake)!
>=20
> In my work as a consultant (oh god, one of those) I regularly am
> called upon
> by both end users and equipment manufacturers to benchmark test their
> eqiupment for them. Over the years I have tested most of the major
> offerings
> from HELLER, ELECTROVERT, ERSA, RESEARCH, VITRONICS, SOLTEC, BTU,
> SMTECH and
> CONCEPTRONIC (touche'). Many of these manufacturers have also
> developed
> differential heating -some work better than others. I respect the
> fact that
> these companies and ETS have spent big bucks in R&D to develop this
> capability. I question if it is really needed. Most likley, it is =
an
> attempt
> to create a market differentiator for a product area that is viewed =
by
> the
> industry at large as a commodity. This is sad as well, because as =
you
> know
> from your experience with ovens, not all reflow ovens are created
> equal. The
> process may likely be viewed as a commodity but the equipment should
> be less
> so.
>=20
> Keep on experimenting Brian and keep on inputting into the Technet.
> But please
> keep it generic (or we'll have to sic Capn' Jack on you). I'm going
> to have
> that cup of decaf now, thanks.
>=20
> Phil Zarrow
> ITM, Inc.
>=20
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>=20
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=========================================================================
Date: Sat, 27 Jun 1998 14:26:01 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Valquirio N. Carvalho"
<[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Valquirio N. Carvalho"
<[log in to unmask]>
Subject: Re: Reliability rating
X-To: Phil Bavaro <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0025_01BDA1D7.82ADA2E0"
This is a multi-part message in MIME format.
------=_NextPart_000_0025_01BDA1D7.82ADA2E0
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Phillip,
I don't have any reliability data concerning press fit vs. solder =
tailed connectors but I can speak toward your second question. OSP does =
act as a lubricant to some extent but it is more difficult to press than =
HASL. PCB hole specs. are usually derived for a specific finish and may =
need to be modified. Most connector vendors (AMP, Teradyne, Millmax, =
EPT) will be able to address this for their specific product. Another =
important factor is the lead finish on the connector. A connector with =
either a tin or solder finish (as opposed to gold) will in general be =
easier to press into an OSP board. This will vary with the pin type =
however.
Hope this helps.=20
Valquirio N. Carvalho
=20
------=_NextPart_000_0025_01BDA1D7.82ADA2E0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD W3 HTML//EN">
<HTML>
<HEAD>
<META content=3Dtext/html;charset=3Diso-8859-1 =
http-equiv=3DContent-Type>
<META content=3D'"MSHTML 4.72.2106.6"' name=3DGENERATOR>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT color=3D#000000 size=3D2>Phillip,</FONT></DIV>
<DIV><FONT color=3D#000000 size=3D2> I don't have any =
reliability=20
data concerning press fit vs. solder tailed connectors but I can speak =
toward=20
your second question. OSP does act as a lubricant to some extent =
but it is=20
more difficult to press than HASL. PCB hole specs. are usually =
derived for=20
a specific finish and may need to be modified. Most connector =
vendors=20
(AMP, Teradyne, Millmax, EPT) will be able to address this for their =
specific=20
product. Another important factor is the lead finish on the=20
connector. A connector with either a tin or solder finish (as =
opposed to=20
gold) will in general be easier to press into an OSP board. =
This=20
will vary with the pin type however.</FONT></DIV>
<DIV><FONT color=3D#000000 size=3D2></FONT> </DIV>
<DIV><FONT color=3D#000000 size=3D2>Hope this helps. </FONT></DIV>
<DIV><FONT color=3D#000000 size=3D2></FONT><FONT size=3D2>Valquirio N.=20
Carvalho</FONT></DIV>
<DIV><FONT color=3D#000000 size=3D2> </FONT></DIV></BODY></HTML>
------=_NextPart_000_0025_01BDA1D7.82ADA2E0--
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=========================================================================
Date: Sat, 27 Jun 1998 23:54:13 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Mil-Std-2000A Question
X-cc: [log in to unmask]
Only a minor observation but, as the offending solder ball has been
conformally coated, the risk of it moving around under the coating to cause
electrical problems has been minimised.
Regards, Graham Naisbitt
__________________________________________________________________________
[log in to unmask]
Concoat Ltd
Alasan House, Albany Park
Camberley GU15 2PL UK http://www.concoat.co.uk
-----Original Message-----
From: [log in to unmask] <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: 25 June 1998 00:47
Subject: Re: [TN] Mil-Std-2000A Question
> First I will assume that since this assembly is Through hole you don't
> have terminations less than .020 in.( 5.3.7.4) If the solder ball
> cannot be seen at 4X inspection it is not rejectable. 2000A requires
> 4X inspection with 10 power to be used for referee and identification
> of the DEFECT identified at 4 power, if what you have seen is not
> CLEARLY rejectable 2000A says it shall be accepted.(4.3.1) Since you
> cannot see the solder balls at 4 power you do not have a defect.
>
>
>______________________________ Reply Separator
_________________________________
>Subject: Re: [TN] Mil-Std-2000A Question
>Author: MIME:[log in to unmask] at INTERNET
>Date: 6/24/98 5:26 PM
>
>
> My first response would be that MIL-STD-2000 no longer exists.
>It has been superceded for quite a while now by industry standards such
>as IPC610 and ANSI-J. Those standards will state that if they do not
>violate conductor spacing and are firmly attached (which conformal would
>do a good job of), they are not a reject....
>
>> -----Original Message-----
>> From: Kenny Bloomquist [SMTP:[log in to unmask]]
>> Sent: Wednesday, June 24, 1998 5:08 PM
>> To: [log in to unmask]
>> Subject: [TN] Mil-Std-2000A Question
>>
>> Here is another one of those sticky DOD questions. We have an
>> assembly, TH,
>> Mil-Std-2000A, that has been through assembly, test and conformal coat
>> (UR). As it was being plugged into an end item the operator noticed a
>> solder ball. How it was seen I'll never know because I can not see it
>> through a four power glass. That aside, under a microscope we were
>> able to
>> find 10 or 12 "tiny" solder balls. None of them reduced the conductor
>> with
>> below an acceptable spacing and all of them are encapsulated in
>> conformal
>> coat.
>>
>> Mil-Std-2000A - Paragraph 4.21.4 "Cleanliness of printed wiring,
>> boards and
>> assemblies. Printed wiring, boards and assemblies shall be free of
>> foreign
>> matter. This includes grease, silicones, flux residue, dirt, chips,
>> SOLDER
>> BALLS, insulation residue and wire clippings."
>>
>> My sensible self tells me that since these solder balls (micro-size)
>> do not
>> reduce the conductor spacing and they are encapsulated in UR that we
>> will
>> do more damage reworking these than leaving them alone. I would think
>> that
>> this is a process indicator and not a real defect.
>>
>> The Question: Does anyone out there in TechNet land have the
>> specmanship to
>> work through this or am I all wet?
>>
>> Thanks in advance for all responses.
>>
>> Ken Bloomquist
>> Sr. Principal Process Eng.
>> PRIMEX Aerospace Company
>> [log in to unmask]
>> (425) 881-8990 ext. 6645
>>
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>
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=========================================================================
Date: Sun, 28 Jun 1998 06:58:55 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Wolfgang Schenke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Wolfgang Schenke <[log in to unmask]>
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Yes, you can convert EXCELLON to GERBER with CAMCAD. (CAMEDIT US$ 699)
Send me an Excellon file and I will return a Gerber file to you.
Wolfgang
-----Original Message-----
From: [log in to unmask] <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Friday, June 26, 1998 2:33 PM
> Greetings,
>
> I'm interested in finding an Excellon to Gerber translator. Or some
> means to do the same. What I am trying to accomplish is pads only
> information from a Protel design database w/o stripping traces.
>
> Idea's?
>
> Thanks, Rich
>
> [log in to unmask]
>
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=========================================================================
Date: Sun, 28 Jun 1998 17:36:03 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Khaled H. Fouad" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Khaled H. Fouad" <[log in to unmask]>
Organization: IEP Egypt- R&D Department / PCB Design Team
Subject: Drill2Gerber converter (reply)
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Hi Rich
There is a very good site with very usefull tools - some are free - .You
can check, it has exactly the tool you want and it's for free.
--
Khaled H. Fouad
Sr. PCB Designer - R&D Department
IEP Egypt,member of BAHGAT Group ( http://www.bahgat.com )
Second Industrial Zone,Plot 240
6 October City, Egypt
Tel: 002011 - 335613
Fax: 002011 - 335613
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=========================================================================
Date: Mon, 29 Jun 1998 12:03:18 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Joseph Fan <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Joseph Fan <[log in to unmask]>
Subject: How to buy IPC Gerber?
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=big5
Content-Transfer-Encoding: 7bit
Hello Everybody !!
Would you give me a help to indicate how to buy the gerber of
IPC-TM-650 5.8.3 & IPC-TM-650 5.8.4
Best Regards
....................................Joseph Fan
1998.06.29
Company's
E-mail : [log in to unmask]
Individual E-mail : [log in to unmask]
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=========================================================================
Date: Sun, 28 Jun 1998 18:35:00 PDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Michael Lang <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Michael Lang <[log in to unmask]>
Subject: HELP: Cracking Discretes on PCB's
Content-Type: text/plain
Hello Technetters,
I have a PCBA which has been built in PTH configuration with great
success for years. However, due to the need for increased functionality
in the same form factor, it seems that it is time to convert the PCBA to
SMT format.
My main concern relates to PCB flex and solder joint integrity...
The PCBA is about 4" x 6". It is held along its 4" sides in a rack. A
cable is plugged into the card via a connector along the top 6" side of
the PCB (NOT a card edge connector, but PTH connector which means you
push against the FACE of the PCBA. I do not know the force, but the PCB
DOES flex significantly. Plus, since this is a home / contractor
product, it does not get handled gingerly...
THE PRIMARY CONCERN: Inducing cracks in either the components or solder
joints of leadless surface mount components.
What information exists with respect to this subject?
What testing makes sense? What has been done already by others?
Any help is appreciated.
Thanks,
Michael Lang
[log in to unmask]
ps. Hi RH!
______________________________________________________
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=========================================================================
Date: Sun, 28 Jun 1998 22:22:57 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Fwd: [TN] intrusive reflow and all
Mime-Version: 1.0
Content-type: multipart/mixed; boundary="part0_899086977_boundary"
This is a multi-part message in MIME format.
--part0_899086977_boundary
Content-ID: <[log in to unmask]>
Content-type: text/plain; charset=US-ASCII
--part0_899086977_boundary
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Content-type: message/rfc822
Content-transfer-encoding: 7bit
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From: [log in to unmask]
Return-path: <[log in to unmask]>
To: [log in to unmask]
Subject: Re: [TN] intrusive reflow and all
Date: Fri, 26 Jun 1998 17:32:53 EDT
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7bit
Brian -
Oh, lighten up already.
To answer you technical question, for those parts that exceed the weight to
surface area ratio, most people use adhesives. Of course this entails
additional machine centers (glue dispensor) and operations (adhesive
dispensing and curing). Some components can't be glued like BGAs, so don't
design them for both sides (this is called DFM). Of course, you can
differentiate solder them - they're your substrates. I never said that you
couldn't but for processes I consult on, this would be a last resort in most
applications.
When I, or my fellow consultants (Werner Englemeir, Bob Willis, et al) give
advice, and we sign our names and our consulting firms, yes, it is a mention,
but it is not an advertisement. We make our livings selling advice - we do
not get salaries from companies we work for, so these are contributions of our
knowledge. We might list our websites (which contain articles - also free of
charge and usually pertinent to the discussion) or address, and many times we
are contacted "off-line" for additional information. You can agree or
disagree with our thoughts and experience. When other people like Bev, Eddie,
Charles and all give advice, and sign the names of their companies, it is a
credit to their companies that they are who they are. I think you would do
much better to do the same and quit blatantly plugging your product by name
and model. If you want to advertise, buy advertising space in the trade
magazines like the real reflow oven manufacturers do.
And that is my final word regarding this mildly entertaining "dialogue" we've
engaged in for the last day or so. Oh, except for : "pfffffffffft!"
Hey all, have a nice weekend.
Toodles,
Phil Zarrow
ITM Inc.
Durham, NH
www.itm-smt.com
Mastercharge and Visa Accepted ! (hee hee)
--part0_899086977_boundary--
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=========================================================================
Date: Sun, 28 Jun 1998 19:41:10 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Mike Becker <[log in to unmask]>
Organization: Home
Subject: Plating of SMT leads
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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What are the "standard" platings for SMT leads. I have seen every
thing from 63/37 to 93/7. All Tin/Lead of course. Can you reflow a
90/10 plating with 63/37 solder paste at 230c?
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=========================================================================
Date: Mon, 29 Jun 1998 11:05:06 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Benedicto Cruz <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
Comments: Authenticated sender is <bcruz@[192.1.1.215]>
From: Benedicto Cruz <[log in to unmask]>
Subject: see items
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
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Hi everyone,
I am using an epoxy dispensing machie that performs potting on metal
scases. One of my biggest problem is the occurrence of bubbles after
dispensing.
The machine has its own vacuum for the chemicals before mixing. But
the dispensing stage is done on room parameters. Bubbles occur before
and after oven curing.
Can this occurrence of bubbles be controlled? Or to we need a vacuum
verger during dispense?
I would also like to ask for the standard soldering iron temperature
used for rigid PCBs and flex PCBs.
Regards.
Jon Cruz
OIC Supervising Product Engineer
Electronic Assemblies Inc.
[log in to unmask]
tel.# 823-7317/7593884
fax# 8238326
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=========================================================================
Date: Mon, 29 Jun 1998 08:42:49 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Haugaard Svend <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Haugaard Svend <[log in to unmask]>
Subject: Re: HELP: Cracking Discretes on PCB's
MIME-Version: 1.0
Content-Type: text/plain
SMT connectors are just as reliable as leaded connectors. If your former
leaded connector did the job without cracking it's most likely that a
similar SMT connector also will do the job.
Flexing a PCB will most certainly stress the solder joints regardles of
lead or SMT. Lots of books and articles exist concerning this matter but
be sure that it might take some time to get an overview of this. Just
try searching at the web ...
I think there must be a kind of mechanically support to the connector in
order to avoid any load to the solder joints - regardles of connector
type. In this way stress will never arise at the solder joints.
Testing this could e.g. be by means of plugging/unplugging many times to
simulate life cycle - most likely the connector wears out and thus the
press-in force reduces.
Best regards
Svend
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=========================================================================
Date: Mon, 29 Jun 1998 06:28:42 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Wilson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Wilson <[log in to unmask]>
Subject: GEN: DI Water System Capacity
MIME-Version: 1.0
Content-Type: text/plain; charset="ISO-8859-1"; X-MAPIextension=".TXT"
Content-Transfer-Encoding: quoted-printable
Technet:
.... Looking for a good number cruncher to explain options available.
N.B. <This inquiry is directed to salespeople and members of Technet: =
Salesmen, please reply directly to avoid any hassle because Technet is =
a "zoned" forum allowing no solicitation and enforcing tough sanctions: =
The best recommendation would be to separate general information from =
direct sales, and then respond separartely off line. Thank you.>
******
Suppose you have a tandem cation-anion system filled with resin with a =
capacity of 90 cubic feet each. Flow rates of 10 gal per minute are typi=
cal or slightly less.
How many gallons throughput are expected with 400ppm TDS input before reg=
eneration?
How many gallons regenerants are needed for regeneration?
How many gallons of water are needed for backwash?
What is the expected lifespan between regenerations?
What quality of water is expected to be maintained (2 Megohm or 6 Megaohm=
)?
Take full opportunity to choose resin systems to maximize parameters of =
water quality and decrease regeneration time. Without going to RO instal=
lation, what are the most typical expectations from a dual inline system =
such as this?
Thank you,
Paul
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=========================================================================
Date: Mon, 29 Jun 1998 14:23:45 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Eltek Ltd. - Process Engineering" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Eltek Ltd. - Process Engineering" <[log in to unmask]>
Subject: Help/Markers
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Technetters
By mistake I deleted messages regarding water soluble markers . Several
messages were placed on the net last months .
We are looking after water soluble markers well visible on green solder mask .
Edward Szpruch
Eltek Ltd - Israel
Tel 972 3 9395050
Fax 972 3 9309581
E-mail : [log in to unmask]
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=========================================================================
Date: Mon, 29 Jun 1998 07:12:11 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMonagle, Michael R." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMonagle, Michael R." <[log in to unmask]>
Subject: Re: Help/Markers
X-To: "Eltek Ltd. - Process Engineering" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Metron Markers from Metron Optics: (619) 755-4477
> -----Original Message-----
> From: Eltek Ltd. - Process Engineering
> [SMTP:[log in to unmask]]
> Sent: Monday, June 29, 1998 6:24 AM
> To: [log in to unmask]
> Subject: [TN] Help/Markers
>
> Technetters
> By mistake I deleted messages regarding water soluble markers .
> Several
> messages were placed on the net last months .
> We are looking after water soluble markers well visible on green
> solder mask .
> Edward Szpruch
> Eltek Ltd - Israel
> Tel 972 3 9395050
> Fax 972 3 9309581
> E-mail : [log in to unmask]
>
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=========================================================================
Date: Mon, 29 Jun 1998 08:57:11 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: FYI Tanatalums
X-To: TOSTEVIN_BC <[log in to unmask]>
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi,
We recently went through an exhausting excersize with tantalums. The
vendor we used to assemble a small lot was not using pre-heat at the
wave solder. The tantalums were thermally overstressed. When
testing at ATE, we experienced some firecrackers. After a back
and forth with the component manufacturer I became convinced that
these tantalums(can't speak for all) were damaged from excessive
heat. Well we beat up our assembly vendor and also learned something
new.
Good luck
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=========================================================================
Date: Mon, 29 Jun 1998 09:05:52 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tom Obarski x4286 <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tom Obarski x4286 <[log in to unmask]>
Subject: Aluminum core in vapor phase
X-cc: [log in to unmask]
Does anyone have any experience assembling double sided
surface mount aluminum core pwbs in a vapor phase oven?
If so any problems?
Thanks
Tom and Tom
Harris Corp,
Melbourne Fla.
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Date: Mon, 29 Jun 1998 09:08:35 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Rupert, Martha L." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Rupert, Martha L." <[log in to unmask]>
Subject: Re: HELP: Cracking Discretes on PCB's
X-To: Michael Lang <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain
Your note suggests that ALL components may become surface mount, but as far
as the connector is concerned, perhaps this design may be an "ideal"
candidate for intrusive reflow: keeping the connector as a through hole
component processed through a reflow environment. The decision may be based
on what type of connector this is.
Do you have a shielded I/O connector (higher mating/unmating forces)? Is it
a high pin count (higher mating/unmating forces)? Is it a tin (versus gold)
interface (higher mating/unmating forces)? Is it a "right angle" board
connector (higher shear stress)? All of these will affect the stress/strain
on the solder joints. If you do go the surface mount route, I'd keep some
hold downs on the design.
Martha Rupert
AMP Incorporated
email:[log in to unmask]
> -----Original Message-----
> From: Michael Lang [SMTP:[log in to unmask]]
> Sent: Sunday, June 28, 1998 9:35 PM
> To: [log in to unmask]
> Subject: [TN] HELP: Cracking Discretes on PCB's
>
> Hello Technetters,
>
> I have a PCBA which has been built in PTH configuration with great
> success for years. However, due to the need for increased functionality
> in the same form factor, it seems that it is time to convert the PCBA to
> SMT format.
>
> My main concern relates to PCB flex and solder joint integrity...
>
> The PCBA is about 4" x 6". It is held along its 4" sides in a rack. A
> cable is plugged into the card via a connector along the top 6" side of
> the PCB (NOT a card edge connector, but PTH connector which means you
> push against the FACE of the PCBA. I do not know the force, but the PCB
> DOES flex significantly. Plus, since this is a home / contractor
> product, it does not get handled gingerly...
>
> THE PRIMARY CONCERN: Inducing cracks in either the components or solder
> joints of leadless surface mount components.
>
> What information exists with respect to this subject?
>
>
> What testing makes sense? What has been done already by others?
>
>
> Any help is appreciated.
>
> Thanks,
>
> Michael Lang
> [log in to unmask]
>
>
> ps. Hi RH!
>
> ______________________________________________________
> Get Your Private, Free Email at http://www.hotmail.com
>
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=========================================================================
Date: Mon, 29 Jun 1998 09:18:07 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Rupert, Martha L." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Rupert, Martha L." <[log in to unmask]>
Subject: Re: HELP: Cracking Discretes on PCB's
X-To: Haugaard Svend <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain
Let's hope this doesn't happen! Connectors are typically tested for
"durability cycles" per the application. These durability cycles can number
25 (tin plated), 500 (typical PC), 10,000 (PCMCIA) or even 100,000 (Smart
cards). Even though the system may never see these numbers, the "spring"
member must be designed to handle the respective number of cycles the
application or specification requires. The risk is losing normal force which
increases resistance which could lead to failures.
Martha Rupert
AMP Incorporated
email:[log in to unmask]
> -----Original Message-----
> From: Haugaard Svend [SMTP:[log in to unmask]]
> Sent: Monday, June 29, 1998 2:43 AM
> To: [log in to unmask]
> Subject: Re: [TN] HELP: Cracking Discretes on PCB's
>
> SMT connectors are just as reliable as leaded connectors. If your former
> leaded connector did the job without cracking it's most likely that a
> similar SMT connector also will do the job.
>
> Flexing a PCB will most certainly stress the solder joints regardles of
> lead or SMT. Lots of books and articles exist concerning this matter but
> be sure that it might take some time to get an overview of this. Just
> try searching at the web ...
>
> I think there must be a kind of mechanically support to the connector in
> order to avoid any load to the solder joints - regardles of connector
> type. In this way stress will never arise at the solder joints.
> Testing this could e.g. be by means of plugging/unplugging many times to
> simulate life cycle - most likely the connector wears out and thus the
> press-in force reduces.
>
> Best regards
> Svend
>
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=========================================================================
Date: Mon, 29 Jun 1998 09:45:04 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Bob Walker <[log in to unmask]>
Subject: Thermal Reliefs
Hi All,
I first want to thank John and Don for responding to my layer stack-up
question. I now have a question concerning the need for thermal reliefs
on a plane layer. I know that using thermals helps in creating a good
solder fillet on the component side of a leaded component, but I was
wondering how many designs are done without using them. Are there any PWB
assembly houses that can comment on their experiences with running boards
through a wave that doesn't contain thermals? A design that I am working
on will contain a ground plane on the bottom layer (solder side) and I'm
thinking that I might be able to get away without using thermals on it
because it will not be an internal layer and thus will be making direct
contact with the wave and not necessarily drawing off all of the heat
needed to produce a good solder joint up the lead of the component . I
will be using 2 oz. copper and have some high currents in certain areas
that would make not using thermals a benefit in designing the board. All
responses would be greatly appreciated.
Regards,
Bob Walker
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=========================================================================
Date: Mon, 29 Jun 1998 14:16:47 -0400
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Craig Smith <[log in to unmask]>
Organization: Paradyne Corporation
Subject: Re: Nitrogen in the wavesolderingproces
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
What type of unit cost is there with purchased nitrogen? Anyone using or have experience with a
nitrogen generator? I've been told the purity of the nitrogen from generation is not that good.
Craig Smith
Paradyne Corp.
Ed Holton wrote:
> I have found that the nitrogen helps open up the process window of the wave
> solder process, particularly with the use of no-clean flux. Reference my
> previous reply to another message concerning my feelings and the benfits of
> nitrogen. Another reply stated that if solderability of the boards and
> components was good, and you used the proper flux, that nitrogen was not
> needed, in theory I agree, and at my facility the shelf life of my
> components and boards is very short. In theory, if everything is
> solderable, you do not need flux. But this is the real world, and we need
> to be able to accomodate that reel of components that sat somewhere for 6
> months, and may have solderability problems. Plus, when you are attempting
> to reach six sigma levels of quality (I know, not possible with the wave
> operation, but I am at 4 sigma now!), you want to take advantage of
> everything you can. What is the cost of quality? Thus, I continue to use
> nitrogen to enhance my process. Anyway, the nitrogen helps with the
> soldering, changing the way solder flows, etc. What it did, was get rid of
> the random defects, so any wave solder defects that occured were easily
> identifiable as design defects. Nitrogen also fixed some solder defects
> that occured due to questionable pad designs.
>
> How much solder will you save with nitrogen? Cannot give a hard and fast
> answer, depends on amount of time in production and a few other factors.
> When I did my cost analysis, I was conservative. I knew how much solder
> we bought per year and how much dross we created per year. I decided the
> difference was how much solder was used in production (stayed on the
> board). I made a one to one correlation then between the dross and
> remaining solder purchesed. Reduce the dross and we would have to buy less
> solder. Presently, we were de-drossing once per day. I decided that with
> the nitrogen system, the solder pot would have to be de-drossed once per
> week. I extrapolated and decided that one days worth of dross with my
> existing machine would equal one weeks worth of dross with my nitrogen
> machine. This was backed up by info from SEHO, Electrovert, and existing
> users. Eliminate 4/5 of the dross and you eliminate 4/5 of the solder
> purchased that generated the dross. The math can be done from there.
> Don't forget you are now buying less solder, have less dross to
> reclaim(hazardous waste) and to include the cost savings due to reduced
> maintenance time. Before I am attacked by others for my assumptions, I had
> very little data to work with, luckily I was conservative in my numbers and
> the actual cost savings were greater than expected. I too would be
> interested in what others have found. While it is not a direct
> correlation, I found that the savings due to dross reduction pay for the
> nitrogen used in the system. Thus your cost savings is due to improved
> quality, reduced maint. time, and a more robust process.
>
> Consumption of nitrogen can be determined by the machine. Each vendor will
> tell you how much N2 the system will use, measured in cubic feet per minute
> (or its metric equivalent)
>
> Other cost savings have been addressed in other responses. if you have any
> questions, please call
>
> Ed Holton
> Hella Electronics
> 734-414-0944
>
> [log in to unmask] on 06/25/98 04:04:04 PM
>
> Please respond to [log in to unmask]; Please respond to [log in to unmask]
>
> To: [log in to unmask]
> cc: (bcc: Ed Holton/Hella North America Inc.)
> Subject: Re: [TN] Nitrogen in the wavesolderingproces
>
> Hi all,
>
> I have a few questions like to get the answer from the expertises:
>
> 1. Nitrogen being used on the wave process, what kind of process
> improvement do we achieve? I heard people said that they have better
> joint, better reflow.....
> 2. If it helps to reduce drossing of solder, how much solder do we save
> monthly? How much dross produce/reduce each month? (Use % for
> calculation).
> 3. How much nitrogen consumption in a month? (Let's say the machine runs
> 2 shifts in 22 days/month).
>
> How can I measure/justify of using nitrogen in the process in terms of
> quality and savings?
> Your answer would be a great help for me.
>
> Thanks
>
> Simon Shin
>
> > ----------
> > From: superflx[SMTP:[log in to unmask]]
> > Sent: Thursday, June 25, 1998 1:19 PM
> > To: [log in to unmask]
> > Subject: Re: [TN] Nitrogen in the wavesolderingproces
> >
> > If you use a No-Clean flux with clean, fresh components and new HAL or
> > OSP boards, the nitrogen will add, marginally, to the process.? If you
> > use a water-soluble flux, the nitrogen does not add anything as the
> > flux will overcome any oxidation problems.
> > Our experiuence has been that Nitrogen doesn't necessarily add
> > anything to the soldering process, but helps reduce drossing of
> > solder.? If reducing dross can help save money relative to the cost of
> > nitrogen, then its a worthwhile investment.
> > Phil
> > Jesper Kj?rnulf Konge wrote:
> > ?? At our factory we are going to have a new waesolderingmachine
> > with nitrogensupport. But our director dosen't think that we need the
> > nitrogen because it has no effect compared to the price that we have
> > to pay. But in me department we dosen't aggree.?? I would like to hear
> > about your experience with nitrogen so that we can tell our director
> > that it isn't just us that thinks that nitrogen soldering is good. And
> > if anyone has a meaning about the Seho MWS-8200 PWR i would like to
> > hear that too.?With Regards?Jesper KongeDanica Supply A/SDenmark?Mail
> > : [log in to unmask] <mailto:[log in to unmask]>
> >
> >
>
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=========================================================================
Date: Mon, 29 Jun 1998 16:39:59 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ed Holton <[log in to unmask]>
Subject: hybrid manufacturing questions
Mime-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Doing a bit of general research:
What is the present status of hybrid manufacturing in the United States?
Is it alive and well?
Are most hybrid manufacturers in the U.S. or overseas?
Are the fabricators large or small?
Do most houses fire their own resistor inks and populate with SMT?
What percentage of assembly is done by wire bonding?
If I was looking for a contract house to handle a low volume job, please
contact me offline (<20K units per year)
If I was looking for a contract house to handle a high volume job, please
contact me offline (>1 million units/year)
If I was looking for a contract house to handle the intermediate volume,
please contact me offline (between 20K and 1 million units)
What is the general opinion of starting a production facility to fabricate
hybrid modules in the U.S. as opposed to overseas?
Thanks for you responses
Ed Holton
Manufacturing Engineer
Hella Electronics
[log in to unmask]
734-410944
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=========================================================================
Date: Mon, 29 Jun 1998 13:39:35 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Palumbo <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Palumbo <[log in to unmask]>
Subject: Contamination Testing for Water Soluble Flux Residue
MIME-Version: 1.0
Content-Type: text/plain
I was told that water soluble flux does not leave ionic contaminants behind,
and if you want to test for contaminants you should do a surface Resistivity
test.
My questions are as follows:
1. Is this entirely true, or can some sort of correlation be made between
the two different types of tests.
2. If surface Resistivity testing is being done should ionic contamination
testing ever be done?
3. Are there any Ionic Contamination Testing systems available so we can do
this test in house?
4. Are there any Surface Resistivity Testing systems available so we can do
this test in house?
Thanks in advance for you responses!
Kathy Palumbo
Viking Components
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=========================================================================
Date: Tue, 30 Jun 1998 10:19:13 -0700
Reply-To: jeremy <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: jeremy <[log in to unmask]>
Subject: subscribe
In-Reply-To: <[log in to unmask]>
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=========================================================================
Date: Mon, 29 Jun 1998 22:08:29 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Don Vischulis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: Thermal Reliefs
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Bob:
As long as I'm on a roll, we can give this one shot.
With a well controlled wave solder system, you should not have any problems forming a good solder
fillet. One problem you will encounter is replacement of the component soldered directly into
the plane. Large quantities of heat are required to melt the solder joint on that component
(could require as much as a 60 watt iron). One alternative is to use thermal reliefs on the
component lead and small vias tied directly into the plane to handle the power. My sketching
skills using ascii characters are not very good. If you would like a sketch, please sent me your
FAX number off-line.
Regards,
Don Vischulis
ITO Industries
[log in to unmask]
Bob Walker wrote:
> Hi All,
>
> I first want to thank John and Don for responding to my layer stack-up
> question. I now have a question concerning the need for thermal reliefs
> on a plane layer. I know that using thermals helps in creating a good
> solder fillet on the component side of a leaded component, but I was
> wondering how many designs are done without using them. Are there any PWB
> assembly houses that can comment on their experiences with running boards
> through a wave that doesn't contain thermals? A design that I am working
> on will contain a ground plane on the bottom layer (solder side) and I'm
> thinking that I might be able to get away without using thermals on it
> because it will not be an internal layer and thus will be making direct
> contact with the wave and not necessarily drawing off all of the heat
> needed to produce a good solder joint up the lead of the component . I
> will be using 2 oz. copper and have some high currents in certain areas
> that would make not using thermals a benefit in designing the board. All
> responses would be greatly appreciated.
>
> Regards,
> Bob Walker
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=========================================================================
Date: Tue, 30 Jun 1998 14:52:25 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Colin Weber <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Colin Weber <[log in to unmask]>
Subject: PCI Cards
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Folks,
We have a requirement to re-design an existing ISA bus card design onto a
5V, 32-bit
PCI card.
1.
First glance at PCI specifications highlight that there are two default
sizes for
these cards, Short and Long. What is the reasoning behind this?
Or another way of asking the same question, can the length of the board be
vary?
Does it have to conform to either of the specific short or long lengths?
Regards,
Colin Weber
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=========================================================================
Date: Tue, 30 Jun 1998 18:20:28 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Padmanabha Anandapuram Halappa <[log in to unmask]>
Subject: Need E-mail address
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit
Hi Technetters,
Can anyone please provide me the e-mail address of
DCC Corporation N.J supplier of Hot-mux oven profile-er.
Thanks in Advance.
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Date: Tue, 30 Jun 1998 06:47:50 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Aric parr <[log in to unmask]>
Subject: Re: Contamination Testing for Water Soluble Flux Residue
The first statement was wrong. A flux must have ionic components to work
properly.
Water soluble fluxes leave ionic residue detectable by:
ROSE testing (Omega meter, Ionograph....). This test is useful to
determine whether the cleaner is in control. Commonly used throughout the
industry.
Ion chromotagraphy. This test determines what specific residue causes
failure. Only large shops can maintain the equipment.
Surface Insulation Resistance. This test actually has a correllation
with field failures. None relating to residue if resistivity is above a
certain level. Guaranteed if its below a certain level. The level depends
upon environment, panel design and circuit design (voltage, current,
impedance, spacing, indoors vs. under the hood...). This test should be
done on test coupons in an environmental test lab. It is rarely done as a
process control, since the test takes a week, and is not usually done on
production panels.
There are many systems on the market for all 3 types of testing. I won't
advertise any here, for fear of naming a supplier.
ARIC PARR
Sr. Manufacturing Engineer
Eaton Corp
1400 S. Livernois
P. O. Box 5020
Rochester Hills, Mi 48308-5020
[log in to unmask]
248 608 7780
Fax: 248 656 2242
-------------
Original Text
From: C=US/A=INTERNET/DDA=ID/TechNet(a)IPC.ORG, on 6/29/98 4:53 PM:
To: Aric Parr@01635@Lectron_RH,
EatonWHQ@CorpMail@WHQCleveOH[C=US/A=INTERNET/DDA=ID/TechNet(a)IPC.ORG]
I was told that water soluble flux does not leave ionic contaminants behind,
and if you want to test for contaminants you should do a surface
Resistivity
test.
My questions are as follows:
1. Is this entirely true, or can some sort of correlation be made between
the two different types of tests.
2. If surface Resistivity testing is being done should ionic contamination
testing ever be done?
3. Are there any Ionic Contamination Testing systems available so we can
do
this test in house?
4. Are there any Surface Resistivity Testing systems available so we can
do
this test in house?
Thanks in advance for you responses!
Kathy Palumbo
Viking Components
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=========================================================================
Date: Tue, 30 Jun 1998 07:45:06 -0400
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kevin Stokes <[log in to unmask]>
Organization: Acu-Rite
Subject: Re: Contamination Testing for Water Soluble Flux Residue
X-To: Kathy Palumbo <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Kathy,
My company has been doing quite a bit of research into this area lately. We've
been using an Omega meter to perform contamination measurements of our
system for quite a while. However, we have become aware that the mixture
used in an Omega meter is not particularly effective at dissolving OA flux.
We have investigated SIR testing, but do not feel that it will provide the process
information that we need. It can only be performed on boards that were
designed with an SIR test pattern in it. An SIR test pattern is a series of
interlaced traces. When you put a potential across these traces, you will
promote dendritic growth.
The most promising lead we've found is a test procedure that is currently being
developed by IPC. They are basically trying to develop a test that uses the
Omega meter to measure the ionic contamination but utilizes a different
procedure to facilitate dissolving the flux. The current procedure that they are
looking at includes: sealing the board in a bag containing 75% alcohol and 25%
water. Then you put the bag in a water bath at 80C for an hour. You then dump
the bag into the Omega meter and measure the contamination level.
We just started looking into this, and we are getting ready to start this testing.
If you like, I would be glad to send you a copy of IPC's preliminary procedure.
Kevin
Kevin Stokes Reliability Supervisor
Acu-Rite Incorporated Phone: (716) 661-1836
1 Precision Way FAX: (716) 661-1793
Jamestown, NY 14701 email: [log in to unmask]
-----Original Message-----
From: Kathy Palumbo [SMTP:[log in to unmask]]
Sent: Monday, June 29, 1998 4:40 PM
To: [log in to unmask]
Subject: [TN] Contamination Testing for Water Soluble Flux Residue
I was told that water soluble flux does not leave ionic contaminants behind,
and if you want to test for contaminants you should do a surface Resistivity
test.
My questions are as follows:
1. Is this entirely true, or can some sort of correlation be made between
the two different types of tests.
2. If surface Resistivity testing is being done should ionic contamination
testing ever be done?
3. Are there any Ionic Contamination Testing systems available so we can do
this test in house?
4. Are there any Surface Resistivity Testing systems available so we can do
this test in house?
Thanks in advance for you responses!
Kathy Palumbo
Viking Components
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=========================================================================
Date: Tue, 30 Jun 1998 10:10:14 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, pod1 <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: pod1 <[log in to unmask]>
Subject: void size specification for BGA's
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Starting in 1993, while working at Amdahl Computer Corporation, I worked
with a group evaluating BGA solder joints using various substrates, ball
types (eutectic and high temp) with small and micro vias in SMT mounting
pads, and soldering processes. Our first estimate for acceptable voiding was
in the range of 15 to 25%. After running many thermal cycles to failure
tests, the number 20% worked well dependent on voiding "spread" or
"proximity". In cases with one large void (approximating 20% of ball
volume), failures were higher than if smaller voids (spread throughout the
sphere) were encountered with the same voiding volume. This was true to the
extent about 30% failures were encountered to near none, relatively
speaking. Also, after x-sectional and SEM/EDX analysis (of void contents),
it was found that failures were dependent on whether flux residues were
found and its composition (carboxcyclic acid, or?).
I don't have all the numbers anymore as the data became Amdahl property.
There are few of the original cast left to assist. However, the cycles to
failure testing and void analysis techniques are "standard" and the numbers
are reasonably easy to obtain. For this reason, the people I work with, and
myself, are currently supporting the 20% maximum voiding number.
I know there are more recent, and much more in depth, studies being, or
having been, performed. I agree there is a definitive need for such
information as it is critical to solder joint quality and long term
reliability just as with other device types.
Sincerely,
Earl Moon
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=========================================================================
Date: Tue, 30 Jun 1998 09:15:56 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jerry Cupples <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jerry Cupples <[log in to unmask]>
Subject: Re: PCI Cards
X-To: Colin Weber <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Colin Weber asked:
>We have a requirement to re-design an existing ISA bus card design onto a
>5V, 32-bit PCI card.
>
>1.
>First glance at PCI specifications highlight that there are two default
>sizes for these cards, Short and Long. What is the reasoning behind this?
There are many types of card cage configurations in PC's and some of them
have slots which can only accomodate a half length format. The PCI local
bus Specification rev 2.1 says "The fixed and variable height short length
cards were chosen for panel optimization to provide the lowest cost for a
function". I'd say the PC people have gotten wise to the idea that they
should get a smaller board for less money, and that the number and size of
components necessary to make an ethernet NIC, for instance, has dropped to
12-15 square inches. In short, cost.
>Or another way of asking the same question, can the length of the board be
>vary?
Yes. The length has a lower limit of about 12 cm from the faceplate edge to
the end of the finger connector. I have seen boards which have irregular
shapes in which the connector edge is a couple inches longer than the
opposite edge, and they are panelized to yield more units.
>Does it have to conform to either of the specific short or long lengths?
Our Company is definitely producing NIC's (network interface cards) shorter
than the 6.875" "short card", and so are many others. I'd recommend that
you go out and buy some products and take a look at the configurations.
Your local CompUSA should have numerous brands to choose from. I know that
Intel (who is godfather of the PCI bus) has some NIC's with very clever
small and irregular layouts. Both lenght and height are varied in many of
these.
See:
http://www.pcisig.com/
good luck,
Jerry Cupples
Interphase Corporation
Dallas, TX USA
http://www.iphase.com
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=========================================================================
Date: Tue, 30 Jun 1998 09:53:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Contamination Testing for Water Soluble Flux Residue
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hi Kathy,
Water sol fluxes are *INDEED* ionic materials and can/will cause serious
reliability problems if not thoroughly removed.
Surface resistivity (also known as SIR or Surface Insulation Resistance) is
a good "localized" test as a special layout (opposing interlocked comb
patterns) must be present on either the assy or a coupon. These are not
always practical for production as PCB real estate value increases. (
Doncha' wish Calif real estate value followed suit?!) This test is a good
barometer for process qualification and localized evaluation, such as
underneath micro-BGA, etc.
The more common method for production is the solution extract method
commonly known as "Omegameter" or "Ionograph", depending on the manufacturer
of choice. I know of a few good used machines in the area if you're
interrested. This method essentially starts with de-ionized water-alcohol
solution then the assy is immersed for a period (typical 10 min) so the
contaminants dissolve into the solution. The volume resistance is then
measured and based on the volume of solution and surface area of the
assembly, one can determine the ionic residue in terms on micrograms of nacl
per sq. in. Typical industry standards for high quality commercial product
is 14 micrograms/sq. in. The reason nacl (salt) is mentioned is that the
test is not selective, but is an equivalent conductivity (or resistivity) to
salt, which the effects can be readily quantified. The drawback of this
method is that it will not identify a potential problem in a "trouble area"
such as underneath a daughterboard because it averages the results over the
entire surface of the assembly. It is, though, a reasonable "barometer" *IF*
in a case of a known potential trouble spot, SIR was done to first determine
the effectiveness of the cleaning process and further correlated to
Omegameter measurements for prodution confirmation.
I can help you set up these tests in house and would love to stop by to
discuss it with you.
Regards,
Ed Popielarski
QTA Machine
10 Mc Laren, Suite D
Irvine, Ca. USA 92618
Ph: (949)581-6601
Fx: (949)581-2448
E-Mail: [log in to unmask]
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=========================================================================
Date: Tue, 30 Jun 1998 09:56:31 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Handheld O2 Measurement
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hi Techies,
Does anyone have a recommendation for a handheld (and low cost) Oxygen
Analyzer capable of down to 0% with .1% resolution? I can compromise
resolution for price, if neccessary.
Thanks in advance,
Ed Popielarski
QTA Machine
10 Mc Laren, Suite D
Irvine, Ca. USA 92618
Ph: (949)581-6601
Fx: (949)581-2448
E-Mail: [log in to unmask]
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=========================================================================
Date: Tue, 30 Jun 1998 08:50:07 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David D Hillman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David D Hillman <[log in to unmask]>
Subject: Re: Low-melt solder alloys for desoldering
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hi TechNet - I just wanted to add some additional info to Peter's reply.
The NCMS has published their final report on the Lead Free Solder Project
which investigated a multitude of lead free solder alloys. The report has
some excellent data concerning bismuth containing alloys and the pro/cons
associated with trying to use such an alloy in today's electronics material
mix. The report can be obtained through the NCMS. The concern of impacting
the solder joint reliability due to the addition of bismuth is real and has
been documented in "Solder Mechanics - A State of the Art Assessment" ISBN
# 0-87339-166-7 also. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Peter Swanson <[log in to unmask]> on 06/25/98 02:19:37 PM
Please respond to [log in to unmask]
To: [log in to unmask]
cc: (bcc: David D Hillman/CedarRapids/Collins/Rockwell)
Subject: Re: [TN] Low-melt solder alloys for desoldering
In message <[log in to unmask]> [log in to unmask]
writes:
> I would like your opinions and experiences using low-melt solder alloys
for
> rework of smd. The mixture contains tin, lead, and bismuth. What
> potential problems are associated with this combination?
It's an interesting concept, one which we have been considering.
The process involves reflowing a LMP (low melting point) solder into the
existing solder joints, using a soldering iron or hot air pencil (and
optionally using some under board heating). The LMP solder mixes with the
existing stuff to form a mixture which stays molten at a much lower
temperature
than standard 63/37, and therefore stays molten much longer, even when you
remove the heat source; so, you can take off even a large QFP device
having just used a soldering iron or hot air pencil.
I see pros:
1) Very inexpensive on the equipment side, no capital investment needed
2) Can be done anywhere (in the field)
I see cons:
1) Material (which is a tin/lead/bismuth/indium type combination) is
expensive,
so not really a process for people doing lots of rework
2) It is vital that the LMP solder and mixtures be removed from the pads
before a new component is placed and soldered, otherwise your joint could
reflow at a low (maybe operating!) temperature
3) Won't work for BGAs and other array devices
Para 2 is what worries me; no matter how well you wick off the LMP
solder from the pads, I think you will still have a (thin) layer of
bismuth-
bearing intermetallic left on the pad. When a new joint is made with
conventional solder, the bismuth will stay at that interface (not being
very
mobile). Bismuth being brittle, I reckon the new joint is much more likely
to
fatigue crack at the joint/pad interface.
So, reliability suspect? I dunno, no data, just theory. Maybe the approach
is
valid for the hobbyist or the occasional job in a low-tech consumer product
(Class 1). Other inputs appreciated.
Some info from a company who have commercialised this process can be
found at http://chipquikinc.com (I offer this for your interest, not as an
advertisement - sheesh, some people are sensitive!).
Peter
--
:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
::::
Peter Swanson Oxfordshire,
England
INTERTRONICS
[log in to unmask]
http://www.cygnetuk.demon.co.uk
Suppliers of materials and consumables to the electronics & related
industries
:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
::::
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=========================================================================
Date: Tue, 30 Jun 1998 09:10:53 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Robert E. Mesick" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Robert E. Mesick" <[log in to unmask]>
Subject: GEN: DI Water System Capacity
X-cc: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
>Date: Mon, 29 Jun 1998 06:28:42 -0400
>From: Paul Wilson <[log in to unmask]>
>Subject: GEN: DI Water System Capacity
>
>Technet:
>
>.... Looking for a good number cruncher to explain options available.
----------<Anti-sales stuff deleted>------------
----------<Which one of you technical people out there developed plasma,
plotters, black hole, quad drills, solder leveling, automated plating
lines, inline tab plates (Hi Charlie), dry film solder mask, photoresist
(liquid and dry), pick and place, epoxy adhesives, inline chip carriers,
etc. Your world is driven by vendor inovations. Multilayers were only
possible once some vendor figure out how to do it. It is a joint effort
between vendors and shops, we would still be using paper, wire and a Sears
hand drill if it wasn't for vendors figuring out a better mouse trap... and
selling it> !:-) Now lets talk about reps...
>Suppose you have a tandem cation-anion system filled with resin with a
>=capacity of 90 cubic feet each. Flow rates of 10 gal per minute are
>typi=cal or slightly less.
>How many gallons throughput are expected with 400ppm TDS input before >reg=
>eneration?
>How many gallons regenerants are needed for regeneration?
>How many gallons of water are needed for backwash?
>What is the expected lifespan between regenerations?
>What quality of water is expected to be maintained (2 Megohm or 6 >
>Megaohm=
etc...
Paul,
Check out the home pages of Resintech, Pureolite and Sybron, Bayer,Dow and
R&H. They are resin manufacturers and have full data sheets. One of them
has a form you can fill out and get back a suggested configuration.
In general -
Regeneration frequency is base partly on ion distribution,
monovalent,divalent etc. You need a better water analysis to determine the
actual frequency of regeneration. If you have a pure copper sulfate
solution, you can run much longer between regenerations with a high
resistance reading, Sodium and Chloride bleed out sooner and ... but,
Copper is divalent and will take up two sites and sodium is monovalent and
will take up one so you really need to know the ratio then look it up on
the chart (one of about 6) to determine the capacity of the resin then look
at the monovalent to divalent ration to determine the next parameter etc...
So everyone on just ballparks it and if it isn't exactly right, you just
live with it or fix it. You guarantee a certain capacity and water quality
by oversizing the columns.
Resin columns are not equal. Anion columns are usually larger than cation
as the capacity of the resin differs. With low pH water, the anion must be
MUCH larger to take out the extra anions.
To generalize. Anion resins, 14kgr/cu.ft. Cation resins, 18-22 kg/cu.ft.
I think its 17.1 ppm /kg. Actual capacity depends on regenerate used
(4,6,8,or 10 lb/cu.ft) and ion mix.
Rinsing, 3 bed volumes per rinse and 1 hour slow rinse at the end to get to
lowest TDS out (wastes lots of water). One half hour for Cation regenerant
and one hour for anion regenerant.
I think most recycling system operators are generally happy with less then
20 ppm out of the system once reality has set it. For pure water
applications, they polish with a mixed bed service from Culligan.
We have some capacity calculations on our website below (no salesman will
call) and if it's a waste treatment application, see Circuitree, May 98.
If you're building your own, get tight with a resin manufacturer, they can
help you a lot. If you are putting in a dual system, you don't have to
worry about regeneration frequency or time as they switch back and forth
(Assume 4 hours minimum for regeneration).
At 400 ppm tds, for waste, look at a chelated resin for no recycling and DI
for people who like to be stressed all the time and work weekends. For
incoming water, RO is the only way to go at 400 ppm tds. Dow did a
cost-benefit study many years ago on DI vs RO and the break point was 70
ppm and RO's have come down in cost significantly since then.
If you are recycling, make sure you have enough water capacity to cover a
missed regeneration cycle (4-6 hrs).
In general, if you haven't the faintest idea what you are putting in the
system, no one can tell you how long it will last nor will you be able to
predict accurately what the water quality is comming out. You can get some
ball park numbers but they are guesses. Ion exchange is chemistry, if you
want numbers out, you have to put numbers in (lots of them). They are
still writing papers on how to figure the calculations of ion exchange
capacity with various ion combinations.
Best Regards
Bob Mesick
Remco Engineering
Water and Wastewater Treatment Systems
www.remco.com
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=========================================================================
Date: Tue, 30 Jun 1998 09:21:00 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"arrigo.tony" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "arrigo.tony" <[log in to unmask]>
Subject: Fidutial Requirements
MIME-Version: 1.0
Content-Type: multipart/alternative; boundary="----
=_NextPart_001_01BDA442.358C2840"
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this format, some or all of this message may not be legible.
------ =_NextPart_001_01BDA442.358C2840
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What are the specifications that discribe fidutial usage and placement? I
assume the specification will discuss both local and global, as well as the
correct size and clear out areas.
Thanks for your assistance
Tony Arrigo
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<TITLE>Fidutial Requirements</TITLE>
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<P><FONT SIZE=3D2>What are the specifications that discribe fidutial =
usage and placement? I assume the specification will discuss both =
local and global, as well as the correct size and clear out =
areas.</FONT></P>
<P><FONT SIZE=3D2>Thanks for your assistance</FONT>
</P>
<P><FONT SIZE=3D2>Tony Arrigo</FONT>
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=========================================================================
Date: Tue, 30 Jun 1998 09:32:00 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"arrigo.tony" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "arrigo.tony" <[log in to unmask]>
Subject: PWB Procurement Recommendations
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Can anyone tell me what is gained by specifying "Fabricate to Mil-PRF-31032
vs. IPC-xxx?" Is a fabrication specification even required when purchasing
a multi-layer PWB at all? Will all PWB manufactures give some minimum
fabrication requirement if none is stated on the drawing or in the purchase
order, or is it always BUYER BEWARE??
Thanks for your assistance.
Tony Arrigo
------ =_NextPart_001_01BDA443.BAC3E460
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<TITLE>PWB Procurement Recommendations</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=3D2>Can anyone tell me what is gained by specifying =
"Fabricate to Mil-PRF-31032 vs. IPC-xxx?" Is a =
fabrication specification even required when purchasing a multi-layer =
PWB at all? Will all PWB manufactures give some minimum =
fabrication requirement if none is stated on the drawing or in the =
purchase order, or is it always BUYER BEWARE??</FONT></P>
<P><FONT SIZE=3D2>Thanks for your assistance.</FONT>
</P>
<P><FONT SIZE=3D2>Tony Arrigo</FONT>
</P>
</BODY>
</HTML>
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=========================================================================
Date: Tue, 30 Jun 1998 16:17:21 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Philip Stoten <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Philip Stoten <[log in to unmask]>
Subject: EPCmail
Mime-Version: 1.0
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EPCmail_2 - Electronic Newsletter - Late June
European PCB Convention - Wiesbaden - Germany - September 29th to =
October 1st
Along with the tens of thousands of =B3Convention News=B2 being sent =
out, the EPC Event Management team is producing a more regular update =
of progress on the show to be distributed digitally. This document =
provides up to the minute data and is circulated to anyone wishing to =
receive it.
If you received this and wish to forward it to any other parties =
please do so, if you received this forwarded and would like to ensure =
that you get future issues please drop us an Email with your details =
so we can add your name to the recipient list.
------------------------------ FOR MORE INFORMATION =
-----------------------------------
If you would like more information or just a chat about the European =
PCB Convention please feel free to call, fax, or Email Philip Stoten, =
the Event Manager:
Philip Stoten, Event Manger, European PCB Convention
4 Winship Road, Milton, Cambridge, CB4 6BQ, United Kingdom
Tel: +44 1223 423308 - Fax: +44 1223 423371 - Email: =
[log in to unmask]
------------------------------ A SELL OUT EVENT =
-----------------------------------
A sell out exhibition, a world class conference and an interactive =
workshop programme all combine to produce the most important printed =
circuit event in Europe this year.
Demand continues to be strong for this yea'rs European PCB Convention =
in Wiesbaden and it isn=B9t difficult to see why. This event is not =
just a first for EPC, it is a first for Europe. For the first time =
in Europe, the whole PCB industry is ready to gather in one location =
for an event of such international standing that visitors from as far =
away as Japan and the United States are already committed to =
attending.
Perhaps the fact that almost 7000 square metres of exhibition space =
will be occupied by Europe=B9s leaders in equipment, consumables and =
services to the industry is the attraction to these visitors. =
Perhaps it is the news of the conference programme, to be released =
during June, that has mobilised these people into coming to Wiesbaden =
this autumn. The quality of the papers and of the presenters will =
clearly ensure that this is a world class conference covering both =
technical and commercial issues.
Or perhaps it is the opportunity to get involved in the workshop =
programme that has inspired those in the industry who believe they =
can affect the industry as well as keep in touch with it at such an =
event.
Whether it is one of these reasons or the opportunity to network with =
the worlds PCB industry that brings people to Wiesbaden, it is =
assured that the event will be the largest of its kind in Europe.
Don=B9t miss this opportunity to be part of history, and see the =
World in Europe
See you in Wiesbaden - Philip Stoten - Event Manager
------------------------- A World Class Conference Programme =
---------------------
In Wiesbaden this year you will have the opportunity to take part in =
a world class event. EPC 98 combines exhibition, conference and =
workshops to provide the definitive European PCB event.
The conference programme has now been released and the response has =
been one of excitement.
The programme begins on day one with what can only be described as an =
un-missable keynote session entitled =B3World-wide Trends in the =
Electronic Interconnection Industry=B2.
Bill Burr, President of EIPC, will introduce this session that offers =
presentations from Robert Mills, President of Viasystems Group Inc., =
Tiana Vainio, Purchasing Manager responsible for global sourcing of =
PCB=B9s at Nokia Mobile Phones, and Dieter Weiss of Dielektra. This =
session is sure to fill up very quickly, speakers of this quality and =
influence are a rarity and much of the industry will be keen to hear =
what they have to say.
Following this first session will be the official opening of the =
exhibition. During that afternoon and the following two days the =
conference will be divided into two simultaneous tracks. On Tuesday =
afternoon there will be a =8Cprocess track=B9 and =8Cdesign and data =
track=B9.
On Wednesday there will be a =8Cmicrovia track=B9 running through the =
day as well as a morning =8Cmanufacturing track=B9 and an afternoon =
=8Cmanagement track=B9. Thursday will be a morning only session with =
a =8Cprocess track=B9 and a =8Ctechnology track=B9.
The quality of the papers offered was exceptionally high and those =
chosen represent the highest levels of skill and knowledge within the =
PCB industry from all over the world. Simultaneous translation into =
French, Italian and German will ensure that every delegate can get =
the maximum value from their EPC visit. The conference sessions are =
scheduled to allow delegates time to visit the exhibition and the =
facilities at the Rhein Main Hallen, which in Wiesbaden are second to =
none.
The social calendar, spouses programme and wonderful location all =
combine to make the visit pleasurable as well as educational.
For more information about this exciting conference contact the Event =
Manager=B9s office and ask for a full copy of the programme.
---------------- Workshops allow EPC Visitors to influence their =
industry --------------
The team at EPC are delighted to be able to offer such an extensive =
workshop programme at this coming European PCB Convention in =
Wiesbaden this Autumn.
Workshops represent a unique opportunity for delegates to influence =
the future in which they work. The workshops are chaired by leading =
technologists from within the industry and are expected to provide a =
lively forum for debate. The importance of workshops should never be =
underrated in an industry moving as fast as PCBs.
To get more details about the workshops or to obtain information =
about taking part, contact Eric Toumieux at the EIPC or Philip Stoten =
at the EPC Event Managers office.
Workshop titles include:
Future Bare Board Test Solutions for High Density Interconnects
ISO 14001 - A Challenge for the European PCB Industry
Metal Finishing (in German)
Effective Design to Manufacture Data Transfer
Alternative Materials for HDI PCB=B9s with Microvia Technology. (in =
German)
Laser Drilling Technology
Laser Direct Imaging
------------------------- Exhibitor List -------------------------
An impressive list of exhibitors is sure to attract a substantial =
crowd of visitors.
A full layout of the stands and stand number list is available from =
the Event Manager.
3M
ACS Industries
Abba Rubber
Adam Pill
AIK Laminates
Aismalibar
ALFA
Alfachimici
Alphamat
AOI International
Argon
Arlon
August Krempel Soehne
B B=E4cher
Barco
Bieffebi
BLT Circuit Services
BMS H Haller
C A Picard
CAB EL
Camtek
Cedal
CCI Eurolam
CDL Electronics
CEMA
CEMCO
Chemring
Ching Kuang Chemical
Chrisropher Associates
CIBA Speciality Chemicals
Cimatec
Cimnet Information
Cipel Martigny
Circuit Automation
Cirgraphics
CMI International
Coates
Cugher
Deglarges Industries
Daiwa Giken
Depeltronik
Dexter
DuPont (PEM)
DuPont (AFS)
EIE Systems
Electra Polymers
Electro Scientific
Electrochemicals
Elektrotech Services
Elga Ronal
Elkem
Enthone OMI
ETEC
Excellon Europa
Fastek
FLG Gr=FCnewald
Florida Cirtec
FSL Deutschland
Gabriel Benmajor
Gerber Systems
Grace
GSPK Engineering
GTB
G=FCnther Strecker
Heart
Hitachi Seiko
HML
Holders Technology
Holmstrands Automation
Imaro
Integritest
International Supplies
IPC
Isola
ITC Intercircuit
Kemmer Pr=E4sizion
KSM International
Lamitel
Lantronics
Lavinir
Lea Ronal
Leitec
Lippert
Lisi
Lloyd Doyle
Ludy
Lumonics
M & B Plating Racks
M D Test Systems
MacDermid
Mania
Maschinfabrik La=FCffer
MEC Europe
MicroCraft
Mitsubishi
Mitsui Eurocel
Moderne Elemat
Morton International
Multiline Europe
Nais
Nan Ya
Nelco International
New Systems
Nidec-Read
Nubal Electronics
Occleppo
Olec
ONO Sokki
Optek
Orbotech
Orc Electronic Products
Orc Manufacturing
Ormecon
Paper Corporation
PCB Machinery
PENC
Peter Jordon
PIAD
Piergiacomi
Pluritec Italia
Pola e Massa
Posalux
PMD (UK)
Polar Instruments
Polyclad Europe
Probetest Systems
Process Automation
Process Equipment
Program Data Inc.
Prom-S
PVE
Ramasa
Resco
Robert B=FCrkle
Rogers
Romar Technologies
R=F6ntgenanalytik
Schmoll Maschinen
SDI
Seica
Serfilco
Sheldahl
Shipley Europe
Sirpi
Sobeca International
Softwires
Sogem
Stork GmbH
Systronic
Taiyo Inks
TCI Sarl
Teca
Technofor
Technolam
Teknek
Telmec
Teledyne
Tibor Darvas
Valor Computer Systems
Vantage Circuit Products
Von Roll Isola
Viking Test Services
Vitech International
VTT
Westwind
W H Brady
Yamauchi
------------------------------ TRAVEL PACKAGES =
-----------------------------------
Making life a little easier when travelling to Wiesbaden
By putting together accommodation, travel and entry ticket packages =
EPC goes a little further in making your life as a visitor a little =
simpler.
To take advantage of these offers just call, fax or e-mail the Event =
Managers office and ask for details of packages from your particular =
part of the world. EPC is committed to offering as complete a =
visitor package as possible.
With a spouse programme on offer and the beautiful city of Wiesbaden =
to visit it makes sense to add a few extra days of vacation to your =
trip.
-------------------- Hotel Accommodation filling up fast =
---------------------------
To further simplify the experience of visiting EPC =8C98 we have =
booked a substantial number of hotel rooms within a comfortable =
distance of the Rhein Main Hallen. The rates have been negotiated to =
ensure that the visitor gets the best possible value for money.
These rooms are being booked fast as demand to be part of this event =
grows. So don=B9t delay make sure you have a room in Wiesbaden in =
September and take the opportunity to enjoy this wonderful city.
To book hotel rooms you can contact Eric at the EIPC offices in =
Basel, Switzerland.
Tel: +41 61 482 3900 - Fax: +41 61 482 3910 - Email: =
[log in to unmask]
or call the Event Manager and ask him to fax you a form.
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=========================================================================
Date: Tue, 30 Jun 1998 10:25:23 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Hitchcock, Darren" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Hitchcock, Darren" <[log in to unmask]>
Subject: Re: PWB Procurement Recommendations
Mime-Version: 1.0
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Tony,
I'm sure all fabricators and assemblers have a minimum fabrication
requirement that is controlled by that company. However, there is
nothing wrong with good concise communication. You can expect to get
what you ask for, but if you don't ask for a specific minimum
requirement, you'll never know what you will get. If you specify the
requirement, you can expect all fabricators to meet the same minimum
standards.
I recommend specifying your acceptability requirements on the print as
it relates to an industry standard (like IPC-xxxx). This is the best
way to communicate your requirements to the fabricator. Many of our
customers also have "customer specifications" that they use to
communicate general requirements so that the print doesn't become
cluttered with notes. In these "customer specifications" they detail
how their requirements relate to an industry standard and also include
"unless otherwise specified on the fabrication drawing or purchase
order" clauses. These include packaging requirements, default
acceptability requirements (ie: IPC-6011/6012 class 2), etc. In this
case, you should put a note on the print stating that the board or
assembly should be manufactured to meet the requirements of your
customer specification.
In all cases, the fabrication drawing should have a note describing the
acceptability requirement either by industry standard or customer
specification.
Darren Hitchcock
Merix Corporation
> ----------
> From: arrigo.tony[SMTP:[log in to unmask]]
> Sent: Tuesday, June 30, 1998 9:32 AM
> Subject: PWB Procurement Recommendations
>=20
> Can anyone tell me what is gained by specifying "Fabricate to
> Mil-PRF-31032 vs. IPC-xxx?"=A0 Is a=A0 fabrication specification even
> required when purchasing a multi-layer PWB at all?=A0=A0 Will all PWB
> manufactures give some minimum fabrication requirement if none is
> stated on the drawing or in the purchase order, or is it=A0 always =
BUYER
> BEWARE??
> Thanks for your assistance.=20
> Tony Arrigo=20
>=20
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=========================================================================
Date: Tue, 30 Jun 1998 11:00:42 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Robert E. Mesick" <[log in to unmask]>
Subject: Error in - GEN: DI Water System Capacity
X-cc: Paul Wilson <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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I said:
> To generalize. Anion resins, 14kgr/cu.ft. Cation resins, 18-22 kg/cu.ft.
> I think its 17.1 ppm /kg. Actual capacity depends on regenerate used
> (4,6,8,or 10 lb/cu.ft) and ion mix.
In line 2, it should be 17.1 g/cu.ft.
To figure, divide your ppm by 17.1, that will give you grains. Divide grains by
1000 and that will give you kilograins.
400/17.1/1000 = .0234 kg
At 10 gpm
= .234 kg/min or
14.04 kg/hr
Need to know the ration of anions to cations now. Assume 50/50
Now 7 kg/hr cation, and 7 kg/hr anion. Assume resin capacity of 14 kg/cu ft
anion and 21 kg/cu. ft cation.
Require 1/3 cu.ft cation resin per hr
Require 1/2 cu. ft anion resin per hr.
Double it to be safe and calculate for one regen each 12 hrs.
Best Regards,
Bob Mesick
Remco Engineering
Water and Wastewater Treatment Systems
http://www.remco.com
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=========================================================================
Date: Tue, 30 Jun 1998 15:07:26 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: Pramod Patel/solder joint reliability
X-To: [log in to unmask], [log in to unmask]
X-cc: [log in to unmask], [log in to unmask], [log in to unmask],
[log in to unmask]
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Hi Mark & Vern,
It definitely is news to me, "that the China Launch problems were due to
a lack of side/toe filleting". Failure at launch can only mean one of two
things: (1) the solder joint was never properly made (wetted), or (2)
inappropriate flight-hardware testing prior to launch accummulated too much
fatigue damage (micro/macro-cracks) to withstand the mechanical loads during
launch (see Hubble, Magellan, Gallileo). In neither case, would the presence
of side/toe filleting made a signficant difference.
Side fillets will defintely increase the peeling stress required due to the
forces necessary to rip through them; that does not however equate to a more
reliable solder joint in the long-term. If you have inadequately wetted solder
joints, however, solder and toe fillets will likely prolong the time at which
an infant mortality failure will occur in the short-term.
The decision makers for "Missile, Launch Vehicle, wartime avionics/sonar
and/or Spacecraft" should properly educate themselves as to what and what not
solder joints can do. #1 issue: get away from large ceramic components on
FR-4, #2 issue: qual testing should not be done on flight-hardware.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask]
In a message dated 6/30/98 10:38:55, [log in to unmask] wrote:
>I suggest you fellas do some more homework before drawing to Mark's
>conclusion, as one "can always make the statement that proper wetting
>makes for better peel strengths", independent of which surfaces you are
>discussing. Side fillets(PROPERLY wetted) make a VERY SIGNIFICANT
>difference in peel strengths of properly formed gull-wing and/or J-Lead
>products. The issue is not the raw peel strength itself, but the
>long-term reliability of the joints continuously under thermo-mechanical
>stress. That is where the side-fillets become essential to long-term
>reliability of our systems.
>
>Bottomline, do YOU want to be responsible for Missile, Launch Vehicle,
>wartime avionics/sonar and/or Spacecraft failures due to simple
>solderjoint issues??
>
>I firmly believe you all are playing with fire in downplaying the
>importance of "side-fillets" to long-term solderjoint reliability.
>
>You likely missed or ignored the "multi-millions" lost on the China
>launch due to a simple solderjoint failure(??)
>
>----Original Message-----
>From: Kwoka, Mark [mailto:[log in to unmask]]
>Sent: Tuesday, June 30, 1998 10:47 AM
>To: [log in to unmask]
>Cc: [log in to unmask]; [log in to unmask];
>[log in to unmask]; [log in to unmask]; [log in to unmask]; Kwoka,
>Mark
>Subject: RE: RE: Need Pramod Patel's email address and/or telephone #
>
> Werner,
> Thanks for the clarification. Your second and fifth points are what I was
>after. I infer that if inadequate wetting of the lead to the board
> land is infact present, then the "lead peeling test" will indicate lower
>"peeling forces" than would be obtained from identical leads
> that were "adequately wetted". Also, side fillets are not important if
>adequate lead wetting is exhibited.
> Regards,
> Mark
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Wednesday, June 17, 1998 4:33 PM
> To: Kwoka, Mark
> Cc: [log in to unmask]; [log in to unmask];
>[log in to unmask]; [log in to unmask]; [log in to unmask]
> Subject: Re: RE: Need Pramod Patel's email address and/or
>telephone #
>
> Hi Mark,
> First, there is no such thing as a 'lead pull test;' while you are of course
> pulling on the lead, what you are doing to the solder joint is peeling it-
the
> proper reference is a lead peeling test. Some of your notions about solder
> joint strength result directly from the false mental picture resulting from
> the words 'tensile pull'.
> Second, the solder joint strength, as determined by a lead peeling test, has
> no bearing on the reliabilty of the solder joint, provided the peeling test
> does not reveal inadequate wetting.
> Third, in a peeling test you always need to observe the whole peel-load
> history for the whole peeling process; with a 1T or larger heel fillet, the
> largest load will be at the initial portion of peeling through the heel
> fillet, with lower loads subsequently depending on whether or not (at to
what
> extent) side fillets are present.
> Fourth, the fracture surface of the peeled solder joints give typically more
> infrmation than do the peel-load histories, because the ONLY realy important
> finding is whether or not adequate wetting has taken place.
> Fifth, the reliability in actual use does to a large extent depend on the
heel
> fillet and the 'bottom flat' wetting; if the foot length is <3W, than also
on
> the presence of a toe fillet, because short feet 'rock' during thermal
> cycling. Side fillets are less important, unless you have wetting problems.
>
> Werner Engelmaier
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=========================================================================
Date: Tue, 30 Jun 1998 15:42:06 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Singleton, Vern" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Singleton, Vern" <[log in to unmask]>
Subject: Re: Pramod Patel/solder joint reliability
X-To: "[log in to unmask]" <[log in to unmask]>,
"[log in to unmask]" <[log in to unmask]>
X-cc: "Gonya, Stephen" <[log in to unmask]>,
[log in to unmask], [log in to unmask], [log in to unmask]
MIME-version: 1.0
Content-type: text/plain; charset="iso-8859-1"
Come on, guys! All "I" said was the launch failure was due to a "Bad
solderjoint". I never said anything about the actual mechanism, what
type component, leadfinish or any other metric and/or
mechanism---because I don't know. All I want is the "best joint
possible" for any product type. That means getting good,wetted
side/heel fillets for all leaded SMT devices.
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Tuesday, June 30, 1998 3:07 PM
To: [log in to unmask]; [log in to unmask]; [log in to unmask]
Cc: [log in to unmask]; [log in to unmask]; [log in to unmask];
[log in to unmask]
Subject: Re: Pramod Patel/solder joint reliability
Hi Mark & Vern,
It definitely is news to me, "that the China Launch problems were due to
a lack of side/toe filleting". Failure at launch can only mean one of
two
things: (1) the solder joint was never properly made (wetted), or (2)
inappropriate flight-hardware testing prior to launch accummulated too
much
fatigue damage (micro/macro-cracks) to withstand the mechanical loads
during
launch (see Hubble, Magellan, Gallileo). In neither case, would the
presence
of side/toe filleting made a signficant difference.
Side fillets will defintely increase the peeling stress required due to
the
forces necessary to rip through them; that does not however equate to a
more
reliable solder joint in the long-term. If you have inadequately wetted
solder
joints, however, solder and toe fillets will likely prolong the time at
which
an infant mortality failure will occur in the short-term.
The decision makers for "Missile, Launch Vehicle, wartime avionics/sonar
and/or Spacecraft" should properly educate themselves as to what and
what not
solder joints can do. #1 issue: get away from large ceramic components
on
FR-4, #2 issue: qual testing should not be done on flight-hardware.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask]
In a message dated 6/30/98 10:38:55, [log in to unmask] wrote:
>I suggest you fellas do some more homework before drawing to Mark's
>conclusion, as one "can always make the statement that proper wetting
>makes for better peel strengths", independent of which surfaces you are
>discussing. Side fillets(PROPERLY wetted) make a VERY SIGNIFICANT
>difference in peel strengths of properly formed gull-wing and/or J-Lead
>products. The issue is not the raw peel strength itself, but the
>long-term reliability of the joints continuously under
thermo-mechanical
>stress. That is where the side-fillets become essential to long-term
>reliability of our systems.
>
>Bottomline, do YOU want to be responsible for Missile, Launch Vehicle,
>wartime avionics/sonar and/or Spacecraft failures due to simple
>solderjoint issues??
>
>I firmly believe you all are playing with fire in downplaying the
>importance of "side-fillets" to long-term solderjoint reliability.
>
>You likely missed or ignored the "multi-millions" lost on the China
>launch due to a simple solderjoint failure(??)
>
>----Original Message-----
>From: Kwoka, Mark [mailto:[log in to unmask]]
>Sent: Tuesday, June 30, 1998 10:47 AM
>To: [log in to unmask]
>Cc: [log in to unmask]; [log in to unmask];
>[log in to unmask]; [log in to unmask]; [log in to unmask]; Kwoka,
>Mark
>Subject: RE: RE: Need Pramod Patel's email address and/or telephone #
>
> Werner,
> Thanks for the clarification. Your second and fifth points are what I
was
>after. I infer that if inadequate wetting of the lead to the board
> land is infact present, then the "lead peeling test" will indicate
lower
>"peeling forces" than would be obtained from identical leads
> that were "adequately wetted". Also, side fillets are not important
if
>adequate lead wetting is exhibited.
> Regards,
> Mark
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Wednesday, June 17, 1998 4:33 PM
> To: Kwoka, Mark
> Cc: [log in to unmask]; [log in to unmask];
>[log in to unmask]; [log in to unmask]; [log in to unmask]
> Subject: Re: RE: Need Pramod Patel's email address and/or
>telephone #
>
> Hi Mark,
> First, there is no such thing as a 'lead pull test;' while you
are of course
> pulling on the lead, what you are doing to the solder joint is
peeling it-
the
> proper reference is a lead peeling test. Some of your notions
about solder
> joint strength result directly from the false mental picture
resulting from
> the words 'tensile pull'.
> Second, the solder joint strength, as determined by a lead
peeling test, has
> no bearing on the reliabilty of the solder joint, provided the
peeling test
> does not reveal inadequate wetting.
> Third, in a peeling test you always need to observe the whole
peel-load
> history for the whole peeling process; with a 1T or larger heel
fillet, the
> largest load will be at the initial portion of peeling through
the heel
> fillet, with lower loads subsequently depending on whether or
not (at to
what
> extent) side fillets are present.
> Fourth, the fracture surface of the peeled solder joints give
typically more
> infrmation than do the peel-load histories, because the ONLY
realy important
> finding is whether or not adequate wetting has taken place.
> Fifth, the reliability in actual use does to a large extent
depend on the
heel
> fillet and the 'bottom flat' wetting; if the foot length is <3W,
than also
on
> the presence of a toe fillet, because short feet 'rock' during
thermal
> cycling. Side fillets are less important, unless you have
wetting problems.
>
> Werner Engelmaier
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Date: Tue, 30 Jun 1998 15:00:13 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Todd Ness <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
Comments: Authenticated sender is <tness@[150.150.151.220]>
From: Todd Ness <[log in to unmask]>
Organization: Emerson Motion Control
Subject: Wave Solder Pot Temp-63/37
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
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Hi,
I would like to know the differences between having our solder pot
temp for 63/37 solder at 261 Degrees C instead of 250 Degrees C. Will
we see less bridging and better top-side flow at the higher temp? Are
there any pros and cons for the different temperatures?
Thanks,
Todd N
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=========================================================================
Date: Tue, 30 Jun 1998 15:45:13 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
Comments: Authenticated sender is <jays@gateway>
From: Jay Soderberg <[log in to unmask]>
Organization: Holaday Circuits, Inc.
Subject: Re: PWB Procurement Recommendations
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7BIT
In my humble opinion, a fabrication specification is essential.
Without it there is no basis of agreement about what the finished
product requirements are. Unless specified somehow, the minimum
level of fabrication requirements will vary by PWB manufacturer,
which would be a LARGE headache at manufacturing. Also, without
specifying fabrication requirements at the quoting stage, the prices
quoted will reflect varying levels of manufacture and you may end up
buying something that does not meet your needs because it was
inexpensive!
Personally, I would favor IPC specifications over
MIL-PRF-31032. There are not too many board shops that are qualified
to MIL-PRF-31032 at this point. The selection of shops is much
greater for IPC specifications.
> Date: Tue, 30 Jun 1998 09:32:00 -0700
> From: "arrigo.tony" <[log in to unmask]>
> Subject: PWB Procurement Recommendations
> Can anyone tell me what is gained by specifying "Fabricate to
> Mil-PRF-31032 vs. IPC-xxx?" Is a fabrication specification even
> required when purchasing a multi-layer PWB at all? Will all PWB
> manufactures give some minimum fabrication requirement if none is
> stated on the drawing or in the purchase order, or is it always
> BUYER BEWARE??
>
> Thanks for your assistance.
>
> Tony Arrigo
>
Legal Notice:
All opinions are my own and do not necessarily reflect the opinion of the Management or Ownership of this station.
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Date: Tue, 30 Jun 1998 17:00:00 -0400
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ryan Jennens <[log in to unmask]>
Organization: Phoenix Engineering Design, Inc.
Subject: Re: Wave Solder Pot Temp-63/37
X-To: Todd Ness <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Todd-
We just upped our solder pot temp from 460F to 490F and saw dramatic
improvement in topside fillets using selective solder pallet. Our
no-clean flux residue was also dramatically reduced. However, the dross
formation rate increased accordingly. A trade-off, but the solder
quality may be worth it.
Good Luck
Ryan Jennens
Phoenix Engineering
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Date: Fri, 19 Jan 1996 04:58:48 PM
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: HK CONVENTIONAL CNTR SEMINAR - 28TH JULY, 1998
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INTERNATIONAL MANAGEMENT ASSOCIATION
»´ä¥ø·~¦p¦ó¦b¸gÀÙt¼Wªø¤U¥¿±µo®i
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* »´ä¥ø·~®a¤ÎºÞ²z¼hÀ³¦³ªº°]°È¤ÎºÞ²zªº·ÀIºÞ²z¡C
* »´ä°Ó¬É±N¨Óªº¥«³õµ¦¹º¤Îµo®i¡C
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»´ä°£¤F¨ü¨È¬wª÷¿Ä·¼É¤Î¼ÓªÑ§C°g¨ü§x¥~, ¸gÀÙ§ó¥X²{t¼Wªø¡C ¬F©²ÁöµM¹ª§j³Ð·~¤Î¥_¤W´N·~, ¤ÏÀ³·´ÅA°Ñ¥b¡C ¨s³º»´ä¤¤¤W¼hªº¥ø·~ºÞ²z¤H¤Î¤¤¤p«¬¹µ¥D±¹ïªñ´Á¤¤´ä¸gÀÙ¬Fµ¦, ¦p¦ó¦b°]°È¤Î¥«³õµ¦¹º, ¦Ó¤´¥iÄ~Äò¦V«e¥¿±µo®i¡C
* ·|³õÅwªï¦U¬É¤H¤h°Ó°È. ¾Ç³N¤Î·N¨£¥æ¬y¡C
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©m¦W (¤¤¤å)______________ ¥ý¥Í/¤k¤h (^¤å)________________________
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** ½Ð§Y³s¦P¤ä²¼, ©ïÀY < °ê»Ú¦æ¬FºÞ²z¨ó·| > ±H¦^¨ó·|·|§}¤EÀs©ô¨¤À±´°¹D688¸¹©ô¨¤¤¤¤ß²Ä¤@´Á1514«Ç. ( Rm 1514, Argyle Centre- Phase I, 688 Nathan Road, Mongkok, Kowloon. )
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Date: Tue, 30 Jun 1998 14:35:38 PST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: IPC HOLE TO LEAD RATIOS
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Date: Wed, 1 Jul 1998 09:32:00 +1200
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Justin Braime <[log in to unmask]>
Subject: Re: Wave Solder Pot Temp-63/37
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1
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Hi Todd,
We are running our solder pot at 240 Degrees C, and are experiencing no
worsening in bridging, but considerable reduction in dross (and hence
solder expense). If pcbs are designed for manufacture correctly, bridging
shouldn't be that much of an issue.
Regards
Justin Braime - Process Engineer
Alpine Electronics of New Zealand Ltd
----------
> From: Todd Ness <[log in to unmask]>
> To: [log in to unmask]
> Subject: [TN] Wave Solder Pot Temp-63/37
> Date: Wednesday, 1 July 1998 03:00
>
> Hi,
>
> I would like to know the differences between having our solder pot
> temp for 63/37 solder at 261 Degrees C instead of 250 Degrees C. Will
> we see less bridging and better top-side flow at the higher temp? Are
> there any pros and cons for the different temperatures?
>
> Thanks,
> Todd N
>
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=========================================================================
Date: Tue, 30 Jun 1998 18:12:05 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: intrusive reflow and all
X-To: [log in to unmask]
Mime-Version: 1.0
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Hi Paul -
By soak (vs. non-soak) solder paste profiles, I believe you are referring to
the "traditional" ramp -soak-spike profile as opposed to the "tent profile".
The soak profile came from the earlier radiant and IR/Convection ovens that
were, by comparison to current Convection Dominant (Forced Convection) ovens
and Vapor Phase, were far less efficient in terms of heat transfer. This
combined with the relatively poor thermal conductivity of plastic substrates
(glass epoxy, FR-4) as compared to ceramic, meant we had to have a soak period
(I call it Preflow) for thermal-mechanical reason - to allow the cooler
portions of the assembly to catch up to the warmer areas (typically the
corners as this was where the most surface area was). The paste
manufacturers, for the most part, took notice of this and formulated their
solder pastes so that the flux could endure the soak period. How much
depended upon the formulation and the type of flux. RMAs (including no-
cleans) could endure, sometimes, as much as 2 minutes while most OAs wanted
shorter durations (due to the solvents used). It is very important that the
maximum soak duration called out by the solder paste manufacturer (hopefully
on the data sheet - maybe) be noted by the user. So what you have was a case
of the cart leading the horse.
With the newer, more powerful Convection Dominant ovens, some applications do
not require a soak and time could thus be trimmed off the reflow cycle. This
also has the advantage of reducing the time above the glass transition
temperature of the substrate as well as the entire duration of exposure of the
assembly to the higher temperature excursion. I suspect from conversations
with solder paste manufacturers that most paste formulations do not have a
minimum Preflow soak duration - but the user should check with their solder
paste manufacturer to be sure. And some, more complex assemblies could still
benefit from a soak to lower the gradient across the assembly.
My friend Rob Rowland has a discussion of this in his column this month and
last in SMT Magazine. I have also mentioned it in one of my Circuit Assembly
columns some time back. Rob and I had discussion on this many years ago when
he was with Iomega and did a lot of pioneer work in the "tent profile".
Again, with the current generation of more thermal transfer efficient ovens,
in many applications - it is a concept whose time has come.
Regards,
Phil Zarrow
ITM, Inc.
Durham, NH
www.ITM-SMT.com
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=========================================================================
Date: Tue, 30 Jun 1998 16:00:33 PST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: IPC HOLE TO LEAD RATIOS
Could someone enlighten me on how the hole to lead ratios for through
hole technology was derived in IPC-D-275?
Specifically, does it;
consider automated placement or manual insertion?
consider hand assembly, wave solder, reflow solder, or any?
Thank you very much, Rich.
[log in to unmask] - NEW ADDRESS!
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=========================================================================
Date: Tue, 30 Jun 1998 17:01:46 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Darrel Therriault <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Darrel Therriault <[log in to unmask]>
Subject: Torque on FR-4
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Technet,
We have a backplane mounted to a chassis that has many #10 screws holding
it in place. Standard torque specs I use don't indicate what torque is
appropriate for FR-4, and I am fairly certain it would not be the same as
for a metal/metal connection.
Question:
Does anyone have a spec or formula for fastening FR-4 to steel/aluminum
chassis using steel #10 screws (SEMS)?? (Or any size for that matter!!)
I am speculating that FR-4 with pad/pth for screws would compress more then
metal/metal
and am concerned with some damage/fracture to the FR-4 if not torqued
correctly.
Any assistance or information appreciated...
Regards...........DT
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Date: Wed, 1 Jul 1998 08:32:51 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
harrimosa <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: harrimosa <[log in to unmask]>
Subject: Re: HK CONVENTIONAL CNTR SEMINAR - 28TH JULY, 1998
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
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At 04:58 AM 1/19/96 +0000, you wrote:
> =B0=EA =BB=DA =A6=E6 =ACF =BA=DE =B2z =A8=F3 =B7|
> INTERNATIONAL MANAGEMENT ASSOCIATION
>
>=AD=BB=B4=E4=A5=F8=B7~=A6p=A6=F3=A6b=B8g=C0=D9=ADt=BCW=AA=F8=A4U=A5=BF=AD=
=B1=B5o=AEi
>=AFS=C2I=B1M=C3D=B1=B4=B0Q:
>* =AA=F1=B4=C1=AD=BB=B4=E4=AFS=A7O=A6=E6=ACF=B0=EF=B1=C0=A6=E6=AA=BA=
=ACF=B5=A6=A4=EE=A8=E4=BCv=C5T=A1C
>* =A6b=ADt=BCW=AA=F8=A4U=AA=BA=B2z=B0]=A4=EE=A7=EB=B8=EA=B5=A6=B2=A4=
=A1C
>* =AD=BB=B4=E4=A5=F8=B7~=AEa=A4=EE=BA=DE=B2z=BCh=C0=B3=A6=B3=AA=BA=B0=
]=B0=C8=A4=EE=BA=DE=B2z=AA=BA=AD=B7=C0I=BA=DE=B2z=A1C
>* =AD=BB=B4=E4=B0=D3=AC=C9=B1N=A8=D3=AA=BA=A5=AB=B3=F5=B5=A6=B9=BA=A4=
=EE=B5o=AEi=A1C
>=A5D=BF=EC=BE=F7=BAc: =B0=EA=BB=DA=A6=E6=ACF=BA=DE=B2z=A8=F3=B7|
>
>=A6a=C2I : =AD=BB=B4=E4=B7|=C4=B3=AEi=C4=FD=A4=A4=A4=DF=BAt=C1=BF=
=C6U
>=AE=C9=B6=A1 : =A4C=A4=EB=A4G=A4Q=A4K=A4=E9 =ACP=B4=C1=A4G =
=B1=DF=A4W=A4=BB=AE=C9=A4Q=A4=AD=A4=C0 =A6=DC =A4K=AE=C9=A5b
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>
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> =BD=B1=A5@=A9=F7=A5=FD=A5=ED =C1{=AE=C9=A5=AB=ACF=
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>
>=A5D=C3D=A5=D8=AA=BA:
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=ACF=A9=B2=C1=F6=B5M=B9=AA=A7j=B3=D0=B7~=A4=EE=A5_=A4W=B4N=B7~, =A4=EF=C0=B3=
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>* =B7|=B3=F5=C5w=AA=EF=A6U=AC=C9=A4H=A4h=B0=D3=B0=C8. =BE=C7=B3N=A4=EE=B7N=
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>
> =B0=EA =BB=DA =A6=E6 =ACF =BA=DE =B2z =A8=F3=
=B7|
> =B1M=C3D=AC=E3=B0Q=B7|
>=FA=B4 =B3=F8=A6W=AA=ED
>
>=A9m=A6W (=A4=A4=A4=E5)______________ =A5=FD=A5=ED/=A4k=A4h =
(=AD^=A4=E5)________________________
>=A8=AD=A5=F7=B5=FD=B8=B9=BDX ____________________ =C2=BE=A6=EC(=AD^=A4=E5)=
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=DE=B2z=A8=F3=B7| >
=B1H=A6^=A8=F3=B7|=B7|=A7}=A4E=C0s=A9=F4=A8=A4=C0=B1=B4=B0=B9D688=B8=B9=A9=
[log in to unmask] ( Rm 1514, Argyle
Centre- Phase I, 688 Nathan Road, Mongkok, Kowloon. )
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=BD=D2=B5{=A4=EE=B1=C0=BCs=A5=EE=B3~
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=========================================================================
Date: Wed, 1 Jul 1998 10:16:35 +0900
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jae-heun Joung <[log in to unmask]>
Subject: MICROWAVE PCB
MIME-Version: 1.0
Content-Type: text/plain; charset=EUC-KR; name="mail.txt"
Content-Transfer-Encoding: quoted-printable
Hi ALL,
I would like to know MICROWAVE PCB.
Pleas let me know that.
Thanks,
JJH
[log in to unmask]
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=========================================================================
Date: Wed, 1 Jul 1998 09:10:00 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Zulfakar Mohd Yassin <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Zulfakar Mohd Yassin <[log in to unmask]>
Subject: Micro BGA Rework
Mime-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 8Bit
Hi all,
I would like to know what is the best method of reworking micro BGA
and to solder and desolder the components.
What are the equipments to be used for rework on this type of
component.
Regards.
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=========================================================================
Date: Tue, 30 Jun 1998 19:09:26 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Joseph Fjelstad <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Joseph Fjelstad <[log in to unmask]>
Subject: Re: Micro BGA Rework
X-To: Zulfakar Mohd Yassin <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Air-vac
Austin American
Conceptronics
OK Industries
Reel Services
At 09:10 AM 7/1/98 -0700, you wrote:
> Hi all,
>
> I would like to know what is the best method of reworking micro BGA
> and to solder and desolder the components.
> What are the equipments to be used for rework on this type of
> component.
>
>
> Regards.
>
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>
>
>
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=========================================================================
Date: Tue, 30 Jun 1998 11:07:06 PM
Reply-To: [log in to unmask]
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From: [log in to unmask]
Subject: PLAN NOW TO ATTEND
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World Oil's Fourth International Forum and Exhibition on
Exploration and Production Management
Aug 31-Sept 2, 1998, Marriott Westside Hotel
Houston Texas.
World Oil is proud to announce the fourth forum
that offers E&P managers an overview of the latest
technology available in providing data management
solutions.
Today's E&P managers are being confronted with
the challenge to gain control of the constantly
expanding volumes of E&P information. To stay
competitive, cost-effective and timely E&P
decisions are necessary. This means accessing the
large amounts of data inherent in today's projects
and providing that data to your geo-scientists in
an efficient and effective manner.
Key features of our 1998 "Forum" program:
*Year 2000 compliance issues and solutions
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*Successful cooperation between operating
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*Outsourcing alternatives to reduce fixed cost and
allow E&P personnel on finding/producing oil and
gas *Determining when older technology
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*Maintaining the flow of information over the life
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For more information contact Mel Ladin at
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=========================================================================
Date: Wed, 1 Jul 1998 13:58:55 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Colin Weber <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Colin Weber <[log in to unmask]>
Subject: Gold thickness - Edge
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Folks,
I have been reviewing comments from past emails to the Technet forum
w.r.t. gold finishes on edge connectors.
I have concluded I should not require a nickel barrier for my application.
This could be qualified by noting the board will not be used in harsh
environments or be inserted more than several times in it's lifetime.
However I am still left wondering about the thickness of the hard gold
finish. In the past I have specified, for Class3, 1.3um. However, the
product shall be used in a class 2 environment.
Are there any disadvantages in using 1.3um (particularly since the IPC
standards state 0.8um for class 2), apart from cost?
Regards,
Colin Weber
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=========================================================================
Date: Wed, 1 Jul 1998 14:49:33 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Evan D Jones <[log in to unmask]>
Subject: spray fluxing
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
We installed a spray fluxing system on our wave solder machine, based on a
Nordson pulse sprayer, a couple of months or so back but have been having
some problems getting good results. The system utilises a single spray
nozzle with a fan pattern. The problems we have seen are poor barrel fill
(presumably due to flux not penetrating PTH barrels), and shadowing effects
on bottomside surface mount components.
We are using a no clean flux. I tried using an active flux, with the same
results, which suggests it is the sprayer setup which is the problem. If
anyone has some experiences that they can share with me regarding
successful implementation of airless spray fluxing systems I would be most
appreciative. What factors influence penetration? spray pressure?
extraction?
Up until now we have been using a foaming fluxer with reasonably good
results (except for difficulty controlling no-clean residue levels).
Regards Evan
Evan Jones
Manufacturing Engineer
Bluegum Technology Pty Ltd
PO Box 609, Wangaratta, Australia, 3676
Ph: 61 3 5720 2539 Fax: 61 3 5720 2412
Internet: [log in to unmask]
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