I looking for your definition of 100% Electrical Test of bare boards. For example, do you include all feed through vias on the wiring side in your test data file? If you add these, many may not be used in the customer's assembly test but they often cause false errors in bare board test due to Soldermask in the holes. Do you include all plated Tooling holes? Do you call it 100% if you test part of the board and AOI on another part? Do you only test/probe end of nets? Do you always probe gold fingers? I would like to hear what how you define it. Mike Hill ################################################################ TechNet E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c ################################################################ To subscribe/unsubscribe, send a message to [log in to unmask] with following text in the body: To subscribe: SUBSCRIBE TechNet <your full name> To unsubscribe: SIGNOFF TechNet ################################################################ Please visit IPC web site (http://jefry.ipc.org/forum.htm) for additional information. For the technical support contact Dmitriy Sklyar at [log in to unmask] or 847-509-9700 ext.311 ################################################################