In answer to J. Schwartz's Question, 1. Believe it or not we had an engineer sneak in at night and change values on a released schematic in our file vault ( back in the hand drawn days) and then tried to say we made an error on the parts list. So the part about in sync, we put the hammer down, once an initial schematic is drawn by the engineer and turned over to the design group for layout the design group controls the schematic from then on. If any changes are required they come through us. In some instances were there is major changes it will go back to the engineer to make them but again once that is done design controls the schematic from layout start. Also one major reason that drew us to Cadnetix in the early days was the lock out of the board once the schematic changes and the very tight integration between the two. I believe Cadnetix was the only one to do this. We are moving to VeriBest and plan to continue this practice even though VeriBest does not lock you out of the board if the schematic changes (VeriBest does allow the engineer to actually change the schematic for the board while the designer is working on the layout, but the system does notify of circuit changes) we feel once in layout all changes MUST be fed through the designer controlled schematic. Now the engineer can take a copy of the schematic and make changes but ultimately the engineer MUST be made aware of how to make changes and what effect they will have on the layout. I've seen too many cases were half a board was ripped up or not able to be saved because the engineer was not aware of how to make a change. Try and tell the engineer he must do the schematic over to save the board. Bottom line the design team must work together to keep it all together, that does mean some sacrifice on both sides is required. 2. If the above is done we can make sure the database that gets archived is complete and in sync. We would not archive a job unless ALL parts of it were complete and the schematic archived with the job was compiled or in sync with the board database. Now if within your company the engineers take an active role in the complete documentation process letting them control the schematic that goes into archive could work. 3. We are, right now, just copying the entire database of the job for that rev onto read/write cdroms (we were using 8mm tape prior to this). We were not using any special software fore this just cp for cd's and tar for tape from unix. Once on VeriBest and NT seats we will keep our latest rev jobs on a server and archive off to cd again. A little long winded but I hope it helped. I really feel a doc or design group needs to own the schematic once in layout or it can get way out of control, and believe me I've seen it get out of control. We also hope that in the not too distant future the efforts to have a standard format for assy/test/fab/etc data that would lend itself as a perfect format to archive a design database into. Bob Wolfe Executone [log in to unmask] Currently we use Allegro and Concept. We are looking to improve our design database archive system. Can anyone give us alternate suggestions, along with their companies rational, as to how they keep their schematics and pcb databases in sync. and archived ? Please respond with email. Regards, Jerry Schwartz "May The Schwartz Be With You" ################################################################ DesignerCouncil E-Mail Forum provided as a free service by IPC using LISTSERV 1.8c ################################################################ To subscribe/unsubscribe, send a message to [log in to unmask] with following text in the body: To subscribe: SUBSCRIBE DesignerCouncil <your full name> To unsubscribe: SIGNOFF DesignerCouncil ################################################################ Please visit IPC web site (http://jefry.ipc.org/forum.htm) for additional information. For the technical support contact Dmitriy Sklyar at [log in to unmask] or 847-509-9700 ext.311 ################################################################