I have a .062" thick, 10 layer PCB that I am working with. My first round of prototypes came back a bit thin at .052" thick. Between each of the inner layers of copper is only one sheet of prepreg, .0025" thick. I have a couple of long runs that are on separate inner layers, but they run right on top of each other. The runs are about 5" long, 1oz. copper, .04" thick. The only separation between these runs is through the prepreg layer. Usually, we do not have a problem with doing this, but we usually have more than one layer of prepreg between conductor layers.

My problem is this: during testing of the assembly, somewhere during surge, eft, or isolation verification, a few of the runs that run on top of each other, but on different inner layers have shorted together internally in the PCB. I don't know if it was during surge, eft, or isolation testing. Is there a way to quantify, calculate, or is there a general rule of thumb for determining the isolation characteristics between inner layers of a PCB? We are ready to do a second production run of the board where the prepreg thickness between the inner layers is doubled compared to the first prototypes, but I would like to get a good feeling if it will pass my testing before we sign off to produce the boards. I would appreciate anyone's comments or insight. I have listed some of the test requirements below: