Hi Techneters During inner layer production the AOI equipment inspects and determines which IL (inner layers ) should be rejected. In the case that there are several circuits in the inner layer panel , only the rejected circuits should be marked before sending the inner layers to the following processes. We would like to find proper way to mark this rejected circuits in a way that we would be able to find them in the final electrical test . For SPC purposes we would like to classify the boards with opens & shorts in stage of the final electrical test , which of them were rejected in the previous AOI IL inspection . It means , that we have to know for sure , that specific circuit with opens or shorts was inspected , rejected & marked during inner layer processes. Please, can anyone advice about proper method to mark the IL. Edward Szpruch Eltek Ltd - Israel Tel 972 3 9395050 Fax 972 3 9309581 E-mail : [log in to unmask] *************************************************************************** * TechNet mail list is provided as a service by IPC using SmartList v3.05 * *************************************************************************** * To subscribe/unsubscribe send a message <to: [log in to unmask]> * * with <subject: subscribe/unsubscribe> and no text in the body. * *************************************************************************** * If you are having a problem with the IPC TechNet forum please contact * * Dmitriy Sklyar at 847-509-9700 ext. 311 or email at [log in to unmask] * ***************************************************************************