Caution to this as sometimes the solder mask (during the flood operation)
because of the size of the via will not develop totally from all the
small vias in the pads and could cause problems at assembly and test.
----------
From: TechNet-request[SMTP:[log in to unmask]]
Sent: Wednesday, March 05, 1997 10:29 AM
To: Technet
Subject: Use of Microvia Technology
Does anyone have any experience with the use of Microvia technology?
Specifically, this is where the vias are actually in the SMT pads. We
are thinking about going this route to increase board real estate but I'm
concerned about testability now when using a clamshell ICT approach. I
would appreciate any feedback on this.
David
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