>I am working to resolve a problem in pattern plating a panel which has a ground >plane on one side (40% plated panel area) and pads on the back side (6% plated >panel area). We use modern DC rectifiers, one for each side, which share the >cathode connection. The panels overplate the back (6%) side even with the >corresponding rectifier turned off. Our only solution was to place current >robbers on the back side which are selectively etched off in a later operation. >I have been given information that "pulse plating" could allow us to plate this >design with out any modifications to the plating areas. My question is: > >1. Does anyone currently use "pulse plating" in a pattern plating operation? >2. Would this technology make plating this type of unbalanced design easier? > > >Thanks, Rick Haynes > Texas Instruments Printed Circuit Resources > 512-250-7823 [log in to unmask] > Hi Rick, Have you thought of panel plating the copper and then imaging to pattern plate the tin-lead. We do this on some unplateable designs and it solved the problem completely. Paul Gould Teknacron Circuits Ltd *************************************************************************** * TechNet mail list is provided as a service by IPC using SmartList v3.05 * *************************************************************************** * To subscribe/unsubscribe send a message <to: [log in to unmask]> * * with <subject: subscribe/unsubscribe> and no text in the body. * *************************************************************************** * If you are having a problem with the IPC TechNet forum please contact * * Dmitriy Sklyar at 847-509-9700 ext. 311 or email at [log in to unmask] * ***************************************************************************