Hi all, There is something for testing people : In our assembly, we use multilayer FR 4 boards. Earlier the smd process consists of: -Paste printing -Component placement ( SMD ) -Reflow -Placement of through-hole components -Wavesoldering, which solders naturally all vias, too In order to streamline the process, we have a target to get rid of through hole components and wavesoldering through using only SMD-components. Anyway, now a question has been risen that argues that IC-testing will not be any more reliable, because the tip of a probe pin does not directly touch the surface of solder in via. The diameter of vias is usually 0.5 mm ( 0.02" ) with annular ring of 0.15 mm ( 0.005" ) So, has anyone something to comment/experience on the question out there? Regards, [log in to unmask] *************************************************************************** * TechNet mail list is provided as a service by IPC using SmartList v3.05 * *************************************************************************** * To subscribe/unsubscribe send a message <to: [log in to unmask]> * * with <subject: subscribe/unsubscribe> and no text in the body. * *************************************************************************** * If you are having a problem with the IPC TechNet forum please contact * * Dmitriy Sklyar at 847-509-9700 ext. 311 or email at [log in to unmask] * ***************************************************************************