Hi Werner, Hi Dave I think, if one performs accelerated tests on solder joints it is more important not to activate a deformation mechanism which does not occur in reality than stick to any temperature range. Tin lead solder deforms with two different deformation mechanisms: Grainboundary sliding (GBs)and dislocation climb (DC). Which deformation mechanism is activated depends on the deformation rate ( temperature exchange rate ) and the temperature. Grain boundary sliding is diffusion controlled and occurs at lower deformation rates and at higher temperatures than dislocation climb. At -40°C the strain rate activating primarily GBS is approx. 10E-6, at 125°C approx. 10E-2. For a ceramic SMT capacitor 1210 on FR4 with a soldergap of 30um this results in temperature exchange rates of 0.1°C/min, and 500°C /min respectively. In performing accelerated testing with a Coffin- Mansion plot to perform a lifetime prediction one must run temperature cycle tests with 2 or 3 different temperature ranges. In these test you shouldn't change the ratio of GBS and DC to keep the Coffin Mansion exponent constant. Here lays the rabbit in the pepper ( just a joke for those who know German ). It is not easy to determine this ratio. We are working on it to prepare some diagrams that bring all that theoretical stuff in a form easy to use. However, measurements in automotive under hood electronics showed temperature exchange rates of approx. 2°C/min. This induces mainly GBS at temperatures around - 0°C. In office equippment we measured approx. 0.5°C/min. I think for accelerated testing of the majority of electronic applications mainly GBS can be assumed. In this case it might be wise to extend the temperature range to higher temperatures (avoiding the glass transition temperature of the board). If one extends the temperature range to lower temperatures use 1°C / min. from -20°C to -10°C, 2°C / min from -10°C to 0°C, 4°C / min. from 0°C to 20°C and above 20°C as fast as your equipment runs. Another point is the dwell time. At high temperatures ( 100°C ) 5 minutes dwell time are enough to relieve all the stress induced. The lower the temperatures the longer one must wait. At -20°C at least 30 min dwell time are necessary, otherwise a lot of strain is stored elastically in the PCB or in the leads of the IC's. It is questionable, whether one safes time if the temperature range is extended to lower temperatures. Best regards Guenter Grossmann *************************************************************************** * TechNet mail list is provided as a service by IPC using SmartList v3.05 * *************************************************************************** * To unsubscribe from this list at any time, send a message to: * * [log in to unmask] with <subject: unsubscribe> and no text. * *************************************************************************** * If you are having a problem with the IPC TechNet forum please contact * * Dmitriy Sklyar at 847-509-9700 ext. 311 or email at [log in to unmask] * ***************************************************************************