Groove man, One more - your customer wants you to construct the equivalent of a coax style shielded via from top to bottom on a pcb??? Center conductor with a surrounding shield from one side of the board to the other??? Are they working with digital signals? If so what are the edge rates? They going from 20% - 80% rise time, 10%-90% rise time??? Microseconds, nanoseconds, picoseconds??? Did I interpret you message right? It sounds like they are imposing too much design responsibility on you. Like the seperation of traces stuff we all got into a little while ago. After talking with a couple of over-worked underpaid talented pc board people late on a Saturday afternoon, it occurred to me that alot of the criteria for pc board design is OWNED by the designer of the circuit. The one who gives you the schematic. Not you unless that's what you've agreed to. And like you allude to in your message, when you (The Groove man) are forced to start getting tutored in high freq RF or microwave theory, its time to force the issue back onto the customer (me being one of those people). When someone designs a circuit, its critical they understand what the pc fabricators are going to do. I know I've gone way off track here, but, the bottom line is they sound like they don't know what they're doing if they are forcing this kind of thing on you. Accomadating as you are and as qualified as you are, there comes a time when pc design should stay away from electrical design. There's my two cents. I'll help anyway I can. Doug ______________________________ Reply Separator _________________________________ Subject: Re: FAB: RFI/EMI Vias Author: [log in to unmask] at internet-mail Date: 5/23/96 8:25 PM Groove man, I would first ask: Does the customer want controlled impedences on the board? (I'm assuming they do...) Doug ______________________________ Reply Separator _________________________________ Subject: FAB: RFI/EMI Vias Author: [log in to unmask] at internet-mail Date: 5/23/96 5:46 PM I have a customer who has asked me if I know about shielding vias. I don't know much about these. All I know is that the size of the PTH and the distance apart are based, somehow, on what frequency the logic (PCB) is operating at. (Yessss?) Now I don't have IEEE text books anywhere near this facility. I'm a simple fabricator. Can someone who's savvy with RF <or even Microwave> design give me some pointers to what kind of formulas are used to determine this shield via barrier technique. Thanks in advance for any and all replies. Groovy