Dear Technetters: Recently, a customer inquired as to what design considerations should be applied in order to prevent post assembly SMD pad solder 'cracks' during depanelization of V-groove (aka scored) pwb arrays. As a self confessed 'non-expert' on SMD design and assembly concerns, I would appreciate any feedback regarding this design issue, such as: design rules currently applied SMD component(s) to avoid in scored arrays Minimum distance from scored edge to SMD pad single/double sided SMD issues component orientation with respect to scored edge Minimum/maximum array area size Minimum/maximum pwb array thickness Maximum scored web thickness preferred methods for depanelization Perhaps there are interactions between the list provided above. I also realize that this list is probably not comprehensive and would welcome additional concerns that I may not be cognizant of. Thanks in advance to all of those who reply.... regards Dave Rooke Circo Craft - Pointe Claire ([log in to unmask]) *************************************************************************** * TechNet mail list is provided as a service by IPC using SmartList v3.05 * *************************************************************************** * To unsubscribe from this list at any time, send a message to: * * [log in to unmask] with <subject: unsubscribe> and no text. * ***************************************************************************