Mail*Link(r) SMTP FWD>ASY: external high-voltage testing Hello [log in to unmask], I read into you inquiry, you have concerns about the actual probing and electrical testing of printed board electronic assemblies, and electrical spacing requirements. The simple one first, the electrical spacing requirements for SMT are the same as for IMT (insertion mounted technology). As we know, mother nature has established certain set of physiscal/electrical material capabilities to withstand high voltage (HV) electrical stresses. Exceed the rules and we'll have a failure and it doesn't care what type of technology we are using. The more we stress the rules, the greater the probability of a functional failure the more "robust" (conservative) our design, in general, the less prone to failure and more reliable -- nothing new to us. Electrical spacing between conductors is based on the applicable voltage requirements (test/use), dielectric strength of the solid/liquid/gas dielectrics, and the quality of the dielectrics. Probing can become a problem as the conductor spacings become smaller, high-voltage (HV) probing / fixturing (> a few kV) becomes more difficult with a gas dielectric because more frequently the breakdown at test voltages will be from the test probes/connections or near by conductive materials and not between the conductive patterns on the printed surface of the PB. So, some consideration must be given to performing HV testing in a liquid. Then after testing is completed, the assembly is encapsulated/potted with primary dielectric(s). Generally, when SMT is linked with HV, some designers feel all of the electrical spacing requirements go-away for electrical creepage and clearance spacing requirements -- they don't. Then some designers feel they can do a simple "conformal coating" and their problems will go away -- they might for some applications, but ie more frequently is a stay-of-execution (latent failure) for most others. The electrical spacing requirements for both printed boards and printed board electrical/electronic assemblies are contained in IPC's-D-275, Table 3-1; and yes, they are conservative, but they've withstood the tests of time and have proven to be reliable for a wide range of applications and operating environments. Bottom thoughts for HV designs: consider both dc and ac (direct and alternating current) in the HV application design requirements, the electronic packaging design's packaging density (spacing) requirements will drive whether you can use solid/liquid/gas (or a combination thereof) as your primary insulation dielectrics; and the design must control the "effective" insulation between conductors in all HV applications, under all intended (and unintended) test/use/operating environments. Ralph Hersey [log in to unmask] -------------------------------------- Date: 8/14/96 9:01 AM From: [log in to unmask] Does anyone happen to have any information on possible external high-voltage testing and spacing requirements pertaining to SMT packaging? Are there any industry solutions to high-voltage problems? [log in to unmask] *************************************************************************** * TechNet mail list is provided as a service by IPC using SmartList v3.05 * *************************************************************************** * To unsubscribe from this list at any time, send a message to: * * [log in to unmask] with <subject: unsubscribe> and no text. * *************************************************************************** ------------------ RFC822 Header Follows ------------------ Received: by quickmail.llnl.gov with SMTP;14 Aug 1996 09:01:01 -0700 Received: from ipc.org by simon.ipc.org via SMTP (940816.SGI.8.6.9/940406.SGI) id KAA10015; Wed, 14 Aug 1996 10:49:38 -0700 Resent-Date: Wed, 14 Aug 1996 10:49:38 -0700 Received: by ipc.org (Smail3.1.28.1 #2) id m0uqi78-0000RgC; Wed, 14 Aug 96 10:44 CDT Resent-Sender: [log in to unmask] Old-Return-Path: <[log in to unmask]> From: [log in to unmask] Message-Id: <[log in to unmask]> Date: Wed, 14 Aug 96 11:40:35 EDT To: [log in to unmask] Subject: ASY: external high-voltage testing Resent-Message-ID: <"ugcla1.0.PfA.qGV4o"@ipc> Resent-From: [log in to unmask] X-Mailing-List: <[log in to unmask]> archive/latest/5754 X-Loop: [log in to unmask] Precedence: list Resent-Sender: [log in to unmask] *************************************************************************** * TechNet mail list is provided as a service by IPC using SmartList v3.05 * *************************************************************************** * To unsubscribe from this list at any time, send a message to: * * [log in to unmask] with <subject: unsubscribe> and no text. * ***************************************************************************