We use thermal reliefs for all plated vias that have through hole parts. This makes assembly so much easier. If you don't your design will not be robust for wave assembly. This is much worse for higher layer counts with multiple power/ground planes. We do not use thermal reliefs for microvias that are not associated with through hole parts. This is common practice for many major computer OEMs. For our mixed SMT/TH designs this means that over 75% of the plated through holes have no thermals. Advantages: 1. Less perforation to the ground plane. The EMI guys like this. Less emmisions. 2. For designs where microvias are densely packed near each other the thermal relief pads on the ground/power planes don't overlap. This prevents problems of making sure all 4 spokes in the thermal are connected. Disadvantages: 1. It is more difficult to "inspect" artwork manually. You don't know where ground and power via connections are. This can be solved if you use a 5 mil flash instead of a thermal. Also use your CAM station for these checks. 2. I've heard concerns about pink ring for "no-thermal" designs. I haven't had any problems with this. Hope this helps. [log in to unmask] ______________________________ Reply Separator _________________________________ Subject: Re: DES:,FAB: - Thermal relief for via holes ?? Author: [log in to unmask] at dell_unix Date: 6/26/96 9:59 AM We sometimes do the same (no thermals on SMT designs)...however there is always a price to pay. With buried planes, especially multiple planes for impedance control, lack of thermals make it necessary to preheat the board before hot-air removal/replacement of dead ICs. This is especially problematic when we have designed the board with vias-in-pads to cram too many parts on too small a board. The vias that connect directly to the planes take a lot of heat to reflow. Many a board has been burned by impatient individuals who turn up the temp on the hot-air tool instead of increasing the board pre-heat and increasing the hot-air tool airflow...and waiting 'till the solder flows on the power and gnd pins to lift the part. Gary P. --- Gary D. Peterson _/_/_/ _/ _/ _/ SANDIA NATIONAL LABORATORIES _/_/_/ _/ _/_/ _/ _/ P.O. Box 5800, M/S 0503 _/_/ _/_/_/ _/ _/ _/ _/ Albuquerque, NM 87185-0503 _/_/_/_/_/_/ _/ _/ _/_/ _/ Phone: (505)844-6980 _/ _/_/ _/ _/_/_/ _/ _/ _/_/_/_/ FAX: (505)844-2925 _/ _/_/ _/ E-Mail: [log in to unmask] _/_/_/ ----- Begin Included Message ----- HOWZITGOIN? Gary Willard wrote: ....are there any major concerns or advantages in having the vias connecting directly into the plane without relief... At Rockwell, flooded (no thermal relief) vias have been standard operating procedure for the last 5 years. We just photo plot a round circle that is smaller than the hole size (ie: .004") for each plane connection. It's small enough to get drilled away but large enough so the fab house doesn't think we forgot about those holes. Thank you and have a FANTASTIC day! Kevin L. Seaman (714) 221-4752 P.S. If your "reply" bounces back, then "send" to: [log in to unmask] ----- End Included Message -----