I've seen information from capacitor vendors that characterize the fracture strength of their components. In dealing with chip capacitors.... there are many different materials and geometries that are used to fabricate to different component values/specifications. I have seen reports that include force curves for mechanical stress (deflection, compression, and elongation) and thermal stress for capacitors placed on a PCB. With appropriate interpretation these curves can yield insight into the maximum allowable "twist(warpage)" that can be tolerated. I've also seen tests that correlate the solder amount to board bending. Vendors that I have worked with have supplied these results per request. I, however, have not seen a "general" reference. Is it possible to check with your vendor for specific information? ______________________________ Reply Separator _________________________________ Subject: re:PWB flexing and SMT components Author: [log in to unmask] at Internet Date: 6/19/96 2:49 PM Hi Suzanne The only references found to date is the ANSI/J-STD-001 Joint Industry Standard. Under section 9.0 Assembly Requirements their is a Bow and Twist(Warpage) specification 9.2.3. If you find something else please let me know. Hope this helps.. Does anyone have any good references on flexing of printed wiring boards and surface mount component (chip) fracturing?