1) We typically process with .002/side soldermask clearances. We will go to .0015/side if the design requires it, and the Customer will not let us change to block clearances. 2) We can only maintain webs of .005 and greater. And yes we will modify the soldermask clearance to .0015/side to achieve the .005 webs. Ray ______________________________ Reply Separator _________________________________ Subject: FAB: Soldermask Clearance and Web Width requirements Author: [log in to unmask] at SMTPLINK-HADCO Date: 5/13/96 1:42 PM Designing soldermask webs is always a pain in the neck, particularly for fine pitch. I'd like to conduct an informal survey, supplementing Doug's excellent questions below regarding soldermask: 1. Using LPI type masks what is the minimum nominal clearance (Copper to soldermask) that PCB fabricators need to prevent soldermask from encroaching onto the copper? I've got answers in the past ranging from 2 mils to 5 mils. 2. What is the minium nominal soldermask design web width that can maintained in production? I.E. a minimum width that I can expect to still have a soldermask web remaining after processing. I've got answers here in the past also from 2 - 5 mils. Need both answers from as many fabricators as possible. I am looking for a number suitable for volume production (i.e. >10K panels per month). Does a table exist in any IPC design guidelines indicating these geometries? Is it typical practice for PCB fabricators to modify soldermask artwork to get the necessary clearance? Thanks, [log in to unmask] ______________________________ Reply Separator _________________________________ Subject: FAB: Soldermask Webs. Author: [log in to unmask] at Dell_UNIX Date: 5/11/96 7:50 AM -- [ From: Doug Jeffery * EMC.Ver #2.10P ] -- Friends, We have seen many designs that have smaller webs between SMP's than they have circuits. Imagin creating a .003" line in Soldermask yet the board has .006" traces. We have found that any Soldermask web design that is .005" of web by design is reproducable and can be placed reliably, but below .005" the LPI masks do no hold on. The key reason is undercut. The LPI between SMP's is thicker than anywhere else on the board. This requires that the exposure be set up to accomadate the thicker material, however overexposure can cause other feature problems. After you have optimised the exposure you play with the developing until you keep a good dam between pads, Bingo you are leaving ink in the holes. So, you crank up the developer and get that ink out of the holes....Catch 22... AT .005" feature size (dams) you are able to optimize the process, below .005" dams the undercut takes the foot of the LPI down to .003" or .002" which makes the adhesion a problem, hense the peelers and redoposit problems that you expressed. ?What is the answer for .020" pitch devices that require .014" pad widths? ?what is the answer for .006" lands on .012" centers? I don't know but certainly we have to get to one. We have tried double coating, Unpigmented material, reduced pigmented material..No significant result differences. We try to get customers to leave use .009" min space between SMP's to keep a dam (2/5/2 by design. This makes LPI exposing a tighter regitration than our outerlayer requirements.