.int [log in to unmask] The net list test protects you from BIG screwups where the whole lots is the same - All wrong - but the same so it passes a learned test. These screwups are just as often the customers problem as the FAB makers problem and is a very good idea to net list test. Ever assemble a few hundred large PWAs and then find they ALL have the power to ground short you designed in and in a hard to rework place too? As far as occasional opens / shorts. Sometimes the test is incomplete and not detecting the error. This could be because a flip test will miss a few via on surface mount PWBs. Or a missing pin or poor fixture design with a learned program if they re-learn every lot.. Often the problem happened after some thermal or mechanical event and wasnt there when tested Larry Sternig [log in to unmask] *** Original Author: ipc.ipc.org!ipc.org! 01/24/96 095210 Resent-Date: Wed, 24 Jan 1996 07:37:52 -0800 Old-Return-Path: <[log in to unmask]> From: BOB HOENE <[log in to unmask]> Subject: Electrical test efficiency. To: [log in to unmask] Message-id: <[log in to unmask]> MIME-version: 1.0 X-Mailer: Novell GroupWise 4.1 Content-type: TEXT/PLAIN; CHARSET=US-ASCII Content-transfer-encoding: 7BIT Resent-Message-ID: <"9qole1.0.us6.iea1n"@ipc> Resent-From: [log in to unmask] X-Mailing-List: <[log in to unmask]> archive/latest/2333 X-Loop: [log in to unmask] Precedence: list Resent-Sender: [log in to unmask] Would anyone who happens to be an electrical test guru provide the relative efficiency of bare board electrical test and compare a "standard" electrical test to a "net list test". The impetus for this is our in-circuit test department wondering why they occasionally still find opens and shorts on "tested" boards. All responses and opinions greatly appreciated. Thanks, Bob Hoene Marquette Electronics Milwaukee, WI