I have been looking at some 20 pin Leadless Ceramic Chip Carriers which have exhibited cracks. They are mounted on standard FR4 and thermal cycled between -55 +80 for 1000 hours. Cracking is a problem with this device as we know but not at these low lead counts. Many uses in their design rules make 28 pin devices the limit and then incorporate the use of matched substrate to reduce differential expansion. I would appreciate any feed back on failure that people have seen on testing of low lead count devices or even feed back on where people see the limit on pin count and the need for special substrates. Bob Willis Process Engineering Consultant Electronic Presentation Services 2 Fourth Avenue, Chelmsford, Essex CM1 4HA. England. Tel: (44) 01245 351502 Fax: (44) 01245 496123 Home Page: http://ourworld.compuserve.com/homepages/Bwillis Email: [log in to unmask] *************************************************************************** * TechNet mail list is provided as a service by IPC using SmartList v3.05 * *************************************************************************** * To unsubscribe from this list at any time, send a message to: * * [log in to unmask] with <subject: unsubscribe> and no text. * ***************************************************************************