Recently I have spent considerable time with more than one fabricator in order to come up with an acceptable wording for our Workmanship Standards on this subject. An article entitled "Filled Vias and Quality" on page 40 of the March 1997 issue of "Printed Circuit Fabrication" states that in existing industry and military specifications, via fill defects are not addressed adequately. The appearance of this article would seem to indicate that our company's experience is not unique. And indeed I have scoured all my IPC docs in vain for a ruling on this issue. Which IPC document would this issue fall under, and who is responsible for coordinating improvements? I'd like to find out what's in the works. Thanks, Gary *************************************************************************** * The mail list is provided as a service by IPC using SmartList v3.05 * *************************************************************************** * To unsubscribe from this list at any time, send a message to: * * [log in to unmask] with <subject: unsubscribe> and no text.* *************************************************************************** * If you are having a problem with the DesignerCouncil, please contact * * Dmitriy Sklyar at 847-509-9700 ext. 311 or email at [log in to unmask] * ***************************************************************************