Regarding single sheet prepregs, I feel comfortable down to about 3 mil average pressed thickness. I have issues with single layers of 1080 or 106, the 106 being worse. I have run some quick tests on single sheets of 1080/106. These were biased humidity tests on very dense computer boards. Shorts would first form in the area of high density arrays, between power/ground planes. The reason is the large number of plane keepouts in these areas would result in a thin web of metal between the keepouts. During lamination, the epoxy flows into the keepout, while the metal webs on facing planes could get as close as 1 mil apart. In all fairness, I did not thoroughly characterize this failure mechanism. To correlate to real world conditions would involve a large factorial experiment in which voltage, temperature, and humidity were varied. Results will also be very design specific. Under the conditions I used, the single layer prepreg failed much earlier than a standard construction. Whether this accellerated test was capable of representing field conditions, has not been determined. AT&T has presented excellent papers on accelerated life testing that would be applicable to this situation. Search for author M.J. Luvalle. Thin prepregs are already here in PCMCIA cards. We are hesitant to introduce them on larger, more complex boards because of the greatly increased number of potential failure sites. However, we are going to have to face this issue in the very near future. -Jeff Deeney- [log in to unmask] Hewlett Packard Company Fort Collins, Colorado