Reply to Doug Jeffery at Electrotek, Inc. ______________________________ Forward Header __________________________________ Subject: About TDR coupons Author: Bob Traut at Rogers-R&D Date: 9/6/95 1:53 PM Doug: Andy Magee of Rogers Circuit Materials Division forwarded to me your 95Sep02 e-mail about TDR coupons, and also a 95Sep05 reply from Dave Hoover, Hadco Printed circuits, [log in to unmask] The TDR method in the January 1995 IPC-D-317A Design Guide section 6.0 for high-speed packaging seems to leave a lot of latitude for designing a coupon and offers a simple TDR test scheme. Several years ago IPC Subcommittee D-24 on test methods for high- frequency/high speed interconnections prepared a 15 page test method IPC-TM-650 number 2.5.5.7 "Characteristic Impedance and Time Delay of Lines on Printed Boards by TDR" November 1992. You may want to order a copy of that also. 2.5.5.7 should have been a refernce in 317A. Prior to that I am not aware of any published documentation of TDR methods or coupons. G. Robert Traut Corporate Research Fellow Advanced Materials Group Lurie Research & Development Center ROGERS CORPORATION, P.O.Box 157, ROGERS, CT 06263-0157 [log in to unmask]