Some of the porcelain RF power caps use no Ni in the termination, typically Cu over a Cu glass fit. That may be what is happening here. Add high Pdiss in Cu termination and SAC solder. Regards, John Maxwell > On Sep 6, 2017, at 6:16 PM, Yuan-chia Joyce Koo <[log in to unmask]> wrote: > > hmm, copper plated termination, look like shown in the image normally used for thin cap (embedded cap in PWB for example), normally Cu termination are Cu frit paste... that not easily dissolved in solder... but it didn't look like it on image... must be something new. > good to know. > jk > On Sep 6, 2017, at 5:59 PM, David Hillman wrote: > >> Hi Joyce - the barrier layer can be either nickel or copper depending on >> the component supplier. Obviously nickel is a better materials choice for >> soldering process robustness but in terms of electrical characteristics, >> some circuit designs work better with copper. >> >> Dave >> >> On Wed, Sep 6, 2017 at 4:58 PM, Yuan-chia Joyce Koo <[log in to unmask]> >> wrote: >> >>> http://www.electronicdesign.com/boards/rohs-implementation-challenges >>> see the cross section of Ceramic cap - metallization got Ni layer... not >>> seen on your image. hopefully, it is not MFG missing a process (or cheap >>> stuff for low temp/ Ag adhesive potting type). >>> On Sep 6, 2017, at 3:01 PM, Yuan-chia Joyce Koo wrote: >>> >>> did it missing a Ni plating? http://www.johansondielectrics >>>> .com/understanding-ceramic-capacitor-terminations >>>> best of luck. >>>> jk >>>> On Sep 6, 2017, at 12:25 PM, Giamis, Andy wrote: >>>> >>>> Hi TechNetters, >>>>> >>>>> Here’s something I have not seen before. >>>>> I have seven different ‘theories’ for what’s happening here. >>>>> Three of which do not involve mythical creatures, illegal substances or >>>>> the alignment of celestial bodies. >>>>> >>>>> This capacitor is on a path that sees a lot of RF power. >>>>> The unit went through 20 cycles of -70C to +115C while at nominal >>>>> power. Temperature sensing suggests this device could be hitting 170C. >>>>> No, we normally don’t test to these extremes. >>>>> The PCB has ENiG finish and the solder is SAC. This is normal SMT, no >>>>> rework. >>>>> >>>>> I think I know in general what happened, but I am surprised. >>>>> I don’t have an explanation for the formation of the big pocket on the >>>>> right. >>>>> Has anyone ever come across any solder joints like this? >>>>> >>>>> Thanks Steve for uploading the pictures (links below). >>>>> >>>>> http://stevezeva.homestead.com/pockets_25.jpg >>>>> >>>>> http://stevezeva.homestead.com/Pockets_CS.jpg >>>>> >>>>> http://stevezeva.homestead.com/Pocket-left.jpg >>>>> >>>>> http://stevezeva.homestead.com/Pockets-right.jpg >>>>> >>>>> >>>>> Best Regards, >>>>> Andy >>>>> Andrew C. Giamis >>>>> Senior Failure Analysis Engineer >>>>> CommScope >>>>> 2601 Telecom Pkwy >>>>> Richardson, TX, 75082, USA >>>>> >>>>> >>>>>