Oh heavens. Our legal department shudders collectively with fear every time Dave and I leave the building and go out in public. When we go to IPC meetings, the Valium and Lithium intake there increases exponentially. Doug Pauls From: Joyce Koo <[log in to unmask]> To: <[log in to unmask]> Date: 08/08/2013 07:57 AM Subject: Re: [TN] QFN solder voiding Sent by: TechNet <[log in to unmask]> "I haven't seen any published data on that aspect of QFNs so it may not be a significant issue." - hmmm, not sure if it is valid assumption. Not when you have lawyers and legal department review your paper. How long you have to wait for the corona arcing to be published? Tin/zinc Whiskers on electronics? 10 to 20 years? Dave, you are very courageous. (even without lawyers, did you see start up publish defect tracking data? Even less than the lawyer reviewed one). Joyce Koo Researcher Materials Interconnect Lab Office: (519) 888-7465 79945 BlackBerry: (226) 220-4760 -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of David D. Hillman Sent: Thursday, August 08, 2013 8:40 AM To: [log in to unmask] Subject: Re: [TN] QFN solder voiding Hi Bryan - concerning the voiding of the center pad, I'll have to steal Doug's answer of "it depends". We use a requirement of 50% maximum void unless there is a functional circuit requirement such as grounding or thermal. As a number of TechNet folks have detailed, there are various ways to easily achieve that 50% maximum void. There are always going to be some voiding but we routinely keep the voiding under 25% of the center pad area. Out of the couple 100 QFN packages we deal with, there has only been two cases where the 50% maximum requirement wasn't sufficient. We made stencil adjustments to insure we hit a 20% maximum value and the QFN packages were suddenly very happy (both cases involved signal grounding). As you mentioned, the peripheral pads are a whole other story and I suspect voids have a bigger impact there - I haven't seen any published data on that aspect of QFNs so it may not be a significant issue. There were some very good papers at the 2012 SMTAI conference on QFNS which would be useful too. Good luck with your process development. Dave From: "Kerr, Bryan (UK)" <[log in to unmask]> To: <[log in to unmask]> Date: 08/08/2013 02:55 AM Subject: Re: [TN] QFN solder voiding Sent by: TechNet <[log in to unmask]> Hi All Thanks for all the responses. I'm sure that in most cases we have little choice but to develop our processes to suit these problematic component styles however I think the aspirations of the expected soldering standards vary considerably. I think there is a general acceptance that 50% coverage of the base is enough although some people, customers and component suppliers, are beginning to demand more. Peripheral pads are not specified within any standard I know of and these can show a level of voiding too so this still needs to be developed. Bryan -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Joyce Koo Sent: 08 August 2013 01:12 To: [log in to unmask] Subject: Re: [TN] QFN solder voiding ----------------------! WARNING ! ---------------------- This message originates from outside our organisation, either from an external partner or from the internet. Keep this in mind if you answer this message. Follow the 'Report Suspicious Emails' link on IT matters for instructions on reporting suspicious email messages. -------------------------------------------------------- Preform. From: [log in to unmask] Sent: Wednesday, August 7, 2013 7:47 PM To: [log in to unmask] Reply To: TechNet E-Mail Forum Subject: Re: [TN] QFN solder voiding Steve and all others. Void free center pads are achievable but you have to really think out of the box to arrive at a solution. I have worked with parts 1.6mm square to parts as large as a postage stamp and the same basic techniques work. Helpful hints; Solder mask is your enemy and the proper aperture will look very different than what you usually see. Little blocks of solder paste will only result in voids. Think out of the box. Due to my work I really cannot reveal the secrets but the results can be achieve. John On Wed, 7 Aug 2013 14:12:02 -0600, Steve Gregory <[log in to unmask]> wrote: > (background chorus) I want my...I want my...parts void free! > > Steve > > > -----Original Message----- > From: TechNet [mailto:[log in to unmask]] On Behalf Of Whittaker, Dewey > (EHCOE) > Sent: Wednesday, August 7, 2013 1:47 PM > To: [log in to unmask] > Subject: Re: [TN] QFN solder voiding > > Striking a familiar chord; Excellent! > Dewey ________________________________ ______________________________________________________________________ This email has been scanned by the Symantec Email Security.cloud service. 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