Hello Technetters. We use a ceramic substrate covered with Cu layer. This Cu layer is plated with ENIG process. We solder SMD's on it with SnPb process (vapor phase and iron). The ASTM specifications give a thickness of Ni 4 ± 2 µm. Where comes from this value ? What could be an issue with thinner Ni layer like 0.5 µm ? Thanks to answer. Best regards, CANTAGALLO Luigi ______________________________________________________________________ This email has been scanned by the MessageLabs Email Security System. For more information please contact helpdesk at x2960 or [log in to unmask] ______________________________________________________________________ --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 16.0 To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives For additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 -----------------------------------------------------