Hi Karen - I was wondering when someone was going to ask that question. The IPC-7093 has some good information on the topic (section 7.6.1). There is no current requirement in JSTD-001 that I am aware of. The IPC JSTD-002 requires that the ground pad have a minimum of 80% wettability. Most folks in the industry I have talked to are use a 50% minimum solder coverage unless the QFN has a specific thermal or grounding need for better coverage. Dave Karen Tellefsen <[log in to unmask]> Sent by: TechNet <[log in to unmask]> 09/01/2011 10:30 AM Please respond to TechNet E-Mail Forum <[log in to unmask]>; Please respond to Karen Tellefsen <[log in to unmask]> To <[log in to unmask]> cc Subject Re: [TN] QFN with solder slug What about voiding under these little monsters. A lot of our customers complain about voiding under the QFN ground slug. Karen Tellefsen - Electrical Testing [log in to unmask] 908-791-3069 Re: [TN] QFN with solder slug Wenger, George M. to: TechNet 08/31/2011 05:57 PM Sent by: TechNet <[log in to unmask]> Please respond to TechNet E-Mail Forum, "Wenger, George M." I agree with Frank about disagreeing with Dave and Dewey and I agree with him about final finish, and cost associated with tenting and plugging. However, I also disagree with Frank about using small vias. A small via is a much better capillary for wicking than a larger via. The "it depends on many factors" is absolutely correct. Our concept is to design (i.e., size and location) thermal vias under parts so that the copper barrels provide the enough thermal path so we don't have to fill the vias and we size the vias and via pattern and stencil print pattern to minimize any thieving. Regards, George George M. Wenger Senior Principal Reliability / FMA Engineer Andrew Corporation - Wireless Network Solutions 40 Technology Drive, Warren, NJ 07059 (908) 546-4531 Office (732) 309-8964 Mobile E-mail: [log in to unmask] -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Frank Kimmey Sent: Wednesday, August 31, 2011 5:33 PM To: [log in to unmask] Subject: Re: [TN] QFN with solder slug Wow, I hate to disagree with guys like Dave and Dewey, but "it depends" (Diet Dew is on the way, Doug) on many factors. Final finish chemistries can make tenting a bad thing, plugging can be expensive and too large diameter will cause solder starvation. We do lots of these and make sure all holes are small enough to minimize wicking with RoHS solders. We have also found a little solder starvation (as long as there is still good wetting) doesn't cause to many reliability concerns. We use small (smaller does not transfer heat as well but reduces wicking) vias under the part and as many large vias as can be fit around the part. Thermal relief sorta cancels part of the value so everything gets flooded. Also, tie to every layer possible, inner layers do not transfer heat real well but every little bit helps. It is doable without extra fab/assy costs but may require some experimentation with your suppliers to find the right combination. Good luck, FNK Frank N Kimmey CID+ Manager - PCB Design Powerwave Technologies Inc. Mobile - 916-670-0645 -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Whittaker, Dewey (EHCOE) Sent: Wednesday, August 31, 2011 2:20 PM To: [log in to unmask] Subject: Re: [TN] QFN with solder slug Vias are like puns (Dewey"isms"); they should all be in"tent"ed (capped, filled, plated-over). Thanks for agreeing. Dewey -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of David D. Hillman Sent: Wednesday, August 31, 2011 2:12 PM To: [log in to unmask] Subject: Re: [TN] QFN with solder slug Hi Mark - if you leave the thermal vias open then the solder will thieve down them leaving the center pad "solder starved". I recommend you use some fabrication format which permits the vias not allowing solder to thieve - aka either capping them or filling them. The IPC-7093 standard on Bottom Termination Components also may have some helpful information. Dave Hillman Rockwell Collins [log in to unmask] Mark Larson <[log in to unmask]> Sent by: TechNet <[log in to unmask]> 08/31/2011 02:52 PM Please respond to TechNet E-Mail Forum <[log in to unmask]>; Please respond to Mark Larson <[log in to unmask]> To <[log in to unmask]> cc Subject [TN] QFN with solder slug I am curious how others are handling these parts for soldering. Do you leave the thermal vias in the slug covered or uncovered with solder mask? Do you fill with anything? What size hole on a 62 mil board? Tie to all GND planes or just the back side? Thermal relief the via or bury it in the plane? --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 16.0 To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives For additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ----------------------------------------------------- ______________________________________________________________________ This email has been scanned by the MessageLabs Email Security System. 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