Thanks, Jim and Doug This assembler is asking for 150mils. One reference I found suggested creating an area defined as a NO COAT zone, and defining the area to be COATED, separated by a neutral zone that wouldn't be inspected either way. This could easily be done in the design by just "drawing" the neutral area between zones with a 60 mil width (90mils away from the connector example used below). Does that sound reasonable? or am I thinking wrongly? (or am I over-thinking this whole scenario?) The DFM mantra inspires me to keep these downstream processes in mind, and maybe the 150 mils is a combination of coated, notinspected, notcoated clearances, but it sure ties my hands during component placement around these areas. Jack . On Wed, 19 Jan 2011 15:58:41 -0600, Douglas Pauls <[log in to unmask]> wrote: >Stop that Jim. I have Hillman signing me up for all kinds of things, he >does not need assistance. > >Like Jim, for much of our coating, we use a 60 mil clearance around >connectors, precisely due to the wicking that Jim describes. Way too easy >to flood the connector. Machine application is not that much difference >beween you get much more wicking that way, especially if you spray >(thinned material wicks more). > >Now, this clearance also creates potential failure sites in humidity. What >I would recommend around connectors is to find a no-flow sealant to >permanently seal the base of the connectors, then coat up to that sealant. > That way you get a continous protective film. Same consideration if you >have components you need to seal off. > >Doug Pauls > > > >Jim Carlson <[log in to unmask]> >Sent by: TechNet <[log in to unmask]> >01/19/2011 03:24 PM >Please respond to >TechNet E-Mail Forum <[log in to unmask]>; Please respond to >[log in to unmask] > > >To >[log in to unmask] >cc > >Subject >Re: [TN] Conformal Coat vs. Masking > > > > > > >Jack, > >Our normal manual clearance is .06", to prevent wicking on any leaded >type of component. If you have small isolated areas to mask, this will >work. But if it requires a lot of different components/areas, you will >be driving touch time and intricate masking. Perhaps Doug Pauls can >provide adequate clearance for automated methods. > >Jim Carlson >Quality/Configuration Manager >L-3 Communications >Applied Signal & Image Technology >443-457-1111 Ext. 238 > > >-----Original Message----- >From: TechNet [mailto:[log in to unmask]] On Behalf Of Jack Olson >Sent: Wednesday, January 19, 2011 4:10 PM >To: [log in to unmask] >Subject: [TN] Conformal Coat vs. Masking > >Does anyone know a sensible guideline for how much space to leave >between >conformal coated areas and other areas that should NOT be coated? > >We have some high voltage areas of circuitry that need to be coated, >near other >connectors and mounting holes that will not be coated. The problem is, >the >assembler is asking for far more "isolation" than the engineers! >(might it be a different clearance for manual vs. in-line?) > >Seems like this would be common knowledge, but I just can't find it >anywhere... > >thanks, >Jack > --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 15.0 To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/ContentPage.aspx?Pageid=E-mail-Forums for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 -----------------------------------------------------