Inge, My observations when sectioning LED's, and Si devices was that I could make problems if I rushed the process too quickly. I always go very slowly. I don't rush the cut. Don't rush the polishing operation. Go slowly! If I rush the cutting or polishing, I frequently end up with cracks, chip-outs, etc. If you were working with unpackaged [Flip Chips], I would suggest that you may also wish to visualize the stress that the potting material puts on your chips. It may also be possible for your potting material to induce enough stress inside a packaged device too, but I might not put that very high on my likelihood list. It seems that the cohesive strength of the Si is greater than the interfacial strength between the Si and the mold compound. I have not seen it inside packaged devices, but can acknowledge its possibility - Can you afford to look at a part using reflected acoustics? If you could 'safely' get a chip off the board without causing more damage, one could look at it in a through-transmission mode. If the separation were as gross as you indicate, it should show up very easily with a low freq transmission mode transducer. Another option may be to do some fine focus x-ray examination of the board and suspect vias to satisfy yourself of their integrity, then sacrifice the IC by chemical de-encapsulation processes.. I've only seen device cracks like you describe when large CTE's/and or thermal excursions were involved - [eg - power MOSFET soldered on Cu and power cycled to death, or large chips using unfilled (optical) molding compounds]. You have all the fun parts! Steve C -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Inge Sent: Wednesday, November 25, 2009 11:03 AM To: [log in to unmask] Subject: [TN] Preparing for microvia examination Schrekxscht! That was the way the aliens from planet Mars saluted us in the funny film that ended in their heads exploding when a guy played Elvis Presley on his car radio. What does that have to do with microvias? Anyone with experience from cutting a board into small pieces and mold them in epoxy for cross section analysis? I use a thin blade, high rpm diamond blade for cutting. The board was equipped with SuperBGAs down to smallest QFNs. We suspected via problems and looked for such after polishing. In fact we found extremly good barrels and no sign of via issues. Instead we saw that some cross-sectioned semi chips had fine microcracks. In some cases, the microcrack ran all the way across the chip, i.e. the whole active area was more or less separated from the rest of the chip.My q is this: has anyone of you got microcracks in the semi chips caused during the cutting operation? I,ve cross sectioned hundreds of boards during my time here, but never seen cracks like these be caused by the diamond cutting. Can there be a Schrekxscht when you use the diamond saw? /Inge --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 15.0 To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ----------------------------------------------------- --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 15.0 To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 -----------------------------------------------------