When it dries up are all you're left with is Poodles? -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D. Sent: Thursday, November 20, 2008 7:12 AM To: [log in to unmask] Subject: Re: [TN] Minimum electrical clearance question Well I think you are correct. The pitch appears to be 6.25 mil, but the spacing between conductors is about 5 mil. Close enough for government work, as they say in Dog River. -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Bev Christian Sent: Wednesday, November 19, 2008 5:58 PM To: [log in to unmask] Subject: Re: [TN] Minimum electrical clearance question Ha! A classic case of not doing a dimensional conversion and paying the price. I am on old enough North American fart that I use SIR coupons measured in inches, while many other things I do are in metric and I didn't think it through what 0.13 mm corresponded to in inches, he says red-faced. I think section A is actually supposed to be 6.25 mil. Bev -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D. Sent: Wednesday, November 19, 2008 4:46 PM To: [log in to unmask] Subject: Re: [TN] Minimum electrical clearance question Bev, perhaps you could use the IPC multi-purpose test board B-25. This is the board with the SIR test patterns on it. Comb pattern "A" has spacing that appears to be .005" or less, or about the same as .13mm. The B-24 board does not have spacing as close as the B-25, so that would probably not work. The other advantage of the B-25 is that it has soldermask, so it more closely represents a standard PWB. So if you simply soldered the pattern with your no-clean solder and left the no clean flux residue on the board, you could then theoretically apply any voltage/frequency combination and run it through the humidity cycling. While the purpose of the board was to perform surface insulation resistance testing with specific voltage levels applied per IPC-TM-650 2.6.3.3, I don't see why you couldn't perform crosstalk or other testing as well, at whatever frequency or voltage you desire. -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Bev Christian Sent: Wednesday, November 19, 2008 12:58 PM To: [log in to unmask] Subject: [TN] Minimum electrical clearance question Technetters, IPC-A-610D Appendix A, Table 6-1 (an information only appendix) says that for 0-15 volt peaks that spacing should be a minimum of 0.13 mm. A designer can set any limit they want, but it should be in a document. And preferably there should be proof that there is not a potential issue. However, are the stated minimums are for boards with nothing between the components? We will have flux residue between the components at the proposed distance for sure, as we are a no-clean company. We do not test our fluxes and solder pastes to really, really small spacings. How do other people handle this? Bev RIM --------------------------------------------------------------------- This transmission (including any attachments) may contain confidential information, privileged material (including material protected by the solicitor-client or other applicable privileges), or constitute non-public information. Any use of this information by anyone other than the intended recipient is prohibited. If you have received this transmission in error, please immediately reply to the sender and delete this information from your system. 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