Hi Phil My reply concerned boards that have been washed. For "no clean" boards the acceptability would have to be different, but I'm not sure how best to define it. You can define maximum residues (e.g. "maximum chloride residue level of xx.xx micrograms per square centimeter" as Doug has suggested) - but even so how much control do you have? Realistically, a CM isn't going to do ion chromatography every day given the cost and time requirements (unless you tell them they have to, and you will pay dearly for it). And if they do, will it be on a reworked board? How will you be sure it's representative, given that each rework operator will use different amount of flux. This is why the idea of no-clean in high reliability gives me the heebe-jeebies... regards, - Graham -----Original Message----- From: Phil Nutting [mailto:[log in to unmask]] Sent: Thursday, January 03, 2008 2:05 PM To: TechNet E-Mail Forum; Graham Collins Subject: RE: [TN] specifying board cleanliness Graham, OK, so lets say a board has been built using no-clean. Does that have a different "acceptable standard of cleanliness" or is it exempt? I'm going to assume, for now, that your specification listed below is for boards that have been washed. Thanks, this is great info. Phil -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Graham Collins Sent: Thursday, January 03, 2008 10:10 AM To: [log in to unmask] Subject: Re: [TN] specifying board cleanliness Happy New Year Phil! Well, "it depends"... First question is how clean do you need them to be? Depends on the application and environment. Second question is what sort of assembly process the CM is using - if "no clean" then they will be justifiably opposed to cleanliness testing. The generic callout that we most commonly see on drawings is "clean per J-STD-001 C-22" - which translates into clean the assembly, both sides, and then do an ionic contamination test with a upper limit of 1.56 micrograms / cm2 NaCl equivalent contamination. I'm not sure why J-STD-001 gives an option to only clean one side - never seen that process in use. Anyway, a starting point... regards, Graham Collins Halifax Production Engineering L-3 communications Electronic Systems (902) 873-2000 ext. 6215 -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Phil Nutting Sent: Thursday, January 03, 2008 10:45 AM To: [log in to unmask] Subject: [TN] specifying board cleanliness Good Morning and Happy New Year to All, Let me start by confessing my ignorance relative to cleanliness of circuit boards. We have no idea what numbers to specify that fit into the IPC testing methods for board cleanliness. If I tell my CMs to make the boards clean, it would be good to specify a target value and or test method. Can someone give me some guidance on how to chose these specifications? What are worth while tests and which ones are window dressing? I've read through some of the IPC tests methods and my head hurts. Thanks in advance, Phil Nutting Note: All the information contained in this e-mail and its attachments is proprietary to Kaiser Systems, Inc. and it may not be reproduced without the prior written permission of sender. If you have received this email in error, please immediately return it to sender and delete the copy you received. --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 15.0 To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ----------------------------------------------------- --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 15.0 To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ----------------------------------------------------- Note: All the information contained in this e-mail and its attachments is proprietary to Kaiser Systems, Inc. and it may not be reproduced without the prior written permission of sender. If you have received this email in error, please immediately return it to sender and delete the copy you received. --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 15.0 To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 -----------------------------------------------------