Bill, I use Mentor Expedition, and Cadence Allegro. In Expedition, I run the testpoint program and choose from a list of items that I can add a testpoint over (vias, pins, traces etc.) and it adds a testpoint with the rules I have selected. I typically try to fanout all SMT devices to a via, as it helps achieve full testability and also adds a point to add a wire to if someone makes a "improvement". The output file that is used by the testing house is "Mitron Gencad". For Cadence the higher tier tool (Performance option) has the testpoint ability, as I only have the lower tier PCB Editor I do my best to add vias spaced nicely with larger probable pads on the bottom side. I do not output anything special with this. Karl From: "Brooks,Bill" <[log in to unmask]> Reply-To: "(Designers Council Forum)" <[log in to unmask]>, "Brooks,Bill" <[log in to unmask]> To: [log in to unmask] Subject: [DC] ICT, bed-of-nails and CAD tool support? Date: Tue, 5 Jun 2007 17:15:38 -0700 'In-Circuit Test' is a seldom discussed subject at the 'designer's round table' here... I'm curious how other designers are affected by test points and how they deal with testability in their designs. I have placed test points in schematics and treated them as 'components' on the board before... What have you seen for test point support from the CAD vendors and is there an easy way to automate this? Also those who have to test for a living... what is the process you use and are the outputs from these CAD tools any help? Best regards, Bill Brooks, CID+ --------------------------------------------------------------------------------- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. To temporarily stop/(restart) delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL/(MAIL) Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. To temporarily stop/(restart) delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL/(MAIL) Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ---------------------------------------------------------------------------------