I firmly believe it is from the wave. Would you please elaborate more on the masking carriers? Best regards, Juan Rojas | Sr. Test Engineer | Harman/Becker Automotive Systems | office: (270) 598-4555 | www.harmanbecker.com -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Tempea, Ioan Sent: Wednesday, May 02, 2007 9:42 AM To: [log in to unmask] Subject: Re: [TN] LeadFree - ICT FPY Benchmarking Juan, in case the experiment below shows the residue being the problem, you will have to answer to this question: is it the SMT paste residue that bothers you or the flux residue from wave? If it is the SMT you might want to revise the PCB, for proper probe acess. If your trouble is the waving, it is just a matter of using masking carriers. Regards, Ioan -----Original Message----- From: TechNet [mailto:[log in to unmask]]On Behalf Of John Burke Sent: Tuesday, May 01, 2007 4:34 PM To: [log in to unmask] Subject: Re: [TN] LeadFree - ICT FPY Benchmarking Yes as a matter of fact. Produce 2 small runs of product in 2 groups of 10. It sounds like you are using a no clean flux so process one that way. Process the second batch using the same manufacturers paste in a water clean version. If you haven't got a cleaner before you start arrange with a local contract house that has a water cleaner to drive the reflowed second batch straight there and throw them through their water washer. Now you have 2 sets of 10 boards as a comparison to run testing trials on one of which should be "squeaky clean" which should eliminate or incriminate the flus residue question. Have fun, John John Burke (408) 515 4992 BY the way when you say "oxidation" what is the board finish? Gold will not oxidise and silver oxide is conductive. -----Original Message----- From: Rojas, Juan [mailto:[log in to unmask]] Sent: Tuesday, May 01, 2007 1:06 PM To: TechNet E-Mail Forum; John Burke Subject: RE: [TN] LeadFree - ICT FPY Benchmarking Thanks John, Yes we are having what it appears to be typical contact problems (due to residues like: flux, oxidation, etc.) But I can not prove this yet; even when we re-test a failing board it passes without doing anything to it; this is not sufficient to convince my fellow process engineer. We also have a lot of problems with capacitor tests that fails marginally it is a very unstable test (caps)I attribute it still to residue but again it is very difficult to me to prove it. Any ideas? Comments are welcome. Best regards, Juan Rojas | Sr. Test Engineer -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of John Burke Sent: Tuesday, May 01, 2007 3:00 PM To: [log in to unmask] Subject: Re: [TN] LeadFree - ICT FPY Benchmarking Agreed, attention to detail is everything... Juan, If you are having an issue with yield (which you have not stated) how does it compare with the leaded version? John John Burke (408) 515 4992 -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D. Sent: Tuesday, May 01, 2007 12:09 PM To: [log in to unmask] Subject: Re: [TN] LeadFree - ICT FPY Benchmarking Well, thank you. We certainly put a lot of effort into it. It is really amazing what it takes to get better than 5 sigma. Everything from pad design library, part type selection, DFMEA, type of pwb material, surface finish, selection and qualification of solder paste, process details, component vendor qualification, receiving inspection procedures, process controls on reflow/paste print/pickandplace/reflow/wavesolder, fixture DFMEA, etc., etc,....... When you think about it, all of the efforts put into getting a 99% cumulative yield and maintaining it over time is a major task. Many are doing it today, but it sure is not an easy thing to accomplish. -----Original Message----- From: Rojas, Juan [mailto:[log in to unmask]] Sent: Tuesday, May 01, 2007 1:54 PM To: TechNet E-Mail Forum; Stadem, Richard D. Subject: RE: [TN] LeadFree - ICT FPY Benchmarking Wow! you're really doing well. -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D. Sent: Tuesday, May 01, 2007 1:08 PM To: [log in to unmask] Subject: Re: [TN] LeadFree - ICT FPY Benchmarking It should be around 99% or better. -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Rojas, Juan Sent: Tuesday, May 01, 2007 11:36 AM To: [log in to unmask] Subject: [TN] LeadFree - ICT FPY Benchmarking Hi Everyone, Would you mind if you can share with me what a typical ICT FPY is? For the following PCBA: Pb-Free process ~300 Test points Low Board complexity (~500 analog components) Board size: 6 x 9 in Single side board Test pad size diameter 35 thou A ball park number would be fine. Best regards, Juan Rojas, MITMB | Sr. Test Engineer | Harman/Becker Automotive Systems | office: (270) 598-4555 | www.harmanbecker.com <http://www.harmanbecker.com/harmanBecker/www_root/index2.jsp?language=U S> --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 15.0 To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ----------------------------------------------------- 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